CodeGenerator.cs 63 KB

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  1. using ARMeilleure.CodeGen.Optimizations;
  2. using ARMeilleure.CodeGen.RegisterAllocators;
  3. using ARMeilleure.CodeGen.Unwinding;
  4. using ARMeilleure.Common;
  5. using ARMeilleure.Diagnostics;
  6. using ARMeilleure.IntermediateRepresentation;
  7. using ARMeilleure.Translation;
  8. using System;
  9. using System.Collections.Generic;
  10. using System.Diagnostics;
  11. using System.IO;
  12. using System.Numerics;
  13. using static ARMeilleure.IntermediateRepresentation.OperandHelper;
  14. namespace ARMeilleure.CodeGen.X86
  15. {
  16. static class CodeGenerator
  17. {
  18. private const int PageSize = 0x1000;
  19. private const int StackGuardSize = 0x2000;
  20. private static Action<CodeGenContext, Operation>[] _instTable;
  21. static CodeGenerator()
  22. {
  23. _instTable = new Action<CodeGenContext, Operation>[EnumUtils.GetCount(typeof(Instruction))];
  24. Add(Instruction.Add, GenerateAdd);
  25. Add(Instruction.BitwiseAnd, GenerateBitwiseAnd);
  26. Add(Instruction.BitwiseExclusiveOr, GenerateBitwiseExclusiveOr);
  27. Add(Instruction.BitwiseNot, GenerateBitwiseNot);
  28. Add(Instruction.BitwiseOr, GenerateBitwiseOr);
  29. Add(Instruction.Branch, GenerateBranch);
  30. Add(Instruction.BranchIfFalse, GenerateBranchIfFalse);
  31. Add(Instruction.BranchIfTrue, GenerateBranchIfTrue);
  32. Add(Instruction.ByteSwap, GenerateByteSwap);
  33. Add(Instruction.Call, GenerateCall);
  34. Add(Instruction.Clobber, GenerateClobber);
  35. Add(Instruction.CompareAndSwap, GenerateCompareAndSwap);
  36. Add(Instruction.CompareEqual, GenerateCompareEqual);
  37. Add(Instruction.CompareGreater, GenerateCompareGreater);
  38. Add(Instruction.CompareGreaterOrEqual, GenerateCompareGreaterOrEqual);
  39. Add(Instruction.CompareGreaterOrEqualUI, GenerateCompareGreaterOrEqualUI);
  40. Add(Instruction.CompareGreaterUI, GenerateCompareGreaterUI);
  41. Add(Instruction.CompareLess, GenerateCompareLess);
  42. Add(Instruction.CompareLessOrEqual, GenerateCompareLessOrEqual);
  43. Add(Instruction.CompareLessOrEqualUI, GenerateCompareLessOrEqualUI);
  44. Add(Instruction.CompareLessUI, GenerateCompareLessUI);
  45. Add(Instruction.CompareNotEqual, GenerateCompareNotEqual);
  46. Add(Instruction.ConditionalSelect, GenerateConditionalSelect);
  47. Add(Instruction.ConvertI64ToI32, GenerateConvertI64ToI32);
  48. Add(Instruction.ConvertToFP, GenerateConvertToFP);
  49. Add(Instruction.Copy, GenerateCopy);
  50. Add(Instruction.CountLeadingZeros, GenerateCountLeadingZeros);
  51. Add(Instruction.CpuId, GenerateCpuId);
  52. Add(Instruction.Divide, GenerateDivide);
  53. Add(Instruction.DivideUI, GenerateDivideUI);
  54. Add(Instruction.Fill, GenerateFill);
  55. Add(Instruction.Load, GenerateLoad);
  56. Add(Instruction.Load16, GenerateLoad16);
  57. Add(Instruction.Load8, GenerateLoad8);
  58. Add(Instruction.Multiply, GenerateMultiply);
  59. Add(Instruction.Multiply64HighSI, GenerateMultiply64HighSI);
  60. Add(Instruction.Multiply64HighUI, GenerateMultiply64HighUI);
  61. Add(Instruction.Negate, GenerateNegate);
  62. Add(Instruction.Return, GenerateReturn);
  63. Add(Instruction.RotateRight, GenerateRotateRight);
  64. Add(Instruction.ShiftLeft, GenerateShiftLeft);
  65. Add(Instruction.ShiftRightSI, GenerateShiftRightSI);
  66. Add(Instruction.ShiftRightUI, GenerateShiftRightUI);
  67. Add(Instruction.SignExtend16, GenerateSignExtend16);
  68. Add(Instruction.SignExtend32, GenerateSignExtend32);
  69. Add(Instruction.SignExtend8, GenerateSignExtend8);
  70. Add(Instruction.Spill, GenerateSpill);
  71. Add(Instruction.SpillArg, GenerateSpillArg);
  72. Add(Instruction.StackAlloc, GenerateStackAlloc);
  73. Add(Instruction.Store, GenerateStore);
  74. Add(Instruction.Store16, GenerateStore16);
  75. Add(Instruction.Store8, GenerateStore8);
  76. Add(Instruction.Subtract, GenerateSubtract);
  77. Add(Instruction.Tailcall, GenerateTailcall);
  78. Add(Instruction.VectorCreateScalar, GenerateVectorCreateScalar);
  79. Add(Instruction.VectorExtract, GenerateVectorExtract);
  80. Add(Instruction.VectorExtract16, GenerateVectorExtract16);
  81. Add(Instruction.VectorExtract8, GenerateVectorExtract8);
  82. Add(Instruction.VectorInsert, GenerateVectorInsert);
  83. Add(Instruction.VectorInsert16, GenerateVectorInsert16);
  84. Add(Instruction.VectorInsert8, GenerateVectorInsert8);
  85. Add(Instruction.VectorOne, GenerateVectorOne);
  86. Add(Instruction.VectorZero, GenerateVectorZero);
  87. Add(Instruction.VectorZeroUpper64, GenerateVectorZeroUpper64);
  88. Add(Instruction.VectorZeroUpper96, GenerateVectorZeroUpper96);
  89. Add(Instruction.ZeroExtend16, GenerateZeroExtend16);
  90. Add(Instruction.ZeroExtend32, GenerateZeroExtend32);
  91. Add(Instruction.ZeroExtend8, GenerateZeroExtend8);
  92. }
  93. private static void Add(Instruction inst, Action<CodeGenContext, Operation> func)
  94. {
  95. _instTable[(int)inst] = func;
  96. }
  97. public static CompiledFunction Generate(CompilerContext cctx)
  98. {
  99. ControlFlowGraph cfg = cctx.Cfg;
  100. Logger.StartPass(PassName.Optimization);
  101. if ((cctx.Options & CompilerOptions.SsaForm) != 0 &&
  102. (cctx.Options & CompilerOptions.Optimize) != 0)
  103. {
  104. Optimizer.RunPass(cfg);
  105. }
  106. X86Optimizer.RunPass(cfg);
  107. Logger.EndPass(PassName.Optimization, cfg);
  108. Logger.StartPass(PassName.PreAllocation);
  109. StackAllocator stackAlloc = new StackAllocator();
  110. PreAllocator.RunPass(cctx, stackAlloc, out int maxCallArgs);
  111. Logger.EndPass(PassName.PreAllocation, cfg);
  112. Logger.StartPass(PassName.RegisterAllocation);
  113. if ((cctx.Options & CompilerOptions.SsaForm) != 0)
  114. {
  115. Ssa.Deconstruct(cfg);
  116. }
  117. IRegisterAllocator regAlloc;
  118. if ((cctx.Options & CompilerOptions.Lsra) != 0)
  119. {
  120. regAlloc = new LinearScanAllocator();
  121. }
  122. else
  123. {
  124. regAlloc = new HybridAllocator();
  125. }
  126. RegisterMasks regMasks = new RegisterMasks(
  127. CallingConvention.GetIntAvailableRegisters(),
  128. CallingConvention.GetVecAvailableRegisters(),
  129. CallingConvention.GetIntCallerSavedRegisters(),
  130. CallingConvention.GetVecCallerSavedRegisters(),
  131. CallingConvention.GetIntCalleeSavedRegisters(),
  132. CallingConvention.GetVecCalleeSavedRegisters());
  133. AllocationResult allocResult = regAlloc.RunPass(cfg, stackAlloc, regMasks);
  134. Logger.EndPass(PassName.RegisterAllocation, cfg);
  135. Logger.StartPass(PassName.CodeGeneration);
  136. using (MemoryStream stream = new MemoryStream())
  137. {
  138. CodeGenContext context = new CodeGenContext(stream, allocResult, maxCallArgs, cfg.Blocks.Count);
  139. UnwindInfo unwindInfo = WritePrologue(context);
  140. for (BasicBlock block = cfg.Blocks.First; block != null; block = block.ListNext)
  141. {
  142. context.EnterBlock(block);
  143. for (Node node = block.Operations.First; node != null; node = node.ListNext)
  144. {
  145. if (node is Operation operation)
  146. {
  147. GenerateOperation(context, operation);
  148. }
  149. }
  150. }
  151. Logger.EndPass(PassName.CodeGeneration);
  152. return new CompiledFunction(context.GetCode(), unwindInfo);
  153. }
  154. }
  155. private static void GenerateOperation(CodeGenContext context, Operation operation)
  156. {
  157. if (operation.Instruction == Instruction.Extended)
  158. {
  159. IntrinsicOperation intrinOp = (IntrinsicOperation)operation;
  160. IntrinsicInfo info = IntrinsicTable.GetInfo(intrinOp.Intrinsic);
  161. switch (info.Type)
  162. {
  163. case IntrinsicType.Comis_:
  164. {
  165. Operand dest = operation.Destination;
  166. Operand src1 = operation.GetSource(0);
  167. Operand src2 = operation.GetSource(1);
  168. switch (intrinOp.Intrinsic)
  169. {
  170. case Intrinsic.X86Comisdeq:
  171. context.Assembler.Comisd(src1, src2);
  172. context.Assembler.Setcc(dest, X86Condition.Equal);
  173. break;
  174. case Intrinsic.X86Comisdge:
  175. context.Assembler.Comisd(src1, src2);
  176. context.Assembler.Setcc(dest, X86Condition.AboveOrEqual);
  177. break;
  178. case Intrinsic.X86Comisdlt:
  179. context.Assembler.Comisd(src1, src2);
  180. context.Assembler.Setcc(dest, X86Condition.Below);
  181. break;
  182. case Intrinsic.X86Comisseq:
  183. context.Assembler.Comiss(src1, src2);
  184. context.Assembler.Setcc(dest, X86Condition.Equal);
  185. break;
  186. case Intrinsic.X86Comissge:
  187. context.Assembler.Comiss(src1, src2);
  188. context.Assembler.Setcc(dest, X86Condition.AboveOrEqual);
  189. break;
  190. case Intrinsic.X86Comisslt:
  191. context.Assembler.Comiss(src1, src2);
  192. context.Assembler.Setcc(dest, X86Condition.Below);
  193. break;
  194. }
  195. context.Assembler.Movzx8(dest, dest, OperandType.I32);
  196. break;
  197. }
  198. case IntrinsicType.PopCount:
  199. {
  200. Operand dest = operation.Destination;
  201. Operand source = operation.GetSource(0);
  202. EnsureSameType(dest, source);
  203. Debug.Assert(dest.Type.IsInteger());
  204. context.Assembler.Popcnt(dest, source, dest.Type);
  205. break;
  206. }
  207. case IntrinsicType.Unary:
  208. {
  209. Operand dest = operation.Destination;
  210. Operand source = operation.GetSource(0);
  211. EnsureSameType(dest, source);
  212. Debug.Assert(!dest.Type.IsInteger());
  213. context.Assembler.WriteInstruction(info.Inst, dest, source);
  214. break;
  215. }
  216. case IntrinsicType.UnaryToGpr:
  217. {
  218. Operand dest = operation.Destination;
  219. Operand source = operation.GetSource(0);
  220. Debug.Assert(dest.Type.IsInteger() && !source.Type.IsInteger());
  221. if (intrinOp.Intrinsic == Intrinsic.X86Cvtsi2si)
  222. {
  223. if (dest.Type == OperandType.I32)
  224. {
  225. context.Assembler.Movd(dest, source); // int _mm_cvtsi128_si32(__m128i a)
  226. }
  227. else /* if (dest.Type == OperandType.I64) */
  228. {
  229. context.Assembler.Movq(dest, source); // __int64 _mm_cvtsi128_si64(__m128i a)
  230. }
  231. }
  232. else
  233. {
  234. context.Assembler.WriteInstruction(info.Inst, dest, source, dest.Type);
  235. }
  236. break;
  237. }
  238. case IntrinsicType.Binary:
  239. {
  240. Operand dest = operation.Destination;
  241. Operand src1 = operation.GetSource(0);
  242. Operand src2 = operation.GetSource(1);
  243. EnsureSameType(dest, src1);
  244. if (!HardwareCapabilities.SupportsVexEncoding)
  245. {
  246. EnsureSameReg(dest, src1);
  247. }
  248. Debug.Assert(!dest.Type.IsInteger());
  249. Debug.Assert(!src2.Type.IsInteger() || src2.Kind == OperandKind.Constant);
  250. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2);
  251. break;
  252. }
  253. case IntrinsicType.BinaryGpr:
  254. {
  255. Operand dest = operation.Destination;
  256. Operand src1 = operation.GetSource(0);
  257. Operand src2 = operation.GetSource(1);
  258. EnsureSameType(dest, src1);
  259. if (!HardwareCapabilities.SupportsVexEncoding)
  260. {
  261. EnsureSameReg(dest, src1);
  262. }
  263. Debug.Assert(!dest.Type.IsInteger() && src2.Type.IsInteger());
  264. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src2.Type);
  265. break;
  266. }
  267. case IntrinsicType.BinaryImm:
  268. {
  269. Operand dest = operation.Destination;
  270. Operand src1 = operation.GetSource(0);
  271. Operand src2 = operation.GetSource(1);
  272. EnsureSameType(dest, src1);
  273. if (!HardwareCapabilities.SupportsVexEncoding)
  274. {
  275. EnsureSameReg(dest, src1);
  276. }
  277. Debug.Assert(!dest.Type.IsInteger() && src2.Kind == OperandKind.Constant);
  278. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2.AsByte());
  279. break;
  280. }
  281. case IntrinsicType.Ternary:
  282. {
  283. Operand dest = operation.Destination;
  284. Operand src1 = operation.GetSource(0);
  285. Operand src2 = operation.GetSource(1);
  286. Operand src3 = operation.GetSource(2);
  287. EnsureSameType(dest, src1, src2, src3);
  288. Debug.Assert(!dest.Type.IsInteger());
  289. if (info.Inst == X86Instruction.Blendvpd && HardwareCapabilities.SupportsVexEncoding)
  290. {
  291. context.Assembler.WriteInstruction(X86Instruction.Vblendvpd, dest, src1, src2, src3);
  292. }
  293. else if (info.Inst == X86Instruction.Blendvps && HardwareCapabilities.SupportsVexEncoding)
  294. {
  295. context.Assembler.WriteInstruction(X86Instruction.Vblendvps, dest, src1, src2, src3);
  296. }
  297. else if (info.Inst == X86Instruction.Pblendvb && HardwareCapabilities.SupportsVexEncoding)
  298. {
  299. context.Assembler.WriteInstruction(X86Instruction.Vpblendvb, dest, src1, src2, src3);
  300. }
  301. else
  302. {
  303. EnsureSameReg(dest, src1);
  304. Debug.Assert(src3.GetRegister().Index == 0);
  305. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2);
  306. }
  307. break;
  308. }
  309. case IntrinsicType.TernaryImm:
  310. {
  311. Operand dest = operation.Destination;
  312. Operand src1 = operation.GetSource(0);
  313. Operand src2 = operation.GetSource(1);
  314. Operand src3 = operation.GetSource(2);
  315. EnsureSameType(dest, src1, src2);
  316. if (!HardwareCapabilities.SupportsVexEncoding)
  317. {
  318. EnsureSameReg(dest, src1);
  319. }
  320. Debug.Assert(!dest.Type.IsInteger() && src3.Kind == OperandKind.Constant);
  321. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src3.AsByte());
  322. break;
  323. }
  324. }
  325. }
  326. else
  327. {
  328. Action<CodeGenContext, Operation> func = _instTable[(int)operation.Instruction];
  329. if (func != null)
  330. {
  331. func(context, operation);
  332. }
  333. else
  334. {
  335. throw new ArgumentException($"Invalid instruction \"{operation.Instruction}\".");
  336. }
  337. }
  338. }
  339. private static void GenerateAdd(CodeGenContext context, Operation operation)
  340. {
  341. Operand dest = operation.Destination;
  342. Operand src1 = operation.GetSource(0);
  343. Operand src2 = operation.GetSource(1);
  344. ValidateBinOp(dest, src1, src2);
  345. if (dest.Type.IsInteger())
  346. {
  347. context.Assembler.Add(dest, src2, dest.Type);
  348. }
  349. else if (dest.Type == OperandType.FP32)
  350. {
  351. context.Assembler.Addss(dest, src1, src2);
  352. }
  353. else /* if (dest.Type == OperandType.FP64) */
  354. {
  355. context.Assembler.Addsd(dest, src1, src2);
  356. }
  357. }
  358. private static void GenerateBitwiseAnd(CodeGenContext context, Operation operation)
  359. {
  360. Operand dest = operation.Destination;
  361. Operand src1 = operation.GetSource(0);
  362. Operand src2 = operation.GetSource(1);
  363. ValidateBinOp(dest, src1, src2);
  364. Debug.Assert(dest.Type.IsInteger());
  365. context.Assembler.And(dest, src2, dest.Type);
  366. }
  367. private static void GenerateBitwiseExclusiveOr(CodeGenContext context, Operation operation)
  368. {
  369. Operand dest = operation.Destination;
  370. Operand src1 = operation.GetSource(0);
  371. Operand src2 = operation.GetSource(1);
  372. ValidateBinOp(dest, src1, src2);
  373. if (dest.Type.IsInteger())
  374. {
  375. context.Assembler.Xor(dest, src2, dest.Type);
  376. }
  377. else
  378. {
  379. context.Assembler.Xorps(dest, src1, src2);
  380. }
  381. }
  382. private static void GenerateBitwiseNot(CodeGenContext context, Operation operation)
  383. {
  384. Operand dest = operation.Destination;
  385. Operand source = operation.GetSource(0);
  386. ValidateUnOp(dest, source);
  387. Debug.Assert(dest.Type.IsInteger());
  388. context.Assembler.Not(dest);
  389. }
  390. private static void GenerateBitwiseOr(CodeGenContext context, Operation operation)
  391. {
  392. Operand dest = operation.Destination;
  393. Operand src1 = operation.GetSource(0);
  394. Operand src2 = operation.GetSource(1);
  395. ValidateBinOp(dest, src1, src2);
  396. Debug.Assert(dest.Type.IsInteger());
  397. context.Assembler.Or(dest, src2, dest.Type);
  398. }
  399. private static void GenerateBranch(CodeGenContext context, Operation operation)
  400. {
  401. context.JumpTo(context.CurrBlock.Branch);
  402. }
  403. private static void GenerateBranchIfFalse(CodeGenContext context, Operation operation)
  404. {
  405. Operand source = operation.GetSource(0);
  406. context.Assembler.Test(source, source, source.Type);
  407. context.JumpTo(X86Condition.Equal, context.CurrBlock.Branch);
  408. }
  409. private static void GenerateBranchIfTrue(CodeGenContext context, Operation operation)
  410. {
  411. Operand source = operation.GetSource(0);
  412. context.Assembler.Test(source, source, source.Type);
  413. context.JumpTo(X86Condition.NotEqual, context.CurrBlock.Branch);
  414. }
  415. private static void GenerateByteSwap(CodeGenContext context, Operation operation)
  416. {
  417. Operand dest = operation.Destination;
  418. Operand source = operation.GetSource(0);
  419. ValidateUnOp(dest, source);
  420. Debug.Assert(dest.Type.IsInteger());
  421. context.Assembler.Bswap(dest);
  422. }
  423. private static void GenerateCall(CodeGenContext context, Operation operation)
  424. {
  425. context.Assembler.Call(operation.GetSource(0));
  426. }
  427. private static void GenerateClobber(CodeGenContext context, Operation operation)
  428. {
  429. // This is only used to indicate that a register is clobbered to the
  430. // register allocator, we don't need to produce any code.
  431. }
  432. private static void GenerateCompareAndSwap(CodeGenContext context, Operation operation)
  433. {
  434. Operand src1 = operation.GetSource(0);
  435. if (operation.SourcesCount == 5) // CompareAndSwap128 has 5 sources, compared to CompareAndSwap64/32's 3.
  436. {
  437. MemoryOperand memOp = MemoryOp(OperandType.I64, src1);
  438. context.Assembler.Cmpxchg16b(memOp);
  439. }
  440. else
  441. {
  442. Operand src2 = operation.GetSource(1);
  443. Operand src3 = operation.GetSource(2);
  444. EnsureSameType(src2, src3);
  445. MemoryOperand memOp = MemoryOp(src3.Type, src1);
  446. context.Assembler.Cmpxchg(memOp, src3);
  447. }
  448. }
  449. private static void GenerateCompareEqual(CodeGenContext context, Operation operation)
  450. {
  451. GenerateCompare(context, operation, X86Condition.Equal);
  452. }
  453. private static void GenerateCompareGreater(CodeGenContext context, Operation operation)
  454. {
  455. GenerateCompare(context, operation, X86Condition.Greater);
  456. }
  457. private static void GenerateCompareGreaterOrEqual(CodeGenContext context, Operation operation)
  458. {
  459. GenerateCompare(context, operation, X86Condition.GreaterOrEqual);
  460. }
  461. private static void GenerateCompareGreaterOrEqualUI(CodeGenContext context, Operation operation)
  462. {
  463. GenerateCompare(context, operation, X86Condition.AboveOrEqual);
  464. }
  465. private static void GenerateCompareGreaterUI(CodeGenContext context, Operation operation)
  466. {
  467. GenerateCompare(context, operation, X86Condition.Above);
  468. }
  469. private static void GenerateCompareLess(CodeGenContext context, Operation operation)
  470. {
  471. GenerateCompare(context, operation, X86Condition.Less);
  472. }
  473. private static void GenerateCompareLessOrEqual(CodeGenContext context, Operation operation)
  474. {
  475. GenerateCompare(context, operation, X86Condition.LessOrEqual);
  476. }
  477. private static void GenerateCompareLessOrEqualUI(CodeGenContext context, Operation operation)
  478. {
  479. GenerateCompare(context, operation, X86Condition.BelowOrEqual);
  480. }
  481. private static void GenerateCompareLessUI(CodeGenContext context, Operation operation)
  482. {
  483. GenerateCompare(context, operation, X86Condition.Below);
  484. }
  485. private static void GenerateCompareNotEqual(CodeGenContext context, Operation operation)
  486. {
  487. GenerateCompare(context, operation, X86Condition.NotEqual);
  488. }
  489. private static void GenerateCompare(CodeGenContext context, Operation operation, X86Condition condition)
  490. {
  491. Operand dest = operation.Destination;
  492. Operand src1 = operation.GetSource(0);
  493. Operand src2 = operation.GetSource(1);
  494. EnsureSameType(src1, src2);
  495. Debug.Assert(dest.Type == OperandType.I32);
  496. context.Assembler.Cmp(src1, src2, src1.Type);
  497. context.Assembler.Setcc(dest, condition);
  498. context.Assembler.Movzx8(dest, dest, OperandType.I32);
  499. }
  500. private static void GenerateConditionalSelect(CodeGenContext context, Operation operation)
  501. {
  502. Operand dest = operation.Destination;
  503. Operand src1 = operation.GetSource(0);
  504. Operand src2 = operation.GetSource(1);
  505. Operand src3 = operation.GetSource(2);
  506. EnsureSameReg (dest, src3);
  507. EnsureSameType(dest, src2, src3);
  508. Debug.Assert(dest.Type.IsInteger());
  509. Debug.Assert(src1.Type == OperandType.I32);
  510. context.Assembler.Test (src1, src1, src1.Type);
  511. context.Assembler.Cmovcc(dest, src2, dest.Type, X86Condition.NotEqual);
  512. }
  513. private static void GenerateConvertI64ToI32(CodeGenContext context, Operation operation)
  514. {
  515. Operand dest = operation.Destination;
  516. Operand source = operation.GetSource(0);
  517. Debug.Assert(dest.Type == OperandType.I32 && source.Type == OperandType.I64);
  518. context.Assembler.Mov(dest, source, OperandType.I32);
  519. }
  520. private static void GenerateConvertToFP(CodeGenContext context, Operation operation)
  521. {
  522. Operand dest = operation.Destination;
  523. Operand source = operation.GetSource(0);
  524. Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);
  525. if (dest.Type == OperandType.FP32)
  526. {
  527. Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP64);
  528. if (source.Type.IsInteger())
  529. {
  530. context.Assembler.Xorps (dest, dest, dest);
  531. context.Assembler.Cvtsi2ss(dest, dest, source, source.Type);
  532. }
  533. else /* if (source.Type == OperandType.FP64) */
  534. {
  535. context.Assembler.Cvtsd2ss(dest, dest, source);
  536. GenerateZeroUpper96(context, dest, dest);
  537. }
  538. }
  539. else /* if (dest.Type == OperandType.FP64) */
  540. {
  541. Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP32);
  542. if (source.Type.IsInteger())
  543. {
  544. context.Assembler.Xorps (dest, dest, dest);
  545. context.Assembler.Cvtsi2sd(dest, dest, source, source.Type);
  546. }
  547. else /* if (source.Type == OperandType.FP32) */
  548. {
  549. context.Assembler.Cvtss2sd(dest, dest, source);
  550. GenerateZeroUpper64(context, dest, dest);
  551. }
  552. }
  553. }
  554. private static void GenerateCopy(CodeGenContext context, Operation operation)
  555. {
  556. Operand dest = operation.Destination;
  557. Operand source = operation.GetSource(0);
  558. EnsureSameType(dest, source);
  559. Debug.Assert(dest.Type.IsInteger() || source.Kind != OperandKind.Constant);
  560. // Moves to the same register are useless.
  561. if (dest.Kind == source.Kind && dest.Value == source.Value)
  562. {
  563. return;
  564. }
  565. if (dest.Kind == OperandKind.Register &&
  566. source.Kind == OperandKind.Constant && source.Value == 0)
  567. {
  568. // Assemble "mov reg, 0" as "xor reg, reg" as the later is more efficient.
  569. context.Assembler.Xor(dest, dest, OperandType.I32);
  570. }
  571. else if (dest.Type.IsInteger())
  572. {
  573. context.Assembler.Mov(dest, source, dest.Type);
  574. }
  575. else
  576. {
  577. context.Assembler.Movdqu(dest, source);
  578. }
  579. }
  580. private static void GenerateCountLeadingZeros(CodeGenContext context, Operation operation)
  581. {
  582. Operand dest = operation.Destination;
  583. Operand source = operation.GetSource(0);
  584. EnsureSameType(dest, source);
  585. Debug.Assert(dest.Type.IsInteger());
  586. context.Assembler.Bsr(dest, source, dest.Type);
  587. int operandSize = dest.Type == OperandType.I32 ? 32 : 64;
  588. int operandMask = operandSize - 1;
  589. // When the input operand is 0, the result is undefined, however the
  590. // ZF flag is set. We are supposed to return the operand size on that
  591. // case. So, add an additional jump to handle that case, by moving the
  592. // operand size constant to the destination register.
  593. context.JumpToNear(X86Condition.NotEqual);
  594. context.Assembler.Mov(dest, Const(operandSize | operandMask), OperandType.I32);
  595. context.JumpHere();
  596. // BSR returns the zero based index of the last bit set on the operand,
  597. // starting from the least significant bit. However we are supposed to
  598. // return the number of 0 bits on the high end. So, we invert the result
  599. // of the BSR using XOR to get the correct value.
  600. context.Assembler.Xor(dest, Const(operandMask), OperandType.I32);
  601. }
  602. private static void GenerateCpuId(CodeGenContext context, Operation operation)
  603. {
  604. context.Assembler.Cpuid();
  605. }
  606. private static void GenerateDivide(CodeGenContext context, Operation operation)
  607. {
  608. Operand dest = operation.Destination;
  609. Operand dividend = operation.GetSource(0);
  610. Operand divisor = operation.GetSource(1);
  611. if (!dest.Type.IsInteger())
  612. {
  613. ValidateBinOp(dest, dividend, divisor);
  614. }
  615. if (dest.Type.IsInteger())
  616. {
  617. divisor = operation.GetSource(2);
  618. EnsureSameType(dest, divisor);
  619. if (divisor.Type == OperandType.I32)
  620. {
  621. context.Assembler.Cdq();
  622. }
  623. else
  624. {
  625. context.Assembler.Cqo();
  626. }
  627. context.Assembler.Idiv(divisor);
  628. }
  629. else if (dest.Type == OperandType.FP32)
  630. {
  631. context.Assembler.Divss(dest, dividend, divisor);
  632. }
  633. else /* if (dest.Type == OperandType.FP64) */
  634. {
  635. context.Assembler.Divsd(dest, dividend, divisor);
  636. }
  637. }
  638. private static void GenerateDivideUI(CodeGenContext context, Operation operation)
  639. {
  640. Operand divisor = operation.GetSource(2);
  641. Operand rdx = Register(X86Register.Rdx);
  642. Debug.Assert(divisor.Type.IsInteger());
  643. context.Assembler.Xor(rdx, rdx, OperandType.I32);
  644. context.Assembler.Div(divisor);
  645. }
  646. private static void GenerateFill(CodeGenContext context, Operation operation)
  647. {
  648. Operand dest = operation.Destination;
  649. Operand offset = operation.GetSource(0);
  650. Debug.Assert(offset.Kind == OperandKind.Constant);
  651. int offs = offset.AsInt32() + context.CallArgsRegionSize;
  652. Operand rsp = Register(X86Register.Rsp);
  653. MemoryOperand memOp = MemoryOp(dest.Type, rsp, null, Multiplier.x1, offs);
  654. GenerateLoad(context, memOp, dest);
  655. }
  656. private static void GenerateLoad(CodeGenContext context, Operation operation)
  657. {
  658. Operand value = operation.Destination;
  659. Operand address = Memory(operation.GetSource(0), value.Type);
  660. GenerateLoad(context, address, value);
  661. }
  662. private static void GenerateLoad16(CodeGenContext context, Operation operation)
  663. {
  664. Operand value = operation.Destination;
  665. Operand address = Memory(operation.GetSource(0), value.Type);
  666. Debug.Assert(value.Type.IsInteger());
  667. context.Assembler.Movzx16(value, address, value.Type);
  668. }
  669. private static void GenerateLoad8(CodeGenContext context, Operation operation)
  670. {
  671. Operand value = operation.Destination;
  672. Operand address = Memory(operation.GetSource(0), value.Type);
  673. Debug.Assert(value.Type.IsInteger());
  674. context.Assembler.Movzx8(value, address, value.Type);
  675. }
  676. private static void GenerateMultiply(CodeGenContext context, Operation operation)
  677. {
  678. Operand dest = operation.Destination;
  679. Operand src1 = operation.GetSource(0);
  680. Operand src2 = operation.GetSource(1);
  681. if (src2.Kind != OperandKind.Constant)
  682. {
  683. EnsureSameReg(dest, src1);
  684. }
  685. EnsureSameType(dest, src1, src2);
  686. if (dest.Type.IsInteger())
  687. {
  688. if (src2.Kind == OperandKind.Constant)
  689. {
  690. context.Assembler.Imul(dest, src1, src2, dest.Type);
  691. }
  692. else
  693. {
  694. context.Assembler.Imul(dest, src2, dest.Type);
  695. }
  696. }
  697. else if (dest.Type == OperandType.FP32)
  698. {
  699. context.Assembler.Mulss(dest, src1, src2);
  700. }
  701. else /* if (dest.Type == OperandType.FP64) */
  702. {
  703. context.Assembler.Mulsd(dest, src1, src2);
  704. }
  705. }
  706. private static void GenerateMultiply64HighSI(CodeGenContext context, Operation operation)
  707. {
  708. Operand source = operation.GetSource(1);
  709. Debug.Assert(source.Type == OperandType.I64);
  710. context.Assembler.Imul(source);
  711. }
  712. private static void GenerateMultiply64HighUI(CodeGenContext context, Operation operation)
  713. {
  714. Operand source = operation.GetSource(1);
  715. Debug.Assert(source.Type == OperandType.I64);
  716. context.Assembler.Mul(source);
  717. }
  718. private static void GenerateNegate(CodeGenContext context, Operation operation)
  719. {
  720. Operand dest = operation.Destination;
  721. Operand source = operation.GetSource(0);
  722. ValidateUnOp(dest, source);
  723. Debug.Assert(dest.Type.IsInteger());
  724. context.Assembler.Neg(dest);
  725. }
  726. private static void GenerateReturn(CodeGenContext context, Operation operation)
  727. {
  728. WriteEpilogue(context);
  729. context.Assembler.Return();
  730. }
  731. private static void GenerateRotateRight(CodeGenContext context, Operation operation)
  732. {
  733. Operand dest = operation.Destination;
  734. Operand src1 = operation.GetSource(0);
  735. Operand src2 = operation.GetSource(1);
  736. ValidateShift(dest, src1, src2);
  737. context.Assembler.Ror(dest, src2, dest.Type);
  738. }
  739. private static void GenerateShiftLeft(CodeGenContext context, Operation operation)
  740. {
  741. Operand dest = operation.Destination;
  742. Operand src1 = operation.GetSource(0);
  743. Operand src2 = operation.GetSource(1);
  744. ValidateShift(dest, src1, src2);
  745. context.Assembler.Shl(dest, src2, dest.Type);
  746. }
  747. private static void GenerateShiftRightSI(CodeGenContext context, Operation operation)
  748. {
  749. Operand dest = operation.Destination;
  750. Operand src1 = operation.GetSource(0);
  751. Operand src2 = operation.GetSource(1);
  752. ValidateShift(dest, src1, src2);
  753. context.Assembler.Sar(dest, src2, dest.Type);
  754. }
  755. private static void GenerateShiftRightUI(CodeGenContext context, Operation operation)
  756. {
  757. Operand dest = operation.Destination;
  758. Operand src1 = operation.GetSource(0);
  759. Operand src2 = operation.GetSource(1);
  760. ValidateShift(dest, src1, src2);
  761. context.Assembler.Shr(dest, src2, dest.Type);
  762. }
  763. private static void GenerateSignExtend16(CodeGenContext context, Operation operation)
  764. {
  765. Operand dest = operation.Destination;
  766. Operand source = operation.GetSource(0);
  767. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  768. context.Assembler.Movsx16(dest, source, dest.Type);
  769. }
  770. private static void GenerateSignExtend32(CodeGenContext context, Operation operation)
  771. {
  772. Operand dest = operation.Destination;
  773. Operand source = operation.GetSource(0);
  774. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  775. context.Assembler.Movsx32(dest, source, dest.Type);
  776. }
  777. private static void GenerateSignExtend8(CodeGenContext context, Operation operation)
  778. {
  779. Operand dest = operation.Destination;
  780. Operand source = operation.GetSource(0);
  781. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  782. context.Assembler.Movsx8(dest, source, dest.Type);
  783. }
  784. private static void GenerateSpill(CodeGenContext context, Operation operation)
  785. {
  786. GenerateSpill(context, operation, context.CallArgsRegionSize);
  787. }
  788. private static void GenerateSpillArg(CodeGenContext context, Operation operation)
  789. {
  790. GenerateSpill(context, operation, 0);
  791. }
  792. private static void GenerateSpill(CodeGenContext context, Operation operation, int baseOffset)
  793. {
  794. Operand offset = operation.GetSource(0);
  795. Operand source = operation.GetSource(1);
  796. Debug.Assert(offset.Kind == OperandKind.Constant);
  797. int offs = offset.AsInt32() + baseOffset;
  798. Operand rsp = Register(X86Register.Rsp);
  799. MemoryOperand memOp = MemoryOp(source.Type, rsp, null, Multiplier.x1, offs);
  800. GenerateStore(context, memOp, source);
  801. }
  802. private static void GenerateStackAlloc(CodeGenContext context, Operation operation)
  803. {
  804. Operand dest = operation.Destination;
  805. Operand offset = operation.GetSource(0);
  806. Debug.Assert(offset.Kind == OperandKind.Constant);
  807. int offs = offset.AsInt32() + context.CallArgsRegionSize;
  808. Operand rsp = Register(X86Register.Rsp);
  809. MemoryOperand memOp = MemoryOp(OperandType.I64, rsp, null, Multiplier.x1, offs);
  810. context.Assembler.Lea(dest, memOp, OperandType.I64);
  811. }
  812. private static void GenerateStore(CodeGenContext context, Operation operation)
  813. {
  814. Operand value = operation.GetSource(1);
  815. Operand address = Memory(operation.GetSource(0), value.Type);
  816. GenerateStore(context, address, value);
  817. }
  818. private static void GenerateStore16(CodeGenContext context, Operation operation)
  819. {
  820. Operand value = operation.GetSource(1);
  821. Operand address = Memory(operation.GetSource(0), value.Type);
  822. Debug.Assert(value.Type.IsInteger());
  823. context.Assembler.Mov16(address, value);
  824. }
  825. private static void GenerateStore8(CodeGenContext context, Operation operation)
  826. {
  827. Operand value = operation.GetSource(1);
  828. Operand address = Memory(operation.GetSource(0), value.Type);
  829. Debug.Assert(value.Type.IsInteger());
  830. context.Assembler.Mov8(address, value);
  831. }
  832. private static void GenerateSubtract(CodeGenContext context, Operation operation)
  833. {
  834. Operand dest = operation.Destination;
  835. Operand src1 = operation.GetSource(0);
  836. Operand src2 = operation.GetSource(1);
  837. ValidateBinOp(dest, src1, src2);
  838. if (dest.Type.IsInteger())
  839. {
  840. context.Assembler.Sub(dest, src2, dest.Type);
  841. }
  842. else if (dest.Type == OperandType.FP32)
  843. {
  844. context.Assembler.Subss(dest, src1, src2);
  845. }
  846. else /* if (dest.Type == OperandType.FP64) */
  847. {
  848. context.Assembler.Subsd(dest, src1, src2);
  849. }
  850. }
  851. private static void GenerateTailcall(CodeGenContext context, Operation operation)
  852. {
  853. WriteEpilogue(context);
  854. context.Assembler.Jmp(operation.GetSource(0));
  855. }
  856. private static void GenerateVectorCreateScalar(CodeGenContext context, Operation operation)
  857. {
  858. Operand dest = operation.Destination;
  859. Operand source = operation.GetSource(0);
  860. Debug.Assert(!dest.Type.IsInteger() && source.Type.IsInteger());
  861. if (source.Type == OperandType.I32)
  862. {
  863. context.Assembler.Movd(dest, source); // (__m128i _mm_cvtsi32_si128(int a))
  864. }
  865. else /* if (source.Type == OperandType.I64) */
  866. {
  867. context.Assembler.Movq(dest, source); // (__m128i _mm_cvtsi64_si128(__int64 a))
  868. }
  869. }
  870. private static void GenerateVectorExtract(CodeGenContext context, Operation operation)
  871. {
  872. Operand dest = operation.Destination; //Value
  873. Operand src1 = operation.GetSource(0); //Vector
  874. Operand src2 = operation.GetSource(1); //Index
  875. Debug.Assert(src1.Type == OperandType.V128);
  876. Debug.Assert(src2.Kind == OperandKind.Constant);
  877. byte index = src2.AsByte();
  878. if (dest.Type == OperandType.I32)
  879. {
  880. Debug.Assert(index < 4);
  881. if (HardwareCapabilities.SupportsSse41)
  882. {
  883. context.Assembler.Pextrd(dest, src1, index);
  884. }
  885. else
  886. {
  887. if (index != 0)
  888. {
  889. int mask0 = 0b11_10_01_00;
  890. int mask1 = 0b11_10_01_00;
  891. mask0 = BitUtils.RotateRight(mask0, index * 2, 8);
  892. mask1 = BitUtils.RotateRight(mask1, 8 - index * 2, 8);
  893. context.Assembler.Pshufd(src1, src1, (byte)mask0);
  894. context.Assembler.Movd (dest, src1);
  895. context.Assembler.Pshufd(src1, src1, (byte)mask1);
  896. }
  897. else
  898. {
  899. context.Assembler.Movd(dest, src1);
  900. }
  901. }
  902. }
  903. else if (dest.Type == OperandType.I64)
  904. {
  905. Debug.Assert(index < 2);
  906. if (HardwareCapabilities.SupportsSse41)
  907. {
  908. context.Assembler.Pextrq(dest, src1, index);
  909. }
  910. else
  911. {
  912. if (index != 0)
  913. {
  914. const byte mask = 0b01_00_11_10;
  915. context.Assembler.Pshufd(src1, src1, mask);
  916. context.Assembler.Movq (dest, src1);
  917. context.Assembler.Pshufd(src1, src1, mask);
  918. }
  919. else
  920. {
  921. context.Assembler.Movq(dest, src1);
  922. }
  923. }
  924. }
  925. else
  926. {
  927. Debug.Assert(index < (dest.Type == OperandType.FP32 ? 4 : 2));
  928. // Floating-point types.
  929. if ((index >= 2 && dest.Type == OperandType.FP32) ||
  930. (index == 1 && dest.Type == OperandType.FP64))
  931. {
  932. context.Assembler.Movhlps(dest, dest, src1);
  933. context.Assembler.Movq (dest, dest);
  934. }
  935. else
  936. {
  937. context.Assembler.Movq(dest, src1);
  938. }
  939. if (dest.Type == OperandType.FP32)
  940. {
  941. context.Assembler.Pshufd(dest, dest, (byte)(0xfc | (index & 1)));
  942. }
  943. }
  944. }
  945. private static void GenerateVectorExtract16(CodeGenContext context, Operation operation)
  946. {
  947. Operand dest = operation.Destination; //Value
  948. Operand src1 = operation.GetSource(0); //Vector
  949. Operand src2 = operation.GetSource(1); //Index
  950. Debug.Assert(src1.Type == OperandType.V128);
  951. Debug.Assert(src2.Kind == OperandKind.Constant);
  952. byte index = src2.AsByte();
  953. Debug.Assert(index < 8);
  954. context.Assembler.Pextrw(dest, src1, index);
  955. }
  956. private static void GenerateVectorExtract8(CodeGenContext context, Operation operation)
  957. {
  958. Operand dest = operation.Destination; //Value
  959. Operand src1 = operation.GetSource(0); //Vector
  960. Operand src2 = operation.GetSource(1); //Index
  961. Debug.Assert(src1.Type == OperandType.V128);
  962. Debug.Assert(src2.Kind == OperandKind.Constant);
  963. byte index = src2.AsByte();
  964. Debug.Assert(index < 16);
  965. if (HardwareCapabilities.SupportsSse41)
  966. {
  967. context.Assembler.Pextrb(dest, src1, index);
  968. }
  969. else
  970. {
  971. context.Assembler.Pextrw(dest, src1, (byte)(index >> 1));
  972. if ((index & 1) != 0)
  973. {
  974. context.Assembler.Shr(dest, Const(8), OperandType.I32);
  975. }
  976. else
  977. {
  978. context.Assembler.Movzx8(dest, dest, OperandType.I32);
  979. }
  980. }
  981. }
  982. private static void GenerateVectorInsert(CodeGenContext context, Operation operation)
  983. {
  984. Operand dest = operation.Destination;
  985. Operand src1 = operation.GetSource(0); //Vector
  986. Operand src2 = operation.GetSource(1); //Value
  987. Operand src3 = operation.GetSource(2); //Index
  988. if (!HardwareCapabilities.SupportsVexEncoding)
  989. {
  990. EnsureSameReg(dest, src1);
  991. }
  992. Debug.Assert(src1.Type == OperandType.V128);
  993. Debug.Assert(src3.Kind == OperandKind.Constant);
  994. byte index = src3.AsByte();
  995. void InsertIntSse2(int words)
  996. {
  997. if (dest.GetRegister() != src1.GetRegister())
  998. {
  999. context.Assembler.Movdqu(dest, src1);
  1000. }
  1001. for (int word = 0; word < words; word++)
  1002. {
  1003. // Insert lower 16-bits.
  1004. context.Assembler.Pinsrw(dest, dest, src2, (byte)(index * words + word));
  1005. // Move next word down.
  1006. context.Assembler.Ror(src2, Const(16), src2.Type);
  1007. }
  1008. }
  1009. if (src2.Type == OperandType.I32)
  1010. {
  1011. Debug.Assert(index < 4);
  1012. if (HardwareCapabilities.SupportsSse41)
  1013. {
  1014. context.Assembler.Pinsrd(dest, src1, src2, index);
  1015. }
  1016. else
  1017. {
  1018. InsertIntSse2(2);
  1019. }
  1020. }
  1021. else if (src2.Type == OperandType.I64)
  1022. {
  1023. Debug.Assert(index < 2);
  1024. if (HardwareCapabilities.SupportsSse41)
  1025. {
  1026. context.Assembler.Pinsrq(dest, src1, src2, index);
  1027. }
  1028. else
  1029. {
  1030. InsertIntSse2(4);
  1031. }
  1032. }
  1033. else if (src2.Type == OperandType.FP32)
  1034. {
  1035. Debug.Assert(index < 4);
  1036. if (index != 0)
  1037. {
  1038. if (HardwareCapabilities.SupportsSse41)
  1039. {
  1040. context.Assembler.Insertps(dest, src1, src2, (byte)(index << 4));
  1041. }
  1042. else
  1043. {
  1044. if (src1.GetRegister() == src2.GetRegister())
  1045. {
  1046. int mask = 0b11_10_01_00;
  1047. mask &= ~(0b11 << index * 2);
  1048. context.Assembler.Pshufd(dest, src1, (byte)mask);
  1049. }
  1050. else
  1051. {
  1052. int mask0 = 0b11_10_01_00;
  1053. int mask1 = 0b11_10_01_00;
  1054. mask0 = BitUtils.RotateRight(mask0, index * 2, 8);
  1055. mask1 = BitUtils.RotateRight(mask1, 8 - index * 2, 8);
  1056. context.Assembler.Pshufd(src1, src1, (byte)mask0); // Lane to be inserted in position 0.
  1057. context.Assembler.Movss (dest, src1, src2); // dest[127:0] = src1[127:32] | src2[31:0]
  1058. context.Assembler.Pshufd(dest, dest, (byte)mask1); // Inserted lane in original position.
  1059. if (dest.GetRegister() != src1.GetRegister())
  1060. {
  1061. context.Assembler.Pshufd(src1, src1, (byte)mask1); // Restore src1.
  1062. }
  1063. }
  1064. }
  1065. }
  1066. else
  1067. {
  1068. context.Assembler.Movss(dest, src1, src2);
  1069. }
  1070. }
  1071. else /* if (src2.Type == OperandType.FP64) */
  1072. {
  1073. Debug.Assert(index < 2);
  1074. if (index != 0)
  1075. {
  1076. context.Assembler.Movlhps(dest, src1, src2);
  1077. }
  1078. else
  1079. {
  1080. context.Assembler.Movsd(dest, src1, src2);
  1081. }
  1082. }
  1083. }
  1084. private static void GenerateVectorInsert16(CodeGenContext context, Operation operation)
  1085. {
  1086. Operand dest = operation.Destination;
  1087. Operand src1 = operation.GetSource(0); //Vector
  1088. Operand src2 = operation.GetSource(1); //Value
  1089. Operand src3 = operation.GetSource(2); //Index
  1090. if (!HardwareCapabilities.SupportsVexEncoding)
  1091. {
  1092. EnsureSameReg(dest, src1);
  1093. }
  1094. Debug.Assert(src1.Type == OperandType.V128);
  1095. Debug.Assert(src3.Kind == OperandKind.Constant);
  1096. byte index = src3.AsByte();
  1097. context.Assembler.Pinsrw(dest, src1, src2, index);
  1098. }
  1099. private static void GenerateVectorInsert8(CodeGenContext context, Operation operation)
  1100. {
  1101. Operand dest = operation.Destination;
  1102. Operand src1 = operation.GetSource(0); //Vector
  1103. Operand src2 = operation.GetSource(1); //Value
  1104. Operand src3 = operation.GetSource(2); //Index
  1105. // It's not possible to emulate this instruction without
  1106. // SSE 4.1 support without the use of a temporary register,
  1107. // so we instead handle that case on the pre-allocator when
  1108. // SSE 4.1 is not supported on the CPU.
  1109. Debug.Assert(HardwareCapabilities.SupportsSse41);
  1110. if (!HardwareCapabilities.SupportsVexEncoding)
  1111. {
  1112. EnsureSameReg(dest, src1);
  1113. }
  1114. Debug.Assert(src1.Type == OperandType.V128);
  1115. Debug.Assert(src3.Kind == OperandKind.Constant);
  1116. byte index = src3.AsByte();
  1117. context.Assembler.Pinsrb(dest, src1, src2, index);
  1118. }
  1119. private static void GenerateVectorOne(CodeGenContext context, Operation operation)
  1120. {
  1121. Operand dest = operation.Destination;
  1122. Debug.Assert(!dest.Type.IsInteger());
  1123. context.Assembler.Pcmpeqw(dest, dest, dest);
  1124. }
  1125. private static void GenerateVectorZero(CodeGenContext context, Operation operation)
  1126. {
  1127. Operand dest = operation.Destination;
  1128. Debug.Assert(!dest.Type.IsInteger());
  1129. context.Assembler.Xorps(dest, dest, dest);
  1130. }
  1131. private static void GenerateVectorZeroUpper64(CodeGenContext context, Operation operation)
  1132. {
  1133. Operand dest = operation.Destination;
  1134. Operand source = operation.GetSource(0);
  1135. Debug.Assert(dest.Type == OperandType.V128 && source.Type == OperandType.V128);
  1136. GenerateZeroUpper64(context, dest, source);
  1137. }
  1138. private static void GenerateVectorZeroUpper96(CodeGenContext context, Operation operation)
  1139. {
  1140. Operand dest = operation.Destination;
  1141. Operand source = operation.GetSource(0);
  1142. Debug.Assert(dest.Type == OperandType.V128 && source.Type == OperandType.V128);
  1143. GenerateZeroUpper96(context, dest, source);
  1144. }
  1145. private static void GenerateZeroExtend16(CodeGenContext context, Operation operation)
  1146. {
  1147. Operand dest = operation.Destination;
  1148. Operand source = operation.GetSource(0);
  1149. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  1150. context.Assembler.Movzx16(dest, source, OperandType.I32);
  1151. }
  1152. private static void GenerateZeroExtend32(CodeGenContext context, Operation operation)
  1153. {
  1154. Operand dest = operation.Destination;
  1155. Operand source = operation.GetSource(0);
  1156. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  1157. context.Assembler.Mov(dest, source, OperandType.I32);
  1158. }
  1159. private static void GenerateZeroExtend8(CodeGenContext context, Operation operation)
  1160. {
  1161. Operand dest = operation.Destination;
  1162. Operand source = operation.GetSource(0);
  1163. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  1164. context.Assembler.Movzx8(dest, source, OperandType.I32);
  1165. }
  1166. private static void GenerateLoad(CodeGenContext context, Operand address, Operand value)
  1167. {
  1168. switch (value.Type)
  1169. {
  1170. case OperandType.I32: context.Assembler.Mov (value, address, OperandType.I32); break;
  1171. case OperandType.I64: context.Assembler.Mov (value, address, OperandType.I64); break;
  1172. case OperandType.FP32: context.Assembler.Movd (value, address); break;
  1173. case OperandType.FP64: context.Assembler.Movq (value, address); break;
  1174. case OperandType.V128: context.Assembler.Movdqu(value, address); break;
  1175. default: Debug.Assert(false); break;
  1176. }
  1177. }
  1178. private static void GenerateStore(CodeGenContext context, Operand address, Operand value)
  1179. {
  1180. switch (value.Type)
  1181. {
  1182. case OperandType.I32: context.Assembler.Mov (address, value, OperandType.I32); break;
  1183. case OperandType.I64: context.Assembler.Mov (address, value, OperandType.I64); break;
  1184. case OperandType.FP32: context.Assembler.Movd (address, value); break;
  1185. case OperandType.FP64: context.Assembler.Movq (address, value); break;
  1186. case OperandType.V128: context.Assembler.Movdqu(address, value); break;
  1187. default: Debug.Assert(false); break;
  1188. }
  1189. }
  1190. private static void GenerateZeroUpper64(CodeGenContext context, Operand dest, Operand source)
  1191. {
  1192. context.Assembler.Movq(dest, source);
  1193. }
  1194. private static void GenerateZeroUpper96(CodeGenContext context, Operand dest, Operand source)
  1195. {
  1196. context.Assembler.Movq(dest, source);
  1197. context.Assembler.Pshufd(dest, dest, 0xfc);
  1198. }
  1199. private static void ValidateUnOp(Operand dest, Operand source)
  1200. {
  1201. #if DEBUG
  1202. EnsureSameReg (dest, source);
  1203. EnsureSameType(dest, source);
  1204. #endif
  1205. }
  1206. private static void ValidateBinOp(Operand dest, Operand src1, Operand src2)
  1207. {
  1208. #if DEBUG
  1209. EnsureSameReg (dest, src1);
  1210. EnsureSameType(dest, src1, src2);
  1211. #endif
  1212. }
  1213. private static void ValidateShift(Operand dest, Operand src1, Operand src2)
  1214. {
  1215. #if DEBUG
  1216. EnsureSameReg (dest, src1);
  1217. EnsureSameType(dest, src1);
  1218. Debug.Assert(dest.Type.IsInteger() && src2.Type == OperandType.I32);
  1219. #endif
  1220. }
  1221. private static void EnsureSameReg(Operand op1, Operand op2)
  1222. {
  1223. if (!op1.Type.IsInteger() && HardwareCapabilities.SupportsVexEncoding)
  1224. {
  1225. return;
  1226. }
  1227. Debug.Assert(op1.Kind == OperandKind.Register || op1.Kind == OperandKind.Memory);
  1228. Debug.Assert(op1.Kind == op2.Kind);
  1229. Debug.Assert(op1.Value == op2.Value);
  1230. }
  1231. private static void EnsureSameType(Operand op1, Operand op2)
  1232. {
  1233. Debug.Assert(op1.Type == op2.Type);
  1234. }
  1235. private static void EnsureSameType(Operand op1, Operand op2, Operand op3)
  1236. {
  1237. Debug.Assert(op1.Type == op2.Type);
  1238. Debug.Assert(op1.Type == op3.Type);
  1239. }
  1240. private static void EnsureSameType(Operand op1, Operand op2, Operand op3, Operand op4)
  1241. {
  1242. Debug.Assert(op1.Type == op2.Type);
  1243. Debug.Assert(op1.Type == op3.Type);
  1244. Debug.Assert(op1.Type == op4.Type);
  1245. }
  1246. private static UnwindInfo WritePrologue(CodeGenContext context)
  1247. {
  1248. List<UnwindPushEntry> pushEntries = new List<UnwindPushEntry>();
  1249. Operand rsp = Register(X86Register.Rsp);
  1250. int mask = CallingConvention.GetIntCalleeSavedRegisters() & context.AllocResult.IntUsedRegisters;
  1251. while (mask != 0)
  1252. {
  1253. int bit = BitOperations.TrailingZeroCount(mask);
  1254. context.Assembler.Push(Register((X86Register)bit));
  1255. pushEntries.Add(new UnwindPushEntry(bit, RegisterType.Integer, context.StreamOffset));
  1256. mask &= ~(1 << bit);
  1257. }
  1258. int reservedStackSize = context.CallArgsRegionSize + context.AllocResult.SpillRegionSize;
  1259. reservedStackSize += context.XmmSaveRegionSize;
  1260. if (reservedStackSize >= StackGuardSize)
  1261. {
  1262. GenerateInlineStackProbe(context, reservedStackSize);
  1263. }
  1264. if (reservedStackSize != 0)
  1265. {
  1266. context.Assembler.Sub(rsp, Const(reservedStackSize), OperandType.I64);
  1267. }
  1268. int offset = reservedStackSize;
  1269. mask = CallingConvention.GetVecCalleeSavedRegisters() & context.AllocResult.VecUsedRegisters;
  1270. while (mask != 0)
  1271. {
  1272. int bit = BitOperations.TrailingZeroCount(mask);
  1273. offset -= 16;
  1274. MemoryOperand memOp = MemoryOp(OperandType.V128, rsp, null, Multiplier.x1, offset);
  1275. context.Assembler.Movdqu(memOp, Xmm((X86Register)bit));
  1276. pushEntries.Add(new UnwindPushEntry(bit, RegisterType.Vector, context.StreamOffset));
  1277. mask &= ~(1 << bit);
  1278. }
  1279. return new UnwindInfo(pushEntries.ToArray(), context.StreamOffset, reservedStackSize);
  1280. }
  1281. private static void WriteEpilogue(CodeGenContext context)
  1282. {
  1283. Operand rsp = Register(X86Register.Rsp);
  1284. int reservedStackSize = context.CallArgsRegionSize + context.AllocResult.SpillRegionSize;
  1285. reservedStackSize += context.XmmSaveRegionSize;
  1286. int offset = reservedStackSize;
  1287. int mask = CallingConvention.GetVecCalleeSavedRegisters() & context.AllocResult.VecUsedRegisters;
  1288. while (mask != 0)
  1289. {
  1290. int bit = BitOperations.TrailingZeroCount(mask);
  1291. offset -= 16;
  1292. MemoryOperand memOp = MemoryOp(OperandType.V128, rsp, null, Multiplier.x1, offset);
  1293. context.Assembler.Movdqu(Xmm((X86Register)bit), memOp);
  1294. mask &= ~(1 << bit);
  1295. }
  1296. if (reservedStackSize != 0)
  1297. {
  1298. context.Assembler.Add(rsp, Const(reservedStackSize), OperandType.I64);
  1299. }
  1300. mask = CallingConvention.GetIntCalleeSavedRegisters() & context.AllocResult.IntUsedRegisters;
  1301. while (mask != 0)
  1302. {
  1303. int bit = BitUtils.HighestBitSet(mask);
  1304. context.Assembler.Pop(Register((X86Register)bit));
  1305. mask &= ~(1 << bit);
  1306. }
  1307. }
  1308. private static void GenerateInlineStackProbe(CodeGenContext context, int size)
  1309. {
  1310. // Windows does lazy stack allocation, and there are just 2
  1311. // guard pages on the end of the stack. So, if the allocation
  1312. // size we make is greater than this guard size, we must ensure
  1313. // that the OS will map all pages that we'll use. We do that by
  1314. // doing a dummy read on those pages, forcing a page fault and
  1315. // the OS to map them. If they are already mapped, nothing happens.
  1316. const int pageMask = PageSize - 1;
  1317. size = (size + pageMask) & ~pageMask;
  1318. Operand rsp = Register(X86Register.Rsp);
  1319. Operand temp = Register(CallingConvention.GetIntReturnRegister());
  1320. for (int offset = PageSize; offset < size; offset += PageSize)
  1321. {
  1322. Operand memOp = MemoryOp(OperandType.I32, rsp, null, Multiplier.x1, -offset);
  1323. context.Assembler.Mov(temp, memOp, OperandType.I32);
  1324. }
  1325. }
  1326. private static MemoryOperand Memory(Operand operand, OperandType type)
  1327. {
  1328. if (operand.Kind == OperandKind.Memory)
  1329. {
  1330. return operand as MemoryOperand;
  1331. }
  1332. return MemoryOp(type, operand);
  1333. }
  1334. private static Operand Register(X86Register register, OperandType type = OperandType.I64)
  1335. {
  1336. return OperandHelper.Register((int)register, RegisterType.Integer, type);
  1337. }
  1338. private static Operand Xmm(X86Register register)
  1339. {
  1340. return OperandHelper.Register((int)register, RegisterType.Vector, OperandType.V128);
  1341. }
  1342. }
  1343. }