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CodeGen
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6dfb6ccf8c
PreAllocator: Check if instruction supports a Vex prefix in IsVexSameOperandDestSrc1 (#3587)
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3 anni fa |
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Common
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69093cf2d6
Optimize LSRA (#2563)
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4 anni fa |
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Decoders
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2bb9b33da1
Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544)
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3 anni fa |
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Diagnostics
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fbf40424f4
Add an early `TailMerge` pass (#2721)
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4 anni fa |
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Instructions
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2bb9b33da1
Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544)
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3 anni fa |
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IntermediateRepresentation
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633c5ec330
Extend uses count from ushort to uint on Operand Data structure (#3374)
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3 anni fa |
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Memory
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d92fff541b
Replace CacheResourceWrite with more general "precise" write (#2684)
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4 anni fa |
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Signal
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14ce9e1567
Move partial unmap handler to the native signal handler (#3437)
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3 anni fa |
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State
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0c87bf9ea4
Refactor CPU interface to allow the implementation of other CPU emulators (#3362)
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3 anni fa |
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Translation
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f7ef6364b7
Implement CPU FCVT Half <-> Double conversion variants (#3439)
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3 anni fa |
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ARMeilleure.csproj
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00c69f2098
Remove usage of Mono.Posix.NETStandard accross all projects (#2906)
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4 anni fa |
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Allocators.cs
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69093cf2d6
Optimize LSRA (#2563)
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4 anni fa |
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Optimizations.cs
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9d7627af64
Add multi-level function table (#2228)
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4 anni fa |
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Statistics.cs
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4738113f29
Suppress warnings from fields never used or never assigned (CS0169 and CS0649) (#919)
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6 anni fa |
merry
6dfb6ccf8c
PreAllocator: Check if instruction supports a Vex prefix in IsVexSameOperandDestSrc1 (#3587)