 gdkchan
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c64524a240
Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683)
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3 лет назад |
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gdkchan
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db45688aa8
Implement VRSRA, VRSHRN, VQSHRUN, VQMOVN, VQMOVUN, VQADD, VQSUB, VRHADD, VPADDL, VSUBL, VQDMULH and VMLAL Arm32 NEON instructions (#3677)
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3 лет назад |
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gdkchan
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eba682b767
Implement some 32-bit Thumb instructions (#3614)
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3 лет назад |
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gdkchan
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2bb9b33da1
Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544)
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3 лет назад |
 merry
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6a1a03566a
T32: Implement load/store single (immediate) (#3186)
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4 лет назад |
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merry
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7af9fcbc06
T32: Implement Data Processing (Modified Immediate) instructions (#3178)
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4 лет назад |
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merry
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bd9ac0fdaa
T32: Implement B, B.cond, BL, BLX (#3155)
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4 лет назад |
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merry
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7b35ebc64a
T32: Implement ALU (shifted register) instructions (#3135)
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4 лет назад |
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merry
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98e05ee4b7
ARMeilleure: Thumb support (All T16 instructions) (#3105)
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4 лет назад |
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merry
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86b37d0ff7
ARMeilleure: A32: Implement SHSUB8 and UHSUB8 (#3089)
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4 лет назад |
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merry
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88d3ffb97c
ARMeilleure: A32: Implement SHADD8 (#3086)
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4 лет назад |
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merry
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222b1ad7da
ARMeilleure: OpCodeTable: Add CMN (RsReg) (#3087)
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4 лет назад |
 sharmander
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60f7cba30a
Implement FCVTNS (Scalar GP) (#2953)
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4 лет назад |
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sharmander
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e5f7ff1eee
CPU - Implement FCVTMS (Vector) (#2937)
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4 лет назад |
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gdkchan
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e24949ca2c
Implement CSDB instruction (#2927)
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4 лет назад |
 Piyachet Kanda
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3e2f89b4fd
Implement UHADD8 instruction (#2908)
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4 лет назад |
 Mary
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501c3d5cea
Implement MSR instruction for A32 (#2585)
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4 лет назад |
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gdkchan
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ab9d4b862d
Implement VORN (register) Arm32 instruction (#2396)
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4 лет назад |
 LDj3SNuD
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4bd1ad16f9
Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)
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5 лет назад |
 mageven
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9bda7b4699
Implement VCNT instruction (#1963)
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5 лет назад |
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mageven
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c19cfca183
Implement PRFM (register variant) as NOP (#1956)
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5 лет назад |
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LDj3SNuD
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c3e0c41da3
CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894)
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5 лет назад |
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LDj3SNuD
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430ba6da65
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)
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5 лет назад |
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LDj3SNuD
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8a33e884f8
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)
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5 лет назад |
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sharmander
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e901b7850c
CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776)
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5 лет назад |
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sharmander
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3332b29f01
CPU: Implement VFMA (Vector) (#1762)
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5 лет назад |
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sharmander
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36f6bbf5b9
CPU: Implement VFNMA.F32 | F.64 (#1783)
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5 лет назад |
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sharmander
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b479a43939
CPU: Implement VFNMS.F32/64 (#1758)
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5 лет назад |
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gdkchan
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2f16491712
Get rid of Reflection.Emit dependency on CPU and Shader projects (#1626)
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5 лет назад |
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LDj3SNuD
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04e330cc00
Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577)
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5 лет назад |
