 LDj3SNuD
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8f6387128a
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
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7 anni fa |
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LDj3SNuD
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3bdd109f45
Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & Cmtst_S compare instructions. Add 22 compare tests (Scalar, Vector). Add Eor_V, Not_V tests. (#171)
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7 anni fa |
 gdkchan
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f9f111bc85
Add intrinsics support (#121)
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8 anni fa |
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LDj3SNuD
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262b5b8054
Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77)
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8 anni fa |
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LDj3SNuD
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f09a0082bf
Review of cpu tests and creation of a class for mixed cpu tests. (#35)
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8 anni fa |
 Merry
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1039797c30
Implement Zip1, Zip2 (#25)
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8 anni fa |
