HvExecutionContextVcpu.cs 6.1 KB

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  1. using ARMeilleure.State;
  2. using Ryujinx.Memory;
  3. using System;
  4. using System.Runtime.InteropServices;
  5. using System.Threading;
  6. namespace Ryujinx.Cpu.AppleHv
  7. {
  8. class HvExecutionContextVcpu : IHvExecutionContext
  9. {
  10. private static MemoryBlock _setSimdFpRegFuncMem;
  11. private delegate hv_result_t SetSimdFpReg(ulong vcpu, hv_simd_fp_reg_t reg, in V128 value, IntPtr funcPtr);
  12. private static SetSimdFpReg _setSimdFpReg;
  13. private static IntPtr _setSimdFpRegNativePtr;
  14. static HvExecutionContextVcpu()
  15. {
  16. // .NET does not support passing vectors by value, so we need to pass a pointer and use a native
  17. // function to load the value into a vector register.
  18. _setSimdFpRegFuncMem = new MemoryBlock(MemoryBlock.GetPageSize());
  19. _setSimdFpRegFuncMem.Write(0, 0x3DC00040u); // LDR Q0, [X2]
  20. _setSimdFpRegFuncMem.Write(4, 0xD61F0060u); // BR X3
  21. _setSimdFpRegFuncMem.Reprotect(0, _setSimdFpRegFuncMem.Size, MemoryPermission.ReadAndExecute);
  22. _setSimdFpReg = Marshal.GetDelegateForFunctionPointer<SetSimdFpReg>(_setSimdFpRegFuncMem.Pointer);
  23. if (NativeLibrary.TryLoad(HvApi.LibraryName, out IntPtr hvLibHandle))
  24. {
  25. _setSimdFpRegNativePtr = NativeLibrary.GetExport(hvLibHandle, nameof(HvApi.hv_vcpu_set_simd_fp_reg));
  26. }
  27. }
  28. public ulong Pc
  29. {
  30. get
  31. {
  32. HvApi.hv_vcpu_get_reg(_vcpu, hv_reg_t.HV_REG_PC, out ulong pc).ThrowOnError();
  33. return pc;
  34. }
  35. set
  36. {
  37. HvApi.hv_vcpu_set_reg(_vcpu, hv_reg_t.HV_REG_PC, value).ThrowOnError();
  38. }
  39. }
  40. public ulong ElrEl1
  41. {
  42. get
  43. {
  44. HvApi.hv_vcpu_get_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_ELR_EL1, out ulong elr).ThrowOnError();
  45. return elr;
  46. }
  47. set
  48. {
  49. HvApi.hv_vcpu_set_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_ELR_EL1, value).ThrowOnError();
  50. }
  51. }
  52. public ulong EsrEl1
  53. {
  54. get
  55. {
  56. HvApi.hv_vcpu_get_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_ESR_EL1, out ulong esr).ThrowOnError();
  57. return esr;
  58. }
  59. set
  60. {
  61. HvApi.hv_vcpu_set_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_ESR_EL1, value).ThrowOnError();
  62. }
  63. }
  64. public long TpidrEl0
  65. {
  66. get
  67. {
  68. HvApi.hv_vcpu_get_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_TPIDR_EL0, out ulong tpidrEl0).ThrowOnError();
  69. return (long)tpidrEl0;
  70. }
  71. set
  72. {
  73. HvApi.hv_vcpu_set_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_TPIDR_EL0, (ulong)value).ThrowOnError();
  74. }
  75. }
  76. public long TpidrroEl0
  77. {
  78. get
  79. {
  80. HvApi.hv_vcpu_get_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_TPIDRRO_EL0, out ulong tpidrroEl0).ThrowOnError();
  81. return (long)tpidrroEl0;
  82. }
  83. set
  84. {
  85. HvApi.hv_vcpu_set_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_TPIDRRO_EL0, (ulong)value).ThrowOnError();
  86. }
  87. }
  88. public uint Pstate
  89. {
  90. get
  91. {
  92. HvApi.hv_vcpu_get_reg(_vcpu, hv_reg_t.HV_REG_CPSR, out ulong cpsr).ThrowOnError();
  93. return (uint)cpsr;
  94. }
  95. set
  96. {
  97. HvApi.hv_vcpu_set_reg(_vcpu, hv_reg_t.HV_REG_CPSR, (ulong)value).ThrowOnError();
  98. }
  99. }
  100. public uint Fpcr
  101. {
  102. get
  103. {
  104. HvApi.hv_vcpu_get_reg(_vcpu, hv_reg_t.HV_REG_FPCR, out ulong fpcr).ThrowOnError();
  105. return (uint)fpcr;
  106. }
  107. set
  108. {
  109. HvApi.hv_vcpu_set_reg(_vcpu, hv_reg_t.HV_REG_FPCR, (ulong)value).ThrowOnError();
  110. }
  111. }
  112. public uint Fpsr
  113. {
  114. get
  115. {
  116. HvApi.hv_vcpu_get_reg(_vcpu, hv_reg_t.HV_REG_FPSR, out ulong fpsr).ThrowOnError();
  117. return (uint)fpsr;
  118. }
  119. set
  120. {
  121. HvApi.hv_vcpu_set_reg(_vcpu, hv_reg_t.HV_REG_FPSR, (ulong)value).ThrowOnError();
  122. }
  123. }
  124. private ulong _vcpu;
  125. private int _interruptRequested;
  126. public HvExecutionContextVcpu(ulong vcpu)
  127. {
  128. _vcpu = vcpu;
  129. }
  130. public ulong GetX(int index)
  131. {
  132. if (index == 31)
  133. {
  134. HvApi.hv_vcpu_get_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_SP_EL0, out ulong value).ThrowOnError();
  135. return value;
  136. }
  137. else
  138. {
  139. HvApi.hv_vcpu_get_reg(_vcpu, hv_reg_t.HV_REG_X0 + (uint)index, out ulong value).ThrowOnError();
  140. return value;
  141. }
  142. }
  143. public void SetX(int index, ulong value)
  144. {
  145. if (index == 31)
  146. {
  147. HvApi.hv_vcpu_set_sys_reg(_vcpu, hv_sys_reg_t.HV_SYS_REG_SP_EL0, value).ThrowOnError();
  148. }
  149. else
  150. {
  151. HvApi.hv_vcpu_set_reg(_vcpu, hv_reg_t.HV_REG_X0 + (uint)index, value).ThrowOnError();
  152. }
  153. }
  154. public V128 GetV(int index)
  155. {
  156. HvApi.hv_vcpu_get_simd_fp_reg(_vcpu, hv_simd_fp_reg_t.HV_SIMD_FP_REG_Q0 + (uint)index, out hv_simd_fp_uchar16_t value).ThrowOnError();
  157. return new V128(value.Low, value.High);
  158. }
  159. public void SetV(int index, V128 value)
  160. {
  161. _setSimdFpReg(_vcpu, hv_simd_fp_reg_t.HV_SIMD_FP_REG_Q0 + (uint)index, value, _setSimdFpRegNativePtr).ThrowOnError();
  162. }
  163. public void RequestInterrupt()
  164. {
  165. if (Interlocked.Exchange(ref _interruptRequested, 1) == 0)
  166. {
  167. ulong vcpu = _vcpu;
  168. HvApi.hv_vcpus_exit(ref vcpu, 1);
  169. }
  170. }
  171. public bool GetAndClearInterruptRequested()
  172. {
  173. return Interlocked.Exchange(ref _interruptRequested, 0) != 0;
  174. }
  175. }
  176. }