CodeGenerator.cs 60 KB

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  1. using ARMeilleure.CodeGen.Optimizations;
  2. using ARMeilleure.CodeGen.RegisterAllocators;
  3. using ARMeilleure.CodeGen.Unwinding;
  4. using ARMeilleure.Common;
  5. using ARMeilleure.Diagnostics;
  6. using ARMeilleure.IntermediateRepresentation;
  7. using ARMeilleure.Translation;
  8. using System;
  9. using System.Collections.Generic;
  10. using System.Diagnostics;
  11. using System.IO;
  12. namespace ARMeilleure.CodeGen.X86
  13. {
  14. static class CodeGenerator
  15. {
  16. private const int PageSize = 0x1000;
  17. private const int StackGuardSize = 0x2000;
  18. private static Action<CodeGenContext, Operation>[] _instTable;
  19. static CodeGenerator()
  20. {
  21. _instTable = new Action<CodeGenContext, Operation>[EnumUtils.GetCount(typeof(Instruction))];
  22. Add(Instruction.Add, GenerateAdd);
  23. Add(Instruction.BitwiseAnd, GenerateBitwiseAnd);
  24. Add(Instruction.BitwiseExclusiveOr, GenerateBitwiseExclusiveOr);
  25. Add(Instruction.BitwiseNot, GenerateBitwiseNot);
  26. Add(Instruction.BitwiseOr, GenerateBitwiseOr);
  27. Add(Instruction.Branch, GenerateBranch);
  28. Add(Instruction.BranchIfFalse, GenerateBranchIfFalse);
  29. Add(Instruction.BranchIfTrue, GenerateBranchIfTrue);
  30. Add(Instruction.ByteSwap, GenerateByteSwap);
  31. Add(Instruction.Call, GenerateCall);
  32. Add(Instruction.Clobber, GenerateClobber);
  33. Add(Instruction.CompareAndSwap128, GenerateCompareAndSwap128);
  34. Add(Instruction.CompareEqual, GenerateCompareEqual);
  35. Add(Instruction.CompareGreater, GenerateCompareGreater);
  36. Add(Instruction.CompareGreaterOrEqual, GenerateCompareGreaterOrEqual);
  37. Add(Instruction.CompareGreaterOrEqualUI, GenerateCompareGreaterOrEqualUI);
  38. Add(Instruction.CompareGreaterUI, GenerateCompareGreaterUI);
  39. Add(Instruction.CompareLess, GenerateCompareLess);
  40. Add(Instruction.CompareLessOrEqual, GenerateCompareLessOrEqual);
  41. Add(Instruction.CompareLessOrEqualUI, GenerateCompareLessOrEqualUI);
  42. Add(Instruction.CompareLessUI, GenerateCompareLessUI);
  43. Add(Instruction.CompareNotEqual, GenerateCompareNotEqual);
  44. Add(Instruction.ConditionalSelect, GenerateConditionalSelect);
  45. Add(Instruction.ConvertI64ToI32, GenerateConvertI64ToI32);
  46. Add(Instruction.ConvertToFP, GenerateConvertToFP);
  47. Add(Instruction.Copy, GenerateCopy);
  48. Add(Instruction.CountLeadingZeros, GenerateCountLeadingZeros);
  49. Add(Instruction.CpuId, GenerateCpuId);
  50. Add(Instruction.Divide, GenerateDivide);
  51. Add(Instruction.DivideUI, GenerateDivideUI);
  52. Add(Instruction.Fill, GenerateFill);
  53. Add(Instruction.Load, GenerateLoad);
  54. Add(Instruction.Load16, GenerateLoad16);
  55. Add(Instruction.Load8, GenerateLoad8);
  56. Add(Instruction.Multiply, GenerateMultiply);
  57. Add(Instruction.Multiply64HighSI, GenerateMultiply64HighSI);
  58. Add(Instruction.Multiply64HighUI, GenerateMultiply64HighUI);
  59. Add(Instruction.Negate, GenerateNegate);
  60. Add(Instruction.Return, GenerateReturn);
  61. Add(Instruction.RotateRight, GenerateRotateRight);
  62. Add(Instruction.ShiftLeft, GenerateShiftLeft);
  63. Add(Instruction.ShiftRightSI, GenerateShiftRightSI);
  64. Add(Instruction.ShiftRightUI, GenerateShiftRightUI);
  65. Add(Instruction.SignExtend16, GenerateSignExtend16);
  66. Add(Instruction.SignExtend32, GenerateSignExtend32);
  67. Add(Instruction.SignExtend8, GenerateSignExtend8);
  68. Add(Instruction.Spill, GenerateSpill);
  69. Add(Instruction.SpillArg, GenerateSpillArg);
  70. Add(Instruction.StackAlloc, GenerateStackAlloc);
  71. Add(Instruction.Store, GenerateStore);
  72. Add(Instruction.Store16, GenerateStore16);
  73. Add(Instruction.Store8, GenerateStore8);
  74. Add(Instruction.Subtract, GenerateSubtract);
  75. Add(Instruction.VectorCreateScalar, GenerateVectorCreateScalar);
  76. Add(Instruction.VectorExtract, GenerateVectorExtract);
  77. Add(Instruction.VectorExtract16, GenerateVectorExtract16);
  78. Add(Instruction.VectorExtract8, GenerateVectorExtract8);
  79. Add(Instruction.VectorInsert, GenerateVectorInsert);
  80. Add(Instruction.VectorInsert16, GenerateVectorInsert16);
  81. Add(Instruction.VectorInsert8, GenerateVectorInsert8);
  82. Add(Instruction.VectorOne, GenerateVectorOne);
  83. Add(Instruction.VectorZero, GenerateVectorZero);
  84. Add(Instruction.VectorZeroUpper64, GenerateVectorZeroUpper64);
  85. Add(Instruction.VectorZeroUpper96, GenerateVectorZeroUpper96);
  86. Add(Instruction.ZeroExtend16, GenerateZeroExtend16);
  87. Add(Instruction.ZeroExtend32, GenerateZeroExtend32);
  88. Add(Instruction.ZeroExtend8, GenerateZeroExtend8);
  89. }
  90. private static void Add(Instruction inst, Action<CodeGenContext, Operation> func)
  91. {
  92. _instTable[(int)inst] = func;
  93. }
  94. public static CompiledFunction Generate(CompilerContext cctx)
  95. {
  96. ControlFlowGraph cfg = cctx.Cfg;
  97. Logger.StartPass(PassName.Optimization);
  98. if ((cctx.Options & CompilerOptions.SsaForm) != 0 &&
  99. (cctx.Options & CompilerOptions.Optimize) != 0)
  100. {
  101. Optimizer.RunPass(cfg);
  102. }
  103. Logger.EndPass(PassName.Optimization, cfg);
  104. Logger.StartPass(PassName.PreAllocation);
  105. StackAllocator stackAlloc = new StackAllocator();
  106. PreAllocator.RunPass(cctx, stackAlloc, out int maxCallArgs);
  107. Logger.EndPass(PassName.PreAllocation, cfg);
  108. Logger.StartPass(PassName.RegisterAllocation);
  109. if ((cctx.Options & CompilerOptions.SsaForm) != 0)
  110. {
  111. Ssa.Deconstruct(cfg);
  112. }
  113. IRegisterAllocator regAlloc;
  114. if ((cctx.Options & CompilerOptions.Lsra) != 0)
  115. {
  116. regAlloc = new LinearScanAllocator();
  117. }
  118. else
  119. {
  120. regAlloc = new HybridAllocator();
  121. }
  122. RegisterMasks regMasks = new RegisterMasks(
  123. CallingConvention.GetIntAvailableRegisters(),
  124. CallingConvention.GetVecAvailableRegisters(),
  125. CallingConvention.GetIntCallerSavedRegisters(),
  126. CallingConvention.GetVecCallerSavedRegisters(),
  127. CallingConvention.GetIntCalleeSavedRegisters(),
  128. CallingConvention.GetVecCalleeSavedRegisters());
  129. AllocationResult allocResult = regAlloc.RunPass(cfg, stackAlloc, regMasks);
  130. Logger.EndPass(PassName.RegisterAllocation, cfg);
  131. Logger.StartPass(PassName.CodeGeneration);
  132. using (MemoryStream stream = new MemoryStream())
  133. {
  134. CodeGenContext context = new CodeGenContext(stream, allocResult, maxCallArgs, cfg.Blocks.Count);
  135. UnwindInfo unwindInfo = WritePrologue(context);
  136. foreach (BasicBlock block in cfg.Blocks)
  137. {
  138. context.EnterBlock(block);
  139. foreach (Node node in block.Operations)
  140. {
  141. if (node is Operation operation)
  142. {
  143. GenerateOperation(context, operation);
  144. }
  145. }
  146. }
  147. Logger.EndPass(PassName.CodeGeneration);
  148. return new CompiledFunction(context.GetCode(), unwindInfo);
  149. }
  150. }
  151. private static void GenerateOperation(CodeGenContext context, Operation operation)
  152. {
  153. if (operation.Instruction == Instruction.Extended)
  154. {
  155. IntrinsicOperation intrinOp = (IntrinsicOperation)operation;
  156. IntrinsicInfo info = IntrinsicTable.GetInfo(intrinOp.Intrinsic);
  157. switch (info.Type)
  158. {
  159. case IntrinsicType.Comis_:
  160. {
  161. Operand dest = operation.Destination;
  162. Operand src1 = operation.GetSource(0);
  163. Operand src2 = operation.GetSource(1);
  164. switch (intrinOp.Intrinsic)
  165. {
  166. case Intrinsic.X86Comisdeq:
  167. context.Assembler.Comisd(src1, src2);
  168. context.Assembler.Setcc(dest, X86Condition.Equal);
  169. break;
  170. case Intrinsic.X86Comisdge:
  171. context.Assembler.Comisd(src1, src2);
  172. context.Assembler.Setcc(dest, X86Condition.AboveOrEqual);
  173. break;
  174. case Intrinsic.X86Comisdlt:
  175. context.Assembler.Comisd(src1, src2);
  176. context.Assembler.Setcc(dest, X86Condition.Below);
  177. break;
  178. case Intrinsic.X86Comisseq:
  179. context.Assembler.Comiss(src1, src2);
  180. context.Assembler.Setcc(dest, X86Condition.Equal);
  181. break;
  182. case Intrinsic.X86Comissge:
  183. context.Assembler.Comiss(src1, src2);
  184. context.Assembler.Setcc(dest, X86Condition.AboveOrEqual);
  185. break;
  186. case Intrinsic.X86Comisslt:
  187. context.Assembler.Comiss(src1, src2);
  188. context.Assembler.Setcc(dest, X86Condition.Below);
  189. break;
  190. }
  191. context.Assembler.Movzx8(dest, dest, OperandType.I32);
  192. break;
  193. }
  194. case IntrinsicType.PopCount:
  195. {
  196. Operand dest = operation.Destination;
  197. Operand source = operation.GetSource(0);
  198. EnsureSameType(dest, source);
  199. Debug.Assert(dest.Type.IsInteger());
  200. context.Assembler.Popcnt(dest, source, dest.Type);
  201. break;
  202. }
  203. case IntrinsicType.Unary:
  204. {
  205. Operand dest = operation.Destination;
  206. Operand source = operation.GetSource(0);
  207. EnsureSameType(dest, source);
  208. Debug.Assert(!dest.Type.IsInteger());
  209. context.Assembler.WriteInstruction(info.Inst, dest, source);
  210. break;
  211. }
  212. case IntrinsicType.UnaryToGpr:
  213. {
  214. Operand dest = operation.Destination;
  215. Operand source = operation.GetSource(0);
  216. Debug.Assert(dest.Type.IsInteger() && !source.Type.IsInteger());
  217. if (intrinOp.Intrinsic == Intrinsic.X86Cvtsi2si)
  218. {
  219. if (dest.Type == OperandType.I32)
  220. {
  221. context.Assembler.Movd(dest, source); // int _mm_cvtsi128_si32
  222. }
  223. else /* if (dest.Type == OperandType.I64) */
  224. {
  225. context.Assembler.Movq(dest, source); // __int64 _mm_cvtsi128_si64
  226. }
  227. }
  228. else
  229. {
  230. context.Assembler.WriteInstruction(info.Inst, dest, source, dest.Type);
  231. }
  232. break;
  233. }
  234. case IntrinsicType.Binary:
  235. {
  236. Operand dest = operation.Destination;
  237. Operand src1 = operation.GetSource(0);
  238. Operand src2 = operation.GetSource(1);
  239. EnsureSameType(dest, src1);
  240. if (!HardwareCapabilities.SupportsVexEncoding)
  241. {
  242. EnsureSameReg(dest, src1);
  243. }
  244. Debug.Assert(!dest.Type.IsInteger());
  245. Debug.Assert(!src2.Type.IsInteger() || src2.Kind == OperandKind.Constant);
  246. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2);
  247. break;
  248. }
  249. case IntrinsicType.BinaryImm:
  250. {
  251. Operand dest = operation.Destination;
  252. Operand src1 = operation.GetSource(0);
  253. Operand src2 = operation.GetSource(1);
  254. EnsureSameType(dest, src1);
  255. if (!HardwareCapabilities.SupportsVexEncoding)
  256. {
  257. EnsureSameReg(dest, src1);
  258. }
  259. Debug.Assert(!dest.Type.IsInteger() && src2.Kind == OperandKind.Constant);
  260. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2.AsByte());
  261. break;
  262. }
  263. case IntrinsicType.Ternary:
  264. {
  265. Operand dest = operation.Destination;
  266. Operand src1 = operation.GetSource(0);
  267. Operand src2 = operation.GetSource(1);
  268. Operand src3 = operation.GetSource(2);
  269. EnsureSameType(dest, src1, src2, src3);
  270. Debug.Assert(!dest.Type.IsInteger());
  271. if (info.Inst == X86Instruction.Pblendvb && HardwareCapabilities.SupportsVexEncoding)
  272. {
  273. context.Assembler.WriteInstruction(X86Instruction.Vpblendvb, dest, src1, src2, src3);
  274. }
  275. else
  276. {
  277. EnsureSameReg(dest, src1);
  278. Debug.Assert(src3.GetRegister().Index == 0);
  279. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2);
  280. }
  281. break;
  282. }
  283. case IntrinsicType.TernaryImm:
  284. {
  285. Operand dest = operation.Destination;
  286. Operand src1 = operation.GetSource(0);
  287. Operand src2 = operation.GetSource(1);
  288. Operand src3 = operation.GetSource(2);
  289. EnsureSameType(dest, src1, src2);
  290. if (!HardwareCapabilities.SupportsVexEncoding)
  291. {
  292. EnsureSameReg(dest, src1);
  293. }
  294. Debug.Assert(!dest.Type.IsInteger() && src3.Kind == OperandKind.Constant);
  295. context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src3.AsByte());
  296. break;
  297. }
  298. }
  299. }
  300. else
  301. {
  302. Action<CodeGenContext, Operation> func = _instTable[(int)operation.Instruction];
  303. if (func != null)
  304. {
  305. func(context, operation);
  306. }
  307. else
  308. {
  309. throw new ArgumentException($"Invalid instruction \"{operation.Instruction}\".");
  310. }
  311. }
  312. }
  313. private static void GenerateAdd(CodeGenContext context, Operation operation)
  314. {
  315. Operand dest = operation.Destination;
  316. Operand src1 = operation.GetSource(0);
  317. Operand src2 = operation.GetSource(1);
  318. ValidateBinOp(dest, src1, src2);
  319. if (dest.Type.IsInteger())
  320. {
  321. context.Assembler.Add(dest, src2, dest.Type);
  322. }
  323. else if (dest.Type == OperandType.FP32)
  324. {
  325. context.Assembler.Addss(dest, src1, src2);
  326. }
  327. else /* if (dest.Type == OperandType.FP64) */
  328. {
  329. context.Assembler.Addsd(dest, src1, src2);
  330. }
  331. }
  332. private static void GenerateBitwiseAnd(CodeGenContext context, Operation operation)
  333. {
  334. Operand dest = operation.Destination;
  335. Operand src1 = operation.GetSource(0);
  336. Operand src2 = operation.GetSource(1);
  337. ValidateBinOp(dest, src1, src2);
  338. Debug.Assert(dest.Type.IsInteger());
  339. context.Assembler.And(dest, src2, dest.Type);
  340. }
  341. private static void GenerateBitwiseExclusiveOr(CodeGenContext context, Operation operation)
  342. {
  343. Operand dest = operation.Destination;
  344. Operand src1 = operation.GetSource(0);
  345. Operand src2 = operation.GetSource(1);
  346. ValidateBinOp(dest, src1, src2);
  347. if (dest.Type.IsInteger())
  348. {
  349. context.Assembler.Xor(dest, src2, dest.Type);
  350. }
  351. else
  352. {
  353. context.Assembler.Xorps(dest, src1, src2);
  354. }
  355. }
  356. private static void GenerateBitwiseNot(CodeGenContext context, Operation operation)
  357. {
  358. Operand dest = operation.Destination;
  359. Operand source = operation.GetSource(0);
  360. ValidateUnOp(dest, source);
  361. Debug.Assert(dest.Type.IsInteger());
  362. context.Assembler.Not(dest);
  363. }
  364. private static void GenerateBitwiseOr(CodeGenContext context, Operation operation)
  365. {
  366. Operand dest = operation.Destination;
  367. Operand src1 = operation.GetSource(0);
  368. Operand src2 = operation.GetSource(1);
  369. ValidateBinOp(dest, src1, src2);
  370. Debug.Assert(dest.Type.IsInteger());
  371. context.Assembler.Or(dest, src2, dest.Type);
  372. }
  373. private static void GenerateBranch(CodeGenContext context, Operation operation)
  374. {
  375. context.JumpTo(context.CurrBlock.Branch);
  376. }
  377. private static void GenerateBranchIfFalse(CodeGenContext context, Operation operation)
  378. {
  379. Operand source = operation.GetSource(0);
  380. context.Assembler.Test(source, source, source.Type);
  381. context.JumpTo(X86Condition.Equal, context.CurrBlock.Branch);
  382. }
  383. private static void GenerateBranchIfTrue(CodeGenContext context, Operation operation)
  384. {
  385. Operand source = operation.GetSource(0);
  386. context.Assembler.Test(source, source, source.Type);
  387. context.JumpTo(X86Condition.NotEqual, context.CurrBlock.Branch);
  388. }
  389. private static void GenerateByteSwap(CodeGenContext context, Operation operation)
  390. {
  391. Operand dest = operation.Destination;
  392. Operand source = operation.GetSource(0);
  393. ValidateUnOp(dest, source);
  394. Debug.Assert(dest.Type.IsInteger());
  395. context.Assembler.Bswap(dest);
  396. }
  397. private static void GenerateCall(CodeGenContext context, Operation operation)
  398. {
  399. context.Assembler.Call(operation.GetSource(0));
  400. }
  401. private static void GenerateClobber(CodeGenContext context, Operation operation)
  402. {
  403. // This is only used to indicate that a register is clobbered to the
  404. // register allocator, we don't need to produce any code.
  405. }
  406. private static void GenerateCompareAndSwap128(CodeGenContext context, Operation operation)
  407. {
  408. Operand source = operation.GetSource(0);
  409. MemoryOperand memOp = new MemoryOperand(OperandType.I64, source);
  410. context.Assembler.Cmpxchg16b(memOp);
  411. }
  412. private static void GenerateCompareEqual(CodeGenContext context, Operation operation)
  413. {
  414. GenerateCompare(context, operation, X86Condition.Equal);
  415. }
  416. private static void GenerateCompareGreater(CodeGenContext context, Operation operation)
  417. {
  418. GenerateCompare(context, operation, X86Condition.Greater);
  419. }
  420. private static void GenerateCompareGreaterOrEqual(CodeGenContext context, Operation operation)
  421. {
  422. GenerateCompare(context, operation, X86Condition.GreaterOrEqual);
  423. }
  424. private static void GenerateCompareGreaterOrEqualUI(CodeGenContext context, Operation operation)
  425. {
  426. GenerateCompare(context, operation, X86Condition.AboveOrEqual);
  427. }
  428. private static void GenerateCompareGreaterUI(CodeGenContext context, Operation operation)
  429. {
  430. GenerateCompare(context, operation, X86Condition.Above);
  431. }
  432. private static void GenerateCompareLess(CodeGenContext context, Operation operation)
  433. {
  434. GenerateCompare(context, operation, X86Condition.Less);
  435. }
  436. private static void GenerateCompareLessOrEqual(CodeGenContext context, Operation operation)
  437. {
  438. GenerateCompare(context, operation, X86Condition.LessOrEqual);
  439. }
  440. private static void GenerateCompareLessOrEqualUI(CodeGenContext context, Operation operation)
  441. {
  442. GenerateCompare(context, operation, X86Condition.BelowOrEqual);
  443. }
  444. private static void GenerateCompareLessUI(CodeGenContext context, Operation operation)
  445. {
  446. GenerateCompare(context, operation, X86Condition.Below);
  447. }
  448. private static void GenerateCompareNotEqual(CodeGenContext context, Operation operation)
  449. {
  450. GenerateCompare(context, operation, X86Condition.NotEqual);
  451. }
  452. private static void GenerateCompare(CodeGenContext context, Operation operation, X86Condition condition)
  453. {
  454. Operand dest = operation.Destination;
  455. Operand src1 = operation.GetSource(0);
  456. Operand src2 = operation.GetSource(1);
  457. EnsureSameType(src1, src2);
  458. Debug.Assert(dest.Type == OperandType.I32);
  459. context.Assembler.Cmp(src1, src2, src1.Type);
  460. context.Assembler.Setcc(dest, condition);
  461. context.Assembler.Movzx8(dest, dest, OperandType.I32);
  462. }
  463. private static void GenerateConditionalSelect(CodeGenContext context, Operation operation)
  464. {
  465. Operand dest = operation.Destination;
  466. Operand src1 = operation.GetSource(0);
  467. Operand src2 = operation.GetSource(1);
  468. Operand src3 = operation.GetSource(2);
  469. EnsureSameReg (dest, src3);
  470. EnsureSameType(dest, src2, src3);
  471. Debug.Assert(dest.Type.IsInteger());
  472. Debug.Assert(src1.Type == OperandType.I32);
  473. context.Assembler.Test (src1, src1, src1.Type);
  474. context.Assembler.Cmovcc(dest, src2, dest.Type, X86Condition.NotEqual);
  475. }
  476. private static void GenerateConvertI64ToI32(CodeGenContext context, Operation operation)
  477. {
  478. Operand dest = operation.Destination;
  479. Operand source = operation.GetSource(0);
  480. Debug.Assert(dest.Type == OperandType.I32 && source.Type == OperandType.I64);
  481. context.Assembler.Mov(dest, source, OperandType.I32);
  482. }
  483. private static void GenerateConvertToFP(CodeGenContext context, Operation operation)
  484. {
  485. Operand dest = operation.Destination;
  486. Operand source = operation.GetSource(0);
  487. Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);
  488. if (dest.Type == OperandType.FP32)
  489. {
  490. Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP64);
  491. if (source.Type.IsInteger())
  492. {
  493. context.Assembler.Xorps (dest, dest, dest);
  494. context.Assembler.Cvtsi2ss(dest, dest, source, source.Type);
  495. }
  496. else /* if (source.Type == OperandType.FP64) */
  497. {
  498. context.Assembler.Cvtsd2ss(dest, dest, source);
  499. GenerateZeroUpper96(context, dest, dest);
  500. }
  501. }
  502. else /* if (dest.Type == OperandType.FP64) */
  503. {
  504. Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP32);
  505. if (source.Type.IsInteger())
  506. {
  507. context.Assembler.Xorps (dest, dest, dest);
  508. context.Assembler.Cvtsi2sd(dest, dest, source, source.Type);
  509. }
  510. else /* if (source.Type == OperandType.FP32) */
  511. {
  512. context.Assembler.Cvtss2sd(dest, dest, source);
  513. GenerateZeroUpper64(context, dest, dest);
  514. }
  515. }
  516. }
  517. private static void GenerateCopy(CodeGenContext context, Operation operation)
  518. {
  519. Operand dest = operation.Destination;
  520. Operand source = operation.GetSource(0);
  521. EnsureSameType(dest, source);
  522. Debug.Assert(dest.Type.IsInteger() || source.Kind != OperandKind.Constant);
  523. // Moves to the same register are useless.
  524. if (dest.Kind == source.Kind && dest.Value == source.Value)
  525. {
  526. return;
  527. }
  528. if (dest.Kind == OperandKind.Register &&
  529. source.Kind == OperandKind.Constant && source.Value == 0)
  530. {
  531. // Assemble "mov reg, 0" as "xor reg, reg" as the later is more efficient.
  532. context.Assembler.Xor(dest, dest, OperandType.I32);
  533. }
  534. else if (dest.Type.IsInteger())
  535. {
  536. context.Assembler.Mov(dest, source, dest.Type);
  537. }
  538. else
  539. {
  540. context.Assembler.Movdqu(dest, source);
  541. }
  542. }
  543. private static void GenerateCountLeadingZeros(CodeGenContext context, Operation operation)
  544. {
  545. Operand dest = operation.Destination;
  546. Operand source = operation.GetSource(0);
  547. EnsureSameType(dest, source);
  548. Debug.Assert(dest.Type.IsInteger());
  549. context.Assembler.Bsr(dest, source, dest.Type);
  550. int operandSize = dest.Type == OperandType.I32 ? 32 : 64;
  551. int operandMask = operandSize - 1;
  552. // When the input operand is 0, the result is undefined, however the
  553. // ZF flag is set. We are supposed to return the operand size on that
  554. // case. So, add an additional jump to handle that case, by moving the
  555. // operand size constant to the destination register.
  556. context.JumpToNear(X86Condition.NotEqual);
  557. context.Assembler.Mov(dest, new Operand(operandSize | operandMask), OperandType.I32);
  558. context.JumpHere();
  559. // BSR returns the zero based index of the last bit set on the operand,
  560. // starting from the least significant bit. However we are supposed to
  561. // return the number of 0 bits on the high end. So, we invert the result
  562. // of the BSR using XOR to get the correct value.
  563. context.Assembler.Xor(dest, new Operand(operandMask), OperandType.I32);
  564. }
  565. private static void GenerateCpuId(CodeGenContext context, Operation operation)
  566. {
  567. context.Assembler.Cpuid();
  568. }
  569. private static void GenerateDivide(CodeGenContext context, Operation operation)
  570. {
  571. Operand dest = operation.Destination;
  572. Operand dividend = operation.GetSource(0);
  573. Operand divisor = operation.GetSource(1);
  574. if (!dest.Type.IsInteger())
  575. {
  576. ValidateBinOp(dest, dividend, divisor);
  577. }
  578. if (dest.Type.IsInteger())
  579. {
  580. divisor = operation.GetSource(2);
  581. EnsureSameType(dest, divisor);
  582. if (divisor.Type == OperandType.I32)
  583. {
  584. context.Assembler.Cdq();
  585. }
  586. else
  587. {
  588. context.Assembler.Cqo();
  589. }
  590. context.Assembler.Idiv(divisor);
  591. }
  592. else if (dest.Type == OperandType.FP32)
  593. {
  594. context.Assembler.Divss(dest, dividend, divisor);
  595. }
  596. else /* if (dest.Type == OperandType.FP64) */
  597. {
  598. context.Assembler.Divsd(dest, dividend, divisor);
  599. }
  600. }
  601. private static void GenerateDivideUI(CodeGenContext context, Operation operation)
  602. {
  603. Operand divisor = operation.GetSource(2);
  604. Operand rdx = Register(X86Register.Rdx);
  605. Debug.Assert(divisor.Type.IsInteger());
  606. context.Assembler.Xor(rdx, rdx, OperandType.I32);
  607. context.Assembler.Div(divisor);
  608. }
  609. private static void GenerateFill(CodeGenContext context, Operation operation)
  610. {
  611. Operand dest = operation.Destination;
  612. Operand offset = operation.GetSource(0);
  613. Debug.Assert(offset.Kind == OperandKind.Constant);
  614. int offs = offset.AsInt32() + context.CallArgsRegionSize;
  615. Operand rsp = Register(X86Register.Rsp);
  616. MemoryOperand memOp = new MemoryOperand(dest.Type, rsp, null, Multiplier.x1, offs);
  617. GenerateLoad(context, memOp, dest);
  618. }
  619. private static void GenerateLoad(CodeGenContext context, Operation operation)
  620. {
  621. Operand value = operation.Destination;
  622. Operand address = Memory(operation.GetSource(0), value.Type);
  623. GenerateLoad(context, address, value);
  624. }
  625. private static void GenerateLoad16(CodeGenContext context, Operation operation)
  626. {
  627. Operand value = operation.Destination;
  628. Operand address = Memory(operation.GetSource(0), value.Type);
  629. Debug.Assert(value.Type.IsInteger());
  630. context.Assembler.Movzx16(value, address, value.Type);
  631. }
  632. private static void GenerateLoad8(CodeGenContext context, Operation operation)
  633. {
  634. Operand value = operation.Destination;
  635. Operand address = Memory(operation.GetSource(0), value.Type);
  636. Debug.Assert(value.Type.IsInteger());
  637. context.Assembler.Movzx8(value, address, value.Type);
  638. }
  639. private static void GenerateMultiply(CodeGenContext context, Operation operation)
  640. {
  641. Operand dest = operation.Destination;
  642. Operand src1 = operation.GetSource(0);
  643. Operand src2 = operation.GetSource(1);
  644. if (src2.Kind != OperandKind.Constant)
  645. {
  646. EnsureSameReg(dest, src1);
  647. }
  648. EnsureSameType(dest, src1, src2);
  649. if (dest.Type.IsInteger())
  650. {
  651. if (src2.Kind == OperandKind.Constant)
  652. {
  653. context.Assembler.Imul(dest, src1, src2, dest.Type);
  654. }
  655. else
  656. {
  657. context.Assembler.Imul(dest, src2, dest.Type);
  658. }
  659. }
  660. else if (dest.Type == OperandType.FP32)
  661. {
  662. context.Assembler.Mulss(dest, src1, src2);
  663. }
  664. else /* if (dest.Type == OperandType.FP64) */
  665. {
  666. context.Assembler.Mulsd(dest, src1, src2);
  667. }
  668. }
  669. private static void GenerateMultiply64HighSI(CodeGenContext context, Operation operation)
  670. {
  671. Operand source = operation.GetSource(1);
  672. Debug.Assert(source.Type == OperandType.I64);
  673. context.Assembler.Imul(source);
  674. }
  675. private static void GenerateMultiply64HighUI(CodeGenContext context, Operation operation)
  676. {
  677. Operand source = operation.GetSource(1);
  678. Debug.Assert(source.Type == OperandType.I64);
  679. context.Assembler.Mul(source);
  680. }
  681. private static void GenerateNegate(CodeGenContext context, Operation operation)
  682. {
  683. Operand dest = operation.Destination;
  684. Operand source = operation.GetSource(0);
  685. ValidateUnOp(dest, source);
  686. Debug.Assert(dest.Type.IsInteger());
  687. context.Assembler.Neg(dest);
  688. }
  689. private static void GenerateReturn(CodeGenContext context, Operation operation)
  690. {
  691. WriteEpilogue(context);
  692. context.Assembler.Return();
  693. }
  694. private static void GenerateRotateRight(CodeGenContext context, Operation operation)
  695. {
  696. Operand dest = operation.Destination;
  697. Operand src1 = operation.GetSource(0);
  698. Operand src2 = operation.GetSource(1);
  699. ValidateShift(dest, src1, src2);
  700. context.Assembler.Ror(dest, src2, dest.Type);
  701. }
  702. private static void GenerateShiftLeft(CodeGenContext context, Operation operation)
  703. {
  704. Operand dest = operation.Destination;
  705. Operand src1 = operation.GetSource(0);
  706. Operand src2 = operation.GetSource(1);
  707. ValidateShift(dest, src1, src2);
  708. context.Assembler.Shl(dest, src2, dest.Type);
  709. }
  710. private static void GenerateShiftRightSI(CodeGenContext context, Operation operation)
  711. {
  712. Operand dest = operation.Destination;
  713. Operand src1 = operation.GetSource(0);
  714. Operand src2 = operation.GetSource(1);
  715. ValidateShift(dest, src1, src2);
  716. context.Assembler.Sar(dest, src2, dest.Type);
  717. }
  718. private static void GenerateShiftRightUI(CodeGenContext context, Operation operation)
  719. {
  720. Operand dest = operation.Destination;
  721. Operand src1 = operation.GetSource(0);
  722. Operand src2 = operation.GetSource(1);
  723. ValidateShift(dest, src1, src2);
  724. context.Assembler.Shr(dest, src2, dest.Type);
  725. }
  726. private static void GenerateSignExtend16(CodeGenContext context, Operation operation)
  727. {
  728. Operand dest = operation.Destination;
  729. Operand source = operation.GetSource(0);
  730. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  731. context.Assembler.Movsx16(dest, source, dest.Type);
  732. }
  733. private static void GenerateSignExtend32(CodeGenContext context, Operation operation)
  734. {
  735. Operand dest = operation.Destination;
  736. Operand source = operation.GetSource(0);
  737. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  738. context.Assembler.Movsx32(dest, source, dest.Type);
  739. }
  740. private static void GenerateSignExtend8(CodeGenContext context, Operation operation)
  741. {
  742. Operand dest = operation.Destination;
  743. Operand source = operation.GetSource(0);
  744. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  745. context.Assembler.Movsx8(dest, source, dest.Type);
  746. }
  747. private static void GenerateSpill(CodeGenContext context, Operation operation)
  748. {
  749. GenerateSpill(context, operation, context.CallArgsRegionSize);
  750. }
  751. private static void GenerateSpillArg(CodeGenContext context, Operation operation)
  752. {
  753. GenerateSpill(context, operation, 0);
  754. }
  755. private static void GenerateSpill(CodeGenContext context, Operation operation, int baseOffset)
  756. {
  757. Operand offset = operation.GetSource(0);
  758. Operand source = operation.GetSource(1);
  759. Debug.Assert(offset.Kind == OperandKind.Constant);
  760. int offs = offset.AsInt32() + baseOffset;
  761. Operand rsp = Register(X86Register.Rsp);
  762. MemoryOperand memOp = new MemoryOperand(source.Type, rsp, null, Multiplier.x1, offs);
  763. GenerateStore(context, memOp, source);
  764. }
  765. private static void GenerateStackAlloc(CodeGenContext context, Operation operation)
  766. {
  767. Operand dest = operation.Destination;
  768. Operand offset = operation.GetSource(0);
  769. Debug.Assert(offset.Kind == OperandKind.Constant);
  770. int offs = offset.AsInt32() + context.CallArgsRegionSize;
  771. Operand rsp = Register(X86Register.Rsp);
  772. MemoryOperand memOp = new MemoryOperand(OperandType.I64, rsp, null, Multiplier.x1, offs);
  773. context.Assembler.Lea(dest, memOp, OperandType.I64);
  774. }
  775. private static void GenerateStore(CodeGenContext context, Operation operation)
  776. {
  777. Operand value = operation.GetSource(1);
  778. Operand address = Memory(operation.GetSource(0), value.Type);
  779. GenerateStore(context, address, value);
  780. }
  781. private static void GenerateStore16(CodeGenContext context, Operation operation)
  782. {
  783. Operand value = operation.GetSource(1);
  784. Operand address = Memory(operation.GetSource(0), value.Type);
  785. Debug.Assert(value.Type.IsInteger());
  786. context.Assembler.Mov16(address, value);
  787. }
  788. private static void GenerateStore8(CodeGenContext context, Operation operation)
  789. {
  790. Operand value = operation.GetSource(1);
  791. Operand address = Memory(operation.GetSource(0), value.Type);
  792. Debug.Assert(value.Type.IsInteger());
  793. context.Assembler.Mov8(address, value);
  794. }
  795. private static void GenerateSubtract(CodeGenContext context, Operation operation)
  796. {
  797. Operand dest = operation.Destination;
  798. Operand src1 = operation.GetSource(0);
  799. Operand src2 = operation.GetSource(1);
  800. ValidateBinOp(dest, src1, src2);
  801. if (dest.Type.IsInteger())
  802. {
  803. context.Assembler.Sub(dest, src2, dest.Type);
  804. }
  805. else if (dest.Type == OperandType.FP32)
  806. {
  807. context.Assembler.Subss(dest, src1, src2);
  808. }
  809. else /* if (dest.Type == OperandType.FP64) */
  810. {
  811. context.Assembler.Subsd(dest, src1, src2);
  812. }
  813. }
  814. private static void GenerateVectorCreateScalar(CodeGenContext context, Operation operation)
  815. {
  816. Operand dest = operation.Destination;
  817. Operand source = operation.GetSource(0);
  818. Debug.Assert(!dest.Type.IsInteger() && source.Type.IsInteger());
  819. if (source.Type == OperandType.I32)
  820. {
  821. context.Assembler.Movd(dest, source);
  822. }
  823. else /* if (source.Type == OperandType.I64) */
  824. {
  825. context.Assembler.Movq(dest, source);
  826. }
  827. }
  828. private static void GenerateVectorExtract(CodeGenContext context, Operation operation)
  829. {
  830. Operand dest = operation.Destination; //Value
  831. Operand src1 = operation.GetSource(0); //Vector
  832. Operand src2 = operation.GetSource(1); //Index
  833. Debug.Assert(src1.Type == OperandType.V128);
  834. Debug.Assert(src2.Kind == OperandKind.Constant);
  835. byte index = src2.AsByte();
  836. if (dest.Type == OperandType.I32)
  837. {
  838. Debug.Assert(index < 4);
  839. if (HardwareCapabilities.SupportsSse41)
  840. {
  841. context.Assembler.Pextrd(dest, src1, index);
  842. }
  843. else
  844. {
  845. if (index != 0)
  846. {
  847. int mask0 = 0b11_10_01_00;
  848. int mask1 = 0b11_10_01_00;
  849. mask0 = BitUtils.RotateRight(mask0, index * 2, 8);
  850. mask1 = BitUtils.RotateRight(mask1, 8 - index * 2, 8);
  851. context.Assembler.Pshufd(src1, src1, (byte)mask0);
  852. context.Assembler.Movd (dest, src1);
  853. context.Assembler.Pshufd(src1, src1, (byte)mask1);
  854. }
  855. else
  856. {
  857. context.Assembler.Movd(dest, src1);
  858. }
  859. }
  860. }
  861. else if (dest.Type == OperandType.I64)
  862. {
  863. Debug.Assert(index < 2);
  864. if (HardwareCapabilities.SupportsSse41)
  865. {
  866. context.Assembler.Pextrq(dest, src1, index);
  867. }
  868. else
  869. {
  870. if (index != 0)
  871. {
  872. const byte mask = 0b01_00_11_10;
  873. context.Assembler.Pshufd(src1, src1, mask);
  874. context.Assembler.Movq (dest, src1);
  875. context.Assembler.Pshufd(src1, src1, mask);
  876. }
  877. else
  878. {
  879. context.Assembler.Movq(dest, src1);
  880. }
  881. }
  882. }
  883. else
  884. {
  885. Debug.Assert(index < (dest.Type == OperandType.FP32 ? 4 : 2));
  886. // Floating-point types.
  887. if ((index >= 2 && dest.Type == OperandType.FP32) ||
  888. (index == 1 && dest.Type == OperandType.FP64))
  889. {
  890. context.Assembler.Movhlps(dest, dest, src1);
  891. context.Assembler.Movq (dest, dest);
  892. }
  893. else
  894. {
  895. context.Assembler.Movq(dest, src1);
  896. }
  897. if (dest.Type == OperandType.FP32)
  898. {
  899. context.Assembler.Pshufd(dest, dest, (byte)(0xfc | (index & 1)));
  900. }
  901. }
  902. }
  903. private static void GenerateVectorExtract16(CodeGenContext context, Operation operation)
  904. {
  905. Operand dest = operation.Destination; //Value
  906. Operand src1 = operation.GetSource(0); //Vector
  907. Operand src2 = operation.GetSource(1); //Index
  908. Debug.Assert(src1.Type == OperandType.V128);
  909. Debug.Assert(src2.Kind == OperandKind.Constant);
  910. byte index = src2.AsByte();
  911. Debug.Assert(index < 8);
  912. context.Assembler.Pextrw(dest, src1, index);
  913. }
  914. private static void GenerateVectorExtract8(CodeGenContext context, Operation operation)
  915. {
  916. Operand dest = operation.Destination; //Value
  917. Operand src1 = operation.GetSource(0); //Vector
  918. Operand src2 = operation.GetSource(1); //Index
  919. Debug.Assert(src1.Type == OperandType.V128);
  920. Debug.Assert(src2.Kind == OperandKind.Constant);
  921. byte index = src2.AsByte();
  922. Debug.Assert(index < 16);
  923. if (HardwareCapabilities.SupportsSse41)
  924. {
  925. context.Assembler.Pextrb(dest, src1, index);
  926. }
  927. else
  928. {
  929. context.Assembler.Pextrw(dest, src1, (byte)(index >> 1));
  930. if ((index & 1) != 0)
  931. {
  932. context.Assembler.Shr(dest, new Operand(8), OperandType.I32);
  933. }
  934. else
  935. {
  936. context.Assembler.Movzx8(dest, dest, OperandType.I32);
  937. }
  938. }
  939. }
  940. private static void GenerateVectorInsert(CodeGenContext context, Operation operation)
  941. {
  942. Operand dest = operation.Destination;
  943. Operand src1 = operation.GetSource(0); //Vector
  944. Operand src2 = operation.GetSource(1); //Value
  945. Operand src3 = operation.GetSource(2); //Index
  946. if (!HardwareCapabilities.SupportsVexEncoding)
  947. {
  948. EnsureSameReg(dest, src1);
  949. }
  950. Debug.Assert(src1.Type == OperandType.V128);
  951. Debug.Assert(src3.Kind == OperandKind.Constant);
  952. byte index = src3.AsByte();
  953. void InsertIntSse2(int words)
  954. {
  955. if (dest.GetRegister() != src1.GetRegister())
  956. {
  957. context.Assembler.Movdqu(dest, src1);
  958. }
  959. for (int word = 0; word < words; word++)
  960. {
  961. // Insert lower 16-bits.
  962. context.Assembler.Pinsrw(dest, dest, src2, (byte)(index * words + word));
  963. // Move next word down.
  964. context.Assembler.Ror(src2, new Operand(16), src2.Type);
  965. }
  966. }
  967. if (src2.Type == OperandType.I32)
  968. {
  969. Debug.Assert(index < 4);
  970. if (HardwareCapabilities.SupportsSse41)
  971. {
  972. context.Assembler.Pinsrd(dest, src1, src2, index);
  973. }
  974. else
  975. {
  976. InsertIntSse2(2);
  977. }
  978. }
  979. else if (src2.Type == OperandType.I64)
  980. {
  981. Debug.Assert(index < 2);
  982. if (HardwareCapabilities.SupportsSse41)
  983. {
  984. context.Assembler.Pinsrq(dest, src1, src2, index);
  985. }
  986. else
  987. {
  988. InsertIntSse2(4);
  989. }
  990. }
  991. else if (src2.Type == OperandType.FP32)
  992. {
  993. Debug.Assert(index < 4);
  994. if (index != 0)
  995. {
  996. if (HardwareCapabilities.SupportsSse41)
  997. {
  998. context.Assembler.Insertps(dest, src1, src2, (byte)(index << 4));
  999. }
  1000. else
  1001. {
  1002. if (src1.GetRegister() == src2.GetRegister())
  1003. {
  1004. int mask = 0b11_10_01_00;
  1005. mask &= ~(0b11 << index * 2);
  1006. context.Assembler.Pshufd(dest, src1, (byte)mask);
  1007. }
  1008. else
  1009. {
  1010. int mask0 = 0b11_10_01_00;
  1011. int mask1 = 0b11_10_01_00;
  1012. mask0 = BitUtils.RotateRight(mask0, index * 2, 8);
  1013. mask1 = BitUtils.RotateRight(mask1, 8 - index * 2, 8);
  1014. context.Assembler.Pshufd(src1, src1, (byte)mask0); // Lane to be inserted in position 0.
  1015. context.Assembler.Movss (dest, src1, src2); // dest[127:0] = src1[127:32] | src2[31:0]
  1016. context.Assembler.Pshufd(dest, dest, (byte)mask1); // Inserted lane in original position.
  1017. if (dest.GetRegister() != src1.GetRegister())
  1018. {
  1019. context.Assembler.Pshufd(src1, src1, (byte)mask1); // Restore src1.
  1020. }
  1021. }
  1022. }
  1023. }
  1024. else
  1025. {
  1026. context.Assembler.Movss(dest, src1, src2);
  1027. }
  1028. }
  1029. else /* if (src2.Type == OperandType.FP64) */
  1030. {
  1031. Debug.Assert(index < 2);
  1032. if (index != 0)
  1033. {
  1034. context.Assembler.Movlhps(dest, src1, src2);
  1035. }
  1036. else
  1037. {
  1038. context.Assembler.Movsd(dest, src1, src2);
  1039. }
  1040. }
  1041. }
  1042. private static void GenerateVectorInsert16(CodeGenContext context, Operation operation)
  1043. {
  1044. Operand dest = operation.Destination;
  1045. Operand src1 = operation.GetSource(0); //Vector
  1046. Operand src2 = operation.GetSource(1); //Value
  1047. Operand src3 = operation.GetSource(2); //Index
  1048. if (!HardwareCapabilities.SupportsVexEncoding)
  1049. {
  1050. EnsureSameReg(dest, src1);
  1051. }
  1052. Debug.Assert(src1.Type == OperandType.V128);
  1053. Debug.Assert(src3.Kind == OperandKind.Constant);
  1054. byte index = src3.AsByte();
  1055. context.Assembler.Pinsrw(dest, src1, src2, index);
  1056. }
  1057. private static void GenerateVectorInsert8(CodeGenContext context, Operation operation)
  1058. {
  1059. Operand dest = operation.Destination;
  1060. Operand src1 = operation.GetSource(0); //Vector
  1061. Operand src2 = operation.GetSource(1); //Value
  1062. Operand src3 = operation.GetSource(2); //Index
  1063. // It's not possible to emulate this instruction without
  1064. // SSE 4.1 support without the use of a temporary register,
  1065. // so we instead handle that case on the pre-allocator when
  1066. // SSE 4.1 is not supported on the CPU.
  1067. Debug.Assert(HardwareCapabilities.SupportsSse41);
  1068. if (!HardwareCapabilities.SupportsVexEncoding)
  1069. {
  1070. EnsureSameReg(dest, src1);
  1071. }
  1072. Debug.Assert(src1.Type == OperandType.V128);
  1073. Debug.Assert(src3.Kind == OperandKind.Constant);
  1074. byte index = src3.AsByte();
  1075. context.Assembler.Pinsrb(dest, src1, src2, index);
  1076. }
  1077. private static void GenerateVectorOne(CodeGenContext context, Operation operation)
  1078. {
  1079. Operand dest = operation.Destination;
  1080. Debug.Assert(!dest.Type.IsInteger());
  1081. context.Assembler.Pcmpeqw(dest, dest, dest);
  1082. }
  1083. private static void GenerateVectorZero(CodeGenContext context, Operation operation)
  1084. {
  1085. Operand dest = operation.Destination;
  1086. Debug.Assert(!dest.Type.IsInteger());
  1087. context.Assembler.Xorps(dest, dest, dest);
  1088. }
  1089. private static void GenerateVectorZeroUpper64(CodeGenContext context, Operation operation)
  1090. {
  1091. Operand dest = operation.Destination;
  1092. Operand source = operation.GetSource(0);
  1093. Debug.Assert(dest.Type == OperandType.V128 && source.Type == OperandType.V128);
  1094. GenerateZeroUpper64(context, dest, source);
  1095. }
  1096. private static void GenerateVectorZeroUpper96(CodeGenContext context, Operation operation)
  1097. {
  1098. Operand dest = operation.Destination;
  1099. Operand source = operation.GetSource(0);
  1100. Debug.Assert(dest.Type == OperandType.V128 && source.Type == OperandType.V128);
  1101. GenerateZeroUpper96(context, dest, source);
  1102. }
  1103. private static void GenerateZeroExtend16(CodeGenContext context, Operation operation)
  1104. {
  1105. Operand dest = operation.Destination;
  1106. Operand source = operation.GetSource(0);
  1107. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  1108. context.Assembler.Movzx16(dest, source, OperandType.I32);
  1109. }
  1110. private static void GenerateZeroExtend32(CodeGenContext context, Operation operation)
  1111. {
  1112. Operand dest = operation.Destination;
  1113. Operand source = operation.GetSource(0);
  1114. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  1115. context.Assembler.Mov(dest, source, OperandType.I32);
  1116. }
  1117. private static void GenerateZeroExtend8(CodeGenContext context, Operation operation)
  1118. {
  1119. Operand dest = operation.Destination;
  1120. Operand source = operation.GetSource(0);
  1121. Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
  1122. context.Assembler.Movzx8(dest, source, OperandType.I32);
  1123. }
  1124. private static void GenerateLoad(CodeGenContext context, Operand address, Operand value)
  1125. {
  1126. switch (value.Type)
  1127. {
  1128. case OperandType.I32: context.Assembler.Mov (value, address, OperandType.I32); break;
  1129. case OperandType.I64: context.Assembler.Mov (value, address, OperandType.I64); break;
  1130. case OperandType.FP32: context.Assembler.Movd (value, address); break;
  1131. case OperandType.FP64: context.Assembler.Movq (value, address); break;
  1132. case OperandType.V128: context.Assembler.Movdqu(value, address); break;
  1133. default: Debug.Assert(false); break;
  1134. }
  1135. }
  1136. private static void GenerateStore(CodeGenContext context, Operand address, Operand value)
  1137. {
  1138. switch (value.Type)
  1139. {
  1140. case OperandType.I32: context.Assembler.Mov (address, value, OperandType.I32); break;
  1141. case OperandType.I64: context.Assembler.Mov (address, value, OperandType.I64); break;
  1142. case OperandType.FP32: context.Assembler.Movd (address, value); break;
  1143. case OperandType.FP64: context.Assembler.Movq (address, value); break;
  1144. case OperandType.V128: context.Assembler.Movdqu(address, value); break;
  1145. default: Debug.Assert(false); break;
  1146. }
  1147. }
  1148. private static void GenerateZeroUpper64(CodeGenContext context, Operand dest, Operand source)
  1149. {
  1150. context.Assembler.Movq(dest, source);
  1151. }
  1152. private static void GenerateZeroUpper96(CodeGenContext context, Operand dest, Operand source)
  1153. {
  1154. context.Assembler.Movq(dest, source);
  1155. context.Assembler.Pshufd(dest, dest, 0xfc);
  1156. }
  1157. private static void ValidateUnOp(Operand dest, Operand source)
  1158. {
  1159. #if DEBUG
  1160. EnsureSameReg (dest, source);
  1161. EnsureSameType(dest, source);
  1162. #endif
  1163. }
  1164. private static void ValidateBinOp(Operand dest, Operand src1, Operand src2)
  1165. {
  1166. #if DEBUG
  1167. EnsureSameReg (dest, src1);
  1168. EnsureSameType(dest, src1, src2);
  1169. #endif
  1170. }
  1171. private static void ValidateShift(Operand dest, Operand src1, Operand src2)
  1172. {
  1173. #if DEBUG
  1174. EnsureSameReg (dest, src1);
  1175. EnsureSameType(dest, src1);
  1176. Debug.Assert(dest.Type.IsInteger() && src2.Type == OperandType.I32);
  1177. #endif
  1178. }
  1179. private static void EnsureSameReg(Operand op1, Operand op2)
  1180. {
  1181. if (!op1.Type.IsInteger() && HardwareCapabilities.SupportsVexEncoding)
  1182. {
  1183. return;
  1184. }
  1185. Debug.Assert(op1.Kind == OperandKind.Register || op1.Kind == OperandKind.Memory);
  1186. Debug.Assert(op1.Kind == op2.Kind);
  1187. Debug.Assert(op1.Value == op2.Value);
  1188. }
  1189. private static void EnsureSameType(Operand op1, Operand op2)
  1190. {
  1191. Debug.Assert(op1.Type == op2.Type);
  1192. }
  1193. private static void EnsureSameType(Operand op1, Operand op2, Operand op3)
  1194. {
  1195. Debug.Assert(op1.Type == op2.Type);
  1196. Debug.Assert(op1.Type == op3.Type);
  1197. }
  1198. private static void EnsureSameType(Operand op1, Operand op2, Operand op3, Operand op4)
  1199. {
  1200. Debug.Assert(op1.Type == op2.Type);
  1201. Debug.Assert(op1.Type == op3.Type);
  1202. Debug.Assert(op1.Type == op4.Type);
  1203. }
  1204. private static UnwindInfo WritePrologue(CodeGenContext context)
  1205. {
  1206. List<UnwindPushEntry> pushEntries = new List<UnwindPushEntry>();
  1207. Operand rsp = Register(X86Register.Rsp);
  1208. int mask = CallingConvention.GetIntCalleeSavedRegisters() & context.AllocResult.IntUsedRegisters;
  1209. while (mask != 0)
  1210. {
  1211. int bit = BitUtils.LowestBitSet(mask);
  1212. context.Assembler.Push(Register((X86Register)bit));
  1213. pushEntries.Add(new UnwindPushEntry(bit, RegisterType.Integer, context.StreamOffset));
  1214. mask &= ~(1 << bit);
  1215. }
  1216. int reservedStackSize = context.CallArgsRegionSize + context.AllocResult.SpillRegionSize;
  1217. reservedStackSize += context.XmmSaveRegionSize;
  1218. if (reservedStackSize >= StackGuardSize)
  1219. {
  1220. GenerateInlineStackProbe(context, reservedStackSize);
  1221. }
  1222. if (reservedStackSize != 0)
  1223. {
  1224. context.Assembler.Sub(rsp, new Operand(reservedStackSize), OperandType.I64);
  1225. }
  1226. int offset = reservedStackSize;
  1227. mask = CallingConvention.GetVecCalleeSavedRegisters() & context.AllocResult.VecUsedRegisters;
  1228. while (mask != 0)
  1229. {
  1230. int bit = BitUtils.LowestBitSet(mask);
  1231. offset -= 16;
  1232. MemoryOperand memOp = new MemoryOperand(OperandType.V128, rsp, null, Multiplier.x1, offset);
  1233. context.Assembler.Movdqu(memOp, Xmm((X86Register)bit));
  1234. pushEntries.Add(new UnwindPushEntry(bit, RegisterType.Vector, context.StreamOffset));
  1235. mask &= ~(1 << bit);
  1236. }
  1237. return new UnwindInfo(pushEntries.ToArray(), context.StreamOffset, reservedStackSize);
  1238. }
  1239. private static void WriteEpilogue(CodeGenContext context)
  1240. {
  1241. Operand rsp = Register(X86Register.Rsp);
  1242. int reservedStackSize = context.CallArgsRegionSize + context.AllocResult.SpillRegionSize;
  1243. reservedStackSize += context.XmmSaveRegionSize;
  1244. int offset = reservedStackSize;
  1245. int mask = CallingConvention.GetVecCalleeSavedRegisters() & context.AllocResult.VecUsedRegisters;
  1246. while (mask != 0)
  1247. {
  1248. int bit = BitUtils.LowestBitSet(mask);
  1249. offset -= 16;
  1250. MemoryOperand memOp = new MemoryOperand(OperandType.V128, rsp, null, Multiplier.x1, offset);
  1251. context.Assembler.Movdqu(Xmm((X86Register)bit), memOp);
  1252. mask &= ~(1 << bit);
  1253. }
  1254. if (reservedStackSize != 0)
  1255. {
  1256. context.Assembler.Add(rsp, new Operand(reservedStackSize), OperandType.I64);
  1257. }
  1258. mask = CallingConvention.GetIntCalleeSavedRegisters() & context.AllocResult.IntUsedRegisters;
  1259. while (mask != 0)
  1260. {
  1261. int bit = BitUtils.HighestBitSet(mask);
  1262. context.Assembler.Pop(Register((X86Register)bit));
  1263. mask &= ~(1 << bit);
  1264. }
  1265. }
  1266. private static void GenerateInlineStackProbe(CodeGenContext context, int size)
  1267. {
  1268. // Windows does lazy stack allocation, and there are just 2
  1269. // guard pages on the end of the stack. So, if the allocation
  1270. // size we make is greater than this guard size, we must ensure
  1271. // that the OS will map all pages that we'll use. We do that by
  1272. // doing a dummy read on those pages, forcing a page fault and
  1273. // the OS to map them. If they are already mapped, nothing happens.
  1274. const int pageMask = PageSize - 1;
  1275. size = (size + pageMask) & ~pageMask;
  1276. Operand rsp = Register(X86Register.Rsp);
  1277. Operand temp = Register(CallingConvention.GetIntReturnRegister());
  1278. for (int offset = PageSize; offset < size; offset += PageSize)
  1279. {
  1280. Operand memOp = new MemoryOperand(OperandType.I32, rsp, null, Multiplier.x1, -offset);;
  1281. context.Assembler.Mov(temp, memOp, OperandType.I32);
  1282. }
  1283. }
  1284. private static MemoryOperand Memory(Operand operand, OperandType type)
  1285. {
  1286. if (operand.Kind == OperandKind.Memory)
  1287. {
  1288. return operand as MemoryOperand;
  1289. }
  1290. return new MemoryOperand(type, operand);
  1291. }
  1292. private static Operand Register(X86Register register, OperandType type = OperandType.I64)
  1293. {
  1294. return new Operand((int)register, RegisterType.Integer, type);
  1295. }
  1296. private static Operand Xmm(X86Register register)
  1297. {
  1298. return new Operand((int)register, RegisterType.Vector, OperandType.V128);
  1299. }
  1300. }
  1301. }