gdkchan c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) %!s(int64=7) %!d(string=hai) anos
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CryptoHelper.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
Inst.cs 36b9ab0e48 Add ARM32 support on the translator (#561) %!s(int64=7) %!d(string=hai) anos
InstEmit32Helper.cs c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) %!s(int64=7) %!d(string=hai) anos
InstEmitAlu.cs 36b9ab0e48 Add ARM32 support on the translator (#561) %!s(int64=7) %!d(string=hai) anos
InstEmitAlu32.cs c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) %!s(int64=7) %!d(string=hai) anos
InstEmitAluHelper.cs c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) %!s(int64=7) %!d(string=hai) anos
InstEmitBfm.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitCcmp.cs 36b9ab0e48 Add ARM32 support on the translator (#561) %!s(int64=7) %!d(string=hai) anos
InstEmitCsel.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitException.cs 36e8e074c9 Misc. CPU improvements (#519) %!s(int64=7) %!d(string=hai) anos
InstEmitFlow.cs 36b9ab0e48 Add ARM32 support on the translator (#561) %!s(int64=7) %!d(string=hai) anos
InstEmitFlow32.cs c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) %!s(int64=7) %!d(string=hai) anos
InstEmitFlowHelper.cs 36b9ab0e48 Add ARM32 support on the translator (#561) %!s(int64=7) %!d(string=hai) anos
InstEmitHash.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitMemory.cs 36e8e074c9 Misc. CPU improvements (#519) %!s(int64=7) %!d(string=hai) anos
InstEmitMemory32.cs c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) %!s(int64=7) %!d(string=hai) anos
InstEmitMemoryEx.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitMemoryHelper.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitMove.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitMul.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdArithmetic.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdCmp.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdCrypto.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdCvt.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdHash.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdHelper.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdLogical.cs ad00fd0244 Fix Sshl_V; Add S/Uqrshl_V, S/Uqshl_V, S/Urshl_V; Add Tests. (#516) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdMemory.cs 36b9ab0e48 Add ARM32 support on the translator (#561) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdMove.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
InstEmitSimdShift.cs 0f5b6dfbe8 Fix Frecpe_S/V and Frsqrte_S/V (full FP emu.). Add Sse Opt. & SoftFloat Impl. for Fcmeq/ge/gt/le/lt_S/V (Reg & Zero), Faddp_S/V, Fmaxp_V, Fminp_V Inst.; add Sse Opt. for Shll_V, S/Ushll_V Inst.; improve Sse Opt. for Xtn_V Inst.. Add Tests. (#543) %!s(int64=7) %!d(string=hai) anos
InstEmitSystem.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
InstEmitter.cs 9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) %!s(int64=7) %!d(string=hai) anos
SoftFallback.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
SoftFloat.cs 8f7fcede7f Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) %!s(int64=7) %!d(string=hai) anos
VectorHelper.cs e603b7afbc Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496) %!s(int64=7) %!d(string=hai) anos