InstEmitSimdMove32.cs 22 KB

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  1. using ARMeilleure.Decoders;
  2. using ARMeilleure.IntermediateRepresentation;
  3. using ARMeilleure.Translation;
  4. using System;
  5. using static ARMeilleure.Instructions.InstEmitHelper;
  6. using static ARMeilleure.Instructions.InstEmitSimdHelper;
  7. using static ARMeilleure.Instructions.InstEmitSimdHelper32;
  8. using static ARMeilleure.IntermediateRepresentation.OperandHelper;
  9. namespace ARMeilleure.Instructions
  10. {
  11. static partial class InstEmit32
  12. {
  13. #region "Masks"
  14. // Same as InstEmitSimdMove, as the instructions do the same thing.
  15. private static readonly long[] _masksE0_Uzp = new long[]
  16. {
  17. 13L << 56 | 09L << 48 | 05L << 40 | 01L << 32 | 12L << 24 | 08L << 16 | 04L << 8 | 00L << 0,
  18. 11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0
  19. };
  20. private static readonly long[] _masksE1_Uzp = new long[]
  21. {
  22. 15L << 56 | 11L << 48 | 07L << 40 | 03L << 32 | 14L << 24 | 10L << 16 | 06L << 8 | 02L << 0,
  23. 15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0
  24. };
  25. #endregion
  26. public static void Vmov_I(ArmEmitterContext context)
  27. {
  28. EmitVectorImmUnaryOp32(context, (op1) => op1);
  29. }
  30. public static void Vmvn_I(ArmEmitterContext context)
  31. {
  32. EmitVectorImmUnaryOp32(context, (op1) => context.BitwiseExclusiveOr(op1, op1));
  33. }
  34. public static void Vmov_GS(ArmEmitterContext context)
  35. {
  36. OpCode32SimdMovGp op = (OpCode32SimdMovGp)context.CurrOp;
  37. Operand vec = GetVecA32(op.Vn >> 2);
  38. if (op.Op == 1)
  39. {
  40. // To general purpose.
  41. Operand value = context.VectorExtract(OperandType.I32, vec, op.Vn & 0x3);
  42. SetIntA32(context, op.Rt, value);
  43. }
  44. else
  45. {
  46. // From general purpose.
  47. Operand value = GetIntA32(context, op.Rt);
  48. context.Copy(vec, context.VectorInsert(vec, value, op.Vn & 0x3));
  49. }
  50. }
  51. public static void Vmov_G1(ArmEmitterContext context)
  52. {
  53. OpCode32SimdMovGpElem op = (OpCode32SimdMovGpElem)context.CurrOp;
  54. int index = op.Index + ((op.Vd & 1) << (3 - op.Size));
  55. if (op.Op == 1)
  56. {
  57. // To general purpose.
  58. Operand value = EmitVectorExtract32(context, op.Vd >> 1, index, op.Size, !op.U);
  59. SetIntA32(context, op.Rt, value);
  60. }
  61. else
  62. {
  63. // From general purpose.
  64. Operand vec = GetVecA32(op.Vd >> 1);
  65. Operand value = GetIntA32(context, op.Rt);
  66. context.Copy(vec, EmitVectorInsert(context, vec, value, index, op.Size));
  67. }
  68. }
  69. public static void Vmov_G2(ArmEmitterContext context)
  70. {
  71. OpCode32SimdMovGpDouble op = (OpCode32SimdMovGpDouble)context.CurrOp;
  72. Operand vec = GetVecA32(op.Vm >> 2);
  73. int vm1 = op.Vm + 1;
  74. bool sameOwnerVec = (op.Vm >> 2) == (vm1 >> 2);
  75. Operand vec2 = sameOwnerVec ? vec : GetVecA32(vm1 >> 2);
  76. if (op.Op == 1)
  77. {
  78. // To general purpose.
  79. Operand lowValue = context.VectorExtract(OperandType.I32, vec, op.Vm & 3);
  80. SetIntA32(context, op.Rt, lowValue);
  81. Operand highValue = context.VectorExtract(OperandType.I32, vec2, vm1 & 3);
  82. SetIntA32(context, op.Rt2, highValue);
  83. }
  84. else
  85. {
  86. // From general purpose.
  87. Operand lowValue = GetIntA32(context, op.Rt);
  88. Operand resultVec = context.VectorInsert(vec, lowValue, op.Vm & 3);
  89. Operand highValue = GetIntA32(context, op.Rt2);
  90. if (sameOwnerVec)
  91. {
  92. context.Copy(vec, context.VectorInsert(resultVec, highValue, vm1 & 3));
  93. }
  94. else
  95. {
  96. context.Copy(vec, resultVec);
  97. context.Copy(vec2, context.VectorInsert(vec2, highValue, vm1 & 3));
  98. }
  99. }
  100. }
  101. public static void Vmov_GD(ArmEmitterContext context)
  102. {
  103. OpCode32SimdMovGpDouble op = (OpCode32SimdMovGpDouble)context.CurrOp;
  104. Operand vec = GetVecA32(op.Vm >> 1);
  105. if (op.Op == 1)
  106. {
  107. // To general purpose.
  108. Operand value = context.VectorExtract(OperandType.I64, vec, op.Vm & 1);
  109. SetIntA32(context, op.Rt, context.ConvertI64ToI32(value));
  110. SetIntA32(context, op.Rt2, context.ConvertI64ToI32(context.ShiftRightUI(value, Const(32))));
  111. }
  112. else
  113. {
  114. // From general purpose.
  115. Operand lowValue = GetIntA32(context, op.Rt);
  116. Operand highValue = GetIntA32(context, op.Rt2);
  117. Operand value = context.BitwiseOr(
  118. context.ZeroExtend32(OperandType.I64, lowValue),
  119. context.ShiftLeft(context.ZeroExtend32(OperandType.I64, highValue), Const(32)));
  120. context.Copy(vec, context.VectorInsert(vec, value, op.Vm & 1));
  121. }
  122. }
  123. public static void Vmovl(ArmEmitterContext context)
  124. {
  125. OpCode32SimdLong op = (OpCode32SimdLong)context.CurrOp;
  126. Operand res = context.VectorZero();
  127. int elems = op.GetBytesCount() >> op.Size;
  128. for (int index = 0; index < elems; index++)
  129. {
  130. Operand me = EmitVectorExtract32(context, op.Qm, op.Im + index, op.Size, !op.U);
  131. if (op.Size == 2)
  132. {
  133. if (op.U)
  134. {
  135. me = context.ZeroExtend32(OperandType.I64, me);
  136. }
  137. else
  138. {
  139. me = context.SignExtend32(OperandType.I64, me);
  140. }
  141. }
  142. res = EmitVectorInsert(context, res, me, index, op.Size + 1);
  143. }
  144. context.Copy(GetVecA32(op.Qd), res);
  145. }
  146. public static void Vtbl(ArmEmitterContext context)
  147. {
  148. OpCode32SimdTbl op = (OpCode32SimdTbl)context.CurrOp;
  149. bool extension = op.Opc == 1;
  150. int length = op.Length + 1;
  151. if (Optimizations.UseSsse3)
  152. {
  153. Operand d = GetVecA32(op.Qd);
  154. Operand m = EmitMoveDoubleWordToSide(context, GetVecA32(op.Qm), op.Vm, 0);
  155. Operand res;
  156. Operand mask = X86GetAllElements(context, 0x0707070707070707L);
  157. // Fast path for single register table.
  158. {
  159. Operand n = EmitMoveDoubleWordToSide(context, GetVecA32(op.Qn), op.Vn, 0);
  160. Operand mMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, m, mask);
  161. mMask = context.AddIntrinsic(Intrinsic.X86Por, mMask, m);
  162. res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mMask);
  163. }
  164. for (int index = 1; index < length; index++)
  165. {
  166. int newVn = (op.Vn + index) & 0x1F;
  167. (int qn, int ind) = GetQuadwordAndSubindex(newVn, op.RegisterSize);
  168. Operand ni = EmitMoveDoubleWordToSide(context, GetVecA32(qn), newVn, 0);
  169. Operand idxMask = X86GetAllElements(context, 0x0808080808080808L * index);
  170. Operand mSubMask = context.AddIntrinsic(Intrinsic.X86Psubb, m, idxMask);
  171. Operand mMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, mSubMask, mask);
  172. mMask = context.AddIntrinsic(Intrinsic.X86Por, mMask, mSubMask);
  173. Operand res2 = context.AddIntrinsic(Intrinsic.X86Pshufb, ni, mMask);
  174. res = context.AddIntrinsic(Intrinsic.X86Por, res, res2);
  175. }
  176. if (extension)
  177. {
  178. Operand idxMask = X86GetAllElements(context, (0x0808080808080808L * length) - 0x0101010101010101L);
  179. Operand zeroMask = context.VectorZero();
  180. Operand mPosMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, m, idxMask);
  181. Operand mNegMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, zeroMask, m);
  182. Operand mMask = context.AddIntrinsic(Intrinsic.X86Por, mPosMask, mNegMask);
  183. Operand dMask = context.AddIntrinsic(Intrinsic.X86Pand, EmitMoveDoubleWordToSide(context, d, op.Vd, 0), mMask);
  184. res = context.AddIntrinsic(Intrinsic.X86Por, res, dMask);
  185. }
  186. res = EmitMoveDoubleWordToSide(context, res, 0, op.Vd);
  187. context.Copy(d, EmitDoubleWordInsert(context, d, res, op.Vd));
  188. }
  189. else
  190. {
  191. int elems = op.GetBytesCount() >> op.Size;
  192. (int Qx, int Ix)[] tableTuples = new (int, int)[length];
  193. for (int i = 0; i < length; i++)
  194. {
  195. tableTuples[i] = GetQuadwordAndSubindex(op.Vn + i, op.RegisterSize);
  196. }
  197. int byteLength = length * 8;
  198. Operand res = GetVecA32(op.Qd);
  199. Operand m = GetVecA32(op.Qm);
  200. for (int index = 0; index < elems; index++)
  201. {
  202. Operand selectedIndex = context.ZeroExtend8(OperandType.I32, context.VectorExtract8(m, index + op.Im));
  203. Operand inRange = context.ICompareLess(selectedIndex, Const(byteLength));
  204. Operand elemRes = null; // Note: This is I64 for ease of calculation.
  205. // TODO: Branching rather than conditional select.
  206. // Get indexed byte.
  207. // To simplify (ha) the il, we get bytes from every vector and use a nested conditional select to choose the right result.
  208. // This does have to extract `length` times for every element but certainly not as bad as it could be.
  209. // Which vector number is the index on.
  210. Operand vecIndex = context.ShiftRightUI(selectedIndex, Const(3));
  211. // What should we shift by to extract it.
  212. Operand subVecIndexShift = context.ShiftLeft(context.BitwiseAnd(selectedIndex, Const(7)), Const(3));
  213. for (int i = 0; i < length; i++)
  214. {
  215. (int qx, int ix) = tableTuples[i];
  216. // Get the whole vector, we'll get a byte out of it.
  217. Operand lookupResult;
  218. if (qx == op.Qd)
  219. {
  220. // Result contains the current state of the vector.
  221. lookupResult = context.VectorExtract(OperandType.I64, res, ix);
  222. }
  223. else
  224. {
  225. lookupResult = EmitVectorExtract32(context, qx, ix, 3, false); // I64
  226. }
  227. lookupResult = context.ShiftRightUI(lookupResult, subVecIndexShift); // Get the relevant byte from this vector.
  228. if (i == 0)
  229. {
  230. elemRes = lookupResult; // First result is always default.
  231. }
  232. else
  233. {
  234. Operand isThisElem = context.ICompareEqual(vecIndex, Const(i));
  235. elemRes = context.ConditionalSelect(isThisElem, lookupResult, elemRes);
  236. }
  237. }
  238. Operand fallback = (extension) ? context.ZeroExtend32(OperandType.I64, EmitVectorExtract32(context, op.Qd, index + op.Id, 0, false)) : Const(0L);
  239. res = EmitVectorInsert(context, res, context.ConditionalSelect(inRange, elemRes, fallback), index + op.Id, 0);
  240. }
  241. context.Copy(GetVecA32(op.Qd), res);
  242. }
  243. }
  244. public static void Vtrn(ArmEmitterContext context)
  245. {
  246. OpCode32SimdCmpZ op = (OpCode32SimdCmpZ)context.CurrOp;
  247. if (Optimizations.UseSsse3)
  248. {
  249. EmitVectorShuffleOpSimd32(context, (m, d) =>
  250. {
  251. Operand mask = null;
  252. if (op.Size < 3)
  253. {
  254. long maskE0 = EvenMasks[op.Size];
  255. long maskE1 = OddMasks[op.Size];
  256. mask = X86GetScalar(context, maskE0);
  257. mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
  258. }
  259. if (op.Size < 3)
  260. {
  261. d = context.AddIntrinsic(Intrinsic.X86Pshufb, d, mask);
  262. m = context.AddIntrinsic(Intrinsic.X86Pshufb, m, mask);
  263. }
  264. Operand resD = context.AddIntrinsic(X86PunpcklInstruction[op.Size], d, m);
  265. Operand resM = context.AddIntrinsic(X86PunpckhInstruction[op.Size], d, m);
  266. return (resM, resD);
  267. });
  268. }
  269. else
  270. {
  271. int elems = op.GetBytesCount() >> op.Size;
  272. int pairs = elems >> 1;
  273. bool overlap = op.Qm == op.Qd;
  274. Operand resD = GetVecA32(op.Qd);
  275. Operand resM = GetVecA32(op.Qm);
  276. for (int index = 0; index < pairs; index++)
  277. {
  278. int pairIndex = index << 1;
  279. Operand d2 = EmitVectorExtract32(context, op.Qd, pairIndex + 1 + op.Id, op.Size, false);
  280. Operand m1 = EmitVectorExtract32(context, op.Qm, pairIndex + op.Im, op.Size, false);
  281. resD = EmitVectorInsert(context, resD, m1, pairIndex + 1 + op.Id, op.Size);
  282. if (overlap)
  283. {
  284. resM = resD;
  285. }
  286. resM = EmitVectorInsert(context, resM, d2, pairIndex + op.Im, op.Size);
  287. if (overlap)
  288. {
  289. resD = resM;
  290. }
  291. }
  292. context.Copy(GetVecA32(op.Qd), resD);
  293. if (!overlap)
  294. {
  295. context.Copy(GetVecA32(op.Qm), resM);
  296. }
  297. }
  298. }
  299. public static void Vzip(ArmEmitterContext context)
  300. {
  301. OpCode32SimdCmpZ op = (OpCode32SimdCmpZ)context.CurrOp;
  302. if (Optimizations.UseSse2)
  303. {
  304. EmitVectorShuffleOpSimd32(context, (m, d) =>
  305. {
  306. if (op.RegisterSize == RegisterSize.Simd128)
  307. {
  308. Operand resD = context.AddIntrinsic(X86PunpcklInstruction[op.Size], d, m);
  309. Operand resM = context.AddIntrinsic(X86PunpckhInstruction[op.Size], d, m);
  310. return (resM, resD);
  311. }
  312. else
  313. {
  314. Operand res = context.AddIntrinsic(X86PunpcklInstruction[op.Size], d, m);
  315. Operand resD = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, res, context.VectorZero());
  316. Operand resM = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, res, context.VectorZero());
  317. return (resM, resD);
  318. }
  319. });
  320. }
  321. else
  322. {
  323. int elems = op.GetBytesCount() >> op.Size;
  324. int pairs = elems >> 1;
  325. bool overlap = op.Qm == op.Qd;
  326. Operand resD = GetVecA32(op.Qd);
  327. Operand resM = GetVecA32(op.Qm);
  328. for (int index = 0; index < pairs; index++)
  329. {
  330. int pairIndex = index << 1;
  331. Operand dRowD = EmitVectorExtract32(context, op.Qd, index + op.Id, op.Size, false);
  332. Operand mRowD = EmitVectorExtract32(context, op.Qm, index + op.Im, op.Size, false);
  333. Operand dRowM = EmitVectorExtract32(context, op.Qd, index + op.Id + pairs, op.Size, false);
  334. Operand mRowM = EmitVectorExtract32(context, op.Qm, index + op.Im + pairs, op.Size, false);
  335. resD = EmitVectorInsert(context, resD, dRowD, pairIndex + op.Id, op.Size);
  336. resD = EmitVectorInsert(context, resD, mRowD, pairIndex + 1 + op.Id, op.Size);
  337. if (overlap)
  338. {
  339. resM = resD;
  340. }
  341. resM = EmitVectorInsert(context, resM, dRowM, pairIndex + op.Im, op.Size);
  342. resM = EmitVectorInsert(context, resM, mRowM, pairIndex + 1 + op.Im, op.Size);
  343. if (overlap)
  344. {
  345. resD = resM;
  346. }
  347. }
  348. context.Copy(GetVecA32(op.Qd), resD);
  349. if (!overlap)
  350. {
  351. context.Copy(GetVecA32(op.Qm), resM);
  352. }
  353. }
  354. }
  355. public static void Vuzp(ArmEmitterContext context)
  356. {
  357. OpCode32SimdCmpZ op = (OpCode32SimdCmpZ)context.CurrOp;
  358. if (Optimizations.UseSsse3)
  359. {
  360. EmitVectorShuffleOpSimd32(context, (m, d) =>
  361. {
  362. if (op.RegisterSize == RegisterSize.Simd128)
  363. {
  364. Operand mask = null;
  365. if (op.Size < 3)
  366. {
  367. long maskE0 = EvenMasks[op.Size];
  368. long maskE1 = OddMasks[op.Size];
  369. mask = X86GetScalar(context, maskE0);
  370. mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
  371. d = context.AddIntrinsic(Intrinsic.X86Pshufb, d, mask);
  372. m = context.AddIntrinsic(Intrinsic.X86Pshufb, m, mask);
  373. }
  374. Operand resD = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, d, m);
  375. Operand resM = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, d, m);
  376. return (resM, resD);
  377. }
  378. else
  379. {
  380. Intrinsic punpcklInst = X86PunpcklInstruction[op.Size];
  381. Operand res = context.AddIntrinsic(punpcklInst, d, m);
  382. if (op.Size < 2)
  383. {
  384. long maskE0 = _masksE0_Uzp[op.Size];
  385. long maskE1 = _masksE1_Uzp[op.Size];
  386. Operand mask = X86GetScalar(context, maskE0);
  387. mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
  388. res = context.AddIntrinsic(Intrinsic.X86Pshufb, res, mask);
  389. }
  390. Operand resD = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, res, context.VectorZero());
  391. Operand resM = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, res, context.VectorZero());
  392. return (resM, resD);
  393. }
  394. });
  395. }
  396. else
  397. {
  398. int elems = op.GetBytesCount() >> op.Size;
  399. int pairs = elems >> 1;
  400. bool overlap = op.Qm == op.Qd;
  401. Operand resD = GetVecA32(op.Qd);
  402. Operand resM = GetVecA32(op.Qm);
  403. for (int index = 0; index < elems; index++)
  404. {
  405. Operand dIns, mIns;
  406. if (index >= pairs)
  407. {
  408. int pairIndex = index - pairs;
  409. dIns = EmitVectorExtract32(context, op.Qm, (pairIndex << 1) + op.Im, op.Size, false);
  410. mIns = EmitVectorExtract32(context, op.Qm, ((pairIndex << 1) | 1) + op.Im, op.Size, false);
  411. }
  412. else
  413. {
  414. dIns = EmitVectorExtract32(context, op.Qd, (index << 1) + op.Id, op.Size, false);
  415. mIns = EmitVectorExtract32(context, op.Qd, ((index << 1) | 1) + op.Id, op.Size, false);
  416. }
  417. resD = EmitVectorInsert(context, resD, dIns, index + op.Id, op.Size);
  418. if (overlap)
  419. {
  420. resM = resD;
  421. }
  422. resM = EmitVectorInsert(context, resM, mIns, index + op.Im, op.Size);
  423. if (overlap)
  424. {
  425. resD = resM;
  426. }
  427. }
  428. context.Copy(GetVecA32(op.Qd), resD);
  429. if (!overlap)
  430. {
  431. context.Copy(GetVecA32(op.Qm), resM);
  432. }
  433. }
  434. }
  435. public static void EmitVectorShuffleOpSimd32(ArmEmitterContext context, Func<Operand, Operand, (Operand, Operand)> shuffleFunc)
  436. {
  437. OpCode32Simd op = (OpCode32Simd)context.CurrOp;
  438. Operand m = GetVecA32(op.Qm);
  439. Operand d = GetVecA32(op.Qd);
  440. Operand initialM = m;
  441. Operand initialD = d;
  442. if (!op.Q) // Register swap: move relevant doubleword to side 0, for consistency.
  443. {
  444. m = EmitMoveDoubleWordToSide(context, m, op.Vm, 0);
  445. d = EmitMoveDoubleWordToSide(context, d, op.Vd, 0);
  446. }
  447. (Operand resM, Operand resD) = shuffleFunc(m, d);
  448. bool overlap = op.Qm == op.Qd;
  449. if (!op.Q) // Register insert.
  450. {
  451. resM = EmitDoubleWordInsert(context, initialM, EmitMoveDoubleWordToSide(context, resM, 0, op.Vm), op.Vm);
  452. resD = EmitDoubleWordInsert(context, overlap ? resM : initialD, EmitMoveDoubleWordToSide(context, resD, 0, op.Vd), op.Vd);
  453. }
  454. if (!overlap)
  455. {
  456. context.Copy(initialM, resM);
  457. }
  458. context.Copy(initialD, resD);
  459. }
  460. }
  461. }