InstEmitSimdCvt.cs 62 KB

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  1. using ARMeilleure.Decoders;
  2. using ARMeilleure.IntermediateRepresentation;
  3. using ARMeilleure.State;
  4. using ARMeilleure.Translation;
  5. using System;
  6. using System.Diagnostics;
  7. using System.Reflection;
  8. using static ARMeilleure.Instructions.InstEmitHelper;
  9. using static ARMeilleure.Instructions.InstEmitSimdHelper;
  10. using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
  11. namespace ARMeilleure.Instructions
  12. {
  13. using Func1I = Func<Operand, Operand>;
  14. static partial class InstEmit
  15. {
  16. public static void Fcvt_S(ArmEmitterContext context)
  17. {
  18. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  19. if (op.Size == 0 && op.Opc == 1) // Single -> Double.
  20. {
  21. if (Optimizations.UseSse2)
  22. {
  23. Operand n = GetVec(op.Rn);
  24. Operand res = context.AddIntrinsic(Intrinsic.X86Cvtss2sd, context.VectorZero(), n);
  25. context.Copy(GetVec(op.Rd), res);
  26. }
  27. else
  28. {
  29. Operand ne = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), 0);
  30. Operand res = context.ConvertToFP(OperandType.FP64, ne);
  31. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  32. }
  33. }
  34. else if (op.Size == 1 && op.Opc == 0) // Double -> Single.
  35. {
  36. if (Optimizations.UseSse2)
  37. {
  38. Operand n = GetVec(op.Rn);
  39. Operand res = context.AddIntrinsic(Intrinsic.X86Cvtsd2ss, context.VectorZero(), n);
  40. context.Copy(GetVec(op.Rd), res);
  41. }
  42. else
  43. {
  44. Operand ne = context.VectorExtract(OperandType.FP64, GetVec(op.Rn), 0);
  45. Operand res = context.ConvertToFP(OperandType.FP32, ne);
  46. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  47. }
  48. }
  49. else if (op.Size == 0 && op.Opc == 3) // Single -> Half.
  50. {
  51. if (Optimizations.UseF16c)
  52. {
  53. Debug.Assert(!Optimizations.ForceLegacySse);
  54. Operand n = GetVec(op.Rn);
  55. Operand res = context.AddIntrinsic(Intrinsic.X86Vcvtps2ph, n, Const(X86GetRoundControl(FPRoundingMode.ToNearest)));
  56. res = context.AddIntrinsic(Intrinsic.X86Pslldq, res, Const(14)); // VectorZeroUpper112()
  57. res = context.AddIntrinsic(Intrinsic.X86Psrldq, res, Const(14));
  58. context.Copy(GetVec(op.Rd), res);
  59. }
  60. else
  61. {
  62. Operand ne = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), 0);
  63. context.StoreToContext();
  64. Operand res = context.Call(typeof(SoftFloat32_16).GetMethod(nameof(SoftFloat32_16.FPConvert)), ne);
  65. context.LoadFromContext();
  66. res = context.ZeroExtend16(OperandType.I64, res);
  67. context.Copy(GetVec(op.Rd), EmitVectorInsert(context, context.VectorZero(), res, 0, 1));
  68. }
  69. }
  70. else if (op.Size == 3 && op.Opc == 0) // Half -> Single.
  71. {
  72. if (Optimizations.UseF16c)
  73. {
  74. Debug.Assert(!Optimizations.ForceLegacySse);
  75. Operand res = context.AddIntrinsic(Intrinsic.X86Vcvtph2ps, GetVec(op.Rn));
  76. res = context.VectorZeroUpper96(res);
  77. context.Copy(GetVec(op.Rd), res);
  78. }
  79. else
  80. {
  81. Operand ne = EmitVectorExtractZx(context, op.Rn, 0, 1);
  82. context.StoreToContext();
  83. Operand res = context.Call(typeof(SoftFloat16_32).GetMethod(nameof(SoftFloat16_32.FPConvert)), ne);
  84. context.LoadFromContext();
  85. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  86. }
  87. }
  88. else if (op.Size == 1 && op.Opc == 3) // Double -> Half.
  89. {
  90. if (Optimizations.UseF16c)
  91. {
  92. Debug.Assert(!Optimizations.ForceLegacySse);
  93. Operand n = GetVec(op.Rn);
  94. Operand res = context.AddIntrinsic(Intrinsic.X86Cvtsd2ss, context.VectorZero(), n);
  95. res = context.AddIntrinsic(Intrinsic.X86Vcvtps2ph, res, Const(X86GetRoundControl(FPRoundingMode.ToNearest)));
  96. context.Copy(GetVec(op.Rd), res);
  97. }
  98. else
  99. {
  100. Operand ne = context.VectorExtract(OperandType.FP64, GetVec(op.Rn), 0);
  101. context.StoreToContext();
  102. Operand res = context.Call(typeof(SoftFloat64_16).GetMethod(nameof(SoftFloat64_16.FPConvert)), ne);
  103. context.LoadFromContext();
  104. res = context.ZeroExtend16(OperandType.I64, res);
  105. context.Copy(GetVec(op.Rd), EmitVectorInsert(context, context.VectorZero(), res, 0, 1));
  106. }
  107. }
  108. else if (op.Size == 3 && op.Opc == 1) // Half -> Double.
  109. {
  110. if (Optimizations.UseF16c)
  111. {
  112. Operand n = GetVec(op.Rn);
  113. Operand res = context.AddIntrinsic(Intrinsic.X86Vcvtph2ps, GetVec(op.Rn));
  114. res = context.AddIntrinsic(Intrinsic.X86Cvtss2sd, context.VectorZero(), res);
  115. res = context.VectorZeroUpper64(res);
  116. context.Copy(GetVec(op.Rd), res);
  117. }
  118. else
  119. {
  120. Operand ne = EmitVectorExtractZx(context, op.Rn, 0, 1);
  121. context.StoreToContext();
  122. Operand res = context.Call(typeof(SoftFloat16_64).GetMethod(nameof(SoftFloat16_64.FPConvert)), ne);
  123. context.LoadFromContext();
  124. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  125. }
  126. }
  127. else // Invalid encoding.
  128. {
  129. Debug.Assert(false, $"type == {op.Size} && opc == {op.Opc}");
  130. }
  131. }
  132. public static void Fcvtas_Gp(ArmEmitterContext context)
  133. {
  134. if (Optimizations.UseSse41)
  135. {
  136. EmitSse41Fcvts_Gp(context, FPRoundingMode.ToNearestAway, isFixed: false);
  137. }
  138. else
  139. {
  140. EmitFcvt_s_Gp(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1));
  141. }
  142. }
  143. public static void Fcvtas_S(ArmEmitterContext context)
  144. {
  145. if (Optimizations.UseSse41)
  146. {
  147. EmitSse41FcvtsOpF(context, FPRoundingMode.ToNearestAway, scalar: true);
  148. }
  149. else
  150. {
  151. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: true, scalar: true);
  152. }
  153. }
  154. public static void Fcvtas_V(ArmEmitterContext context)
  155. {
  156. if (Optimizations.UseSse41)
  157. {
  158. EmitSse41FcvtsOpF(context, FPRoundingMode.ToNearestAway, scalar: false);
  159. }
  160. else
  161. {
  162. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: true, scalar: false);
  163. }
  164. }
  165. public static void Fcvtau_Gp(ArmEmitterContext context)
  166. {
  167. if (Optimizations.UseSse41)
  168. {
  169. EmitSse41Fcvtu_Gp(context, FPRoundingMode.ToNearestAway, isFixed: false);
  170. }
  171. else
  172. {
  173. EmitFcvt_u_Gp(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1));
  174. }
  175. }
  176. public static void Fcvtau_S(ArmEmitterContext context)
  177. {
  178. if (Optimizations.UseSse41)
  179. {
  180. EmitSse41FcvtuOpF(context, FPRoundingMode.ToNearestAway, scalar: true);
  181. }
  182. else
  183. {
  184. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: false, scalar: true);
  185. }
  186. }
  187. public static void Fcvtau_V(ArmEmitterContext context)
  188. {
  189. if (Optimizations.UseSse41)
  190. {
  191. EmitSse41FcvtuOpF(context, FPRoundingMode.ToNearestAway, scalar: false);
  192. }
  193. else
  194. {
  195. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: false, scalar: false);
  196. }
  197. }
  198. public static void Fcvtl_V(ArmEmitterContext context)
  199. {
  200. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  201. int sizeF = op.Size & 1;
  202. if (Optimizations.UseSse2 && sizeF == 1)
  203. {
  204. Operand n = GetVec(op.Rn);
  205. Operand res = op.RegisterSize == RegisterSize.Simd128 ? context.AddIntrinsic(Intrinsic.X86Movhlps, n, n) : n;
  206. res = context.AddIntrinsic(Intrinsic.X86Cvtps2pd, res);
  207. context.Copy(GetVec(op.Rd), res);
  208. }
  209. else if (Optimizations.UseF16c && sizeF == 0)
  210. {
  211. Debug.Assert(!Optimizations.ForceLegacySse);
  212. Operand n = GetVec(op.Rn);
  213. Operand res = op.RegisterSize == RegisterSize.Simd128 ? context.AddIntrinsic(Intrinsic.X86Movhlps, n, n) : n;
  214. res = context.AddIntrinsic(Intrinsic.X86Vcvtph2ps, res);
  215. context.Copy(GetVec(op.Rd), res);
  216. }
  217. else
  218. {
  219. Operand res = context.VectorZero();
  220. int elems = 4 >> sizeF;
  221. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  222. for (int index = 0; index < elems; index++)
  223. {
  224. if (sizeF == 0)
  225. {
  226. Operand ne = EmitVectorExtractZx(context, op.Rn, part + index, 1);
  227. context.StoreToContext();
  228. Operand e = context.Call(typeof(SoftFloat16_32).GetMethod(nameof(SoftFloat16_32.FPConvert)), ne);
  229. context.LoadFromContext();
  230. res = context.VectorInsert(res, e, index);
  231. }
  232. else /* if (sizeF == 1) */
  233. {
  234. Operand ne = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), part + index);
  235. Operand e = context.ConvertToFP(OperandType.FP64, ne);
  236. res = context.VectorInsert(res, e, index);
  237. }
  238. }
  239. context.Copy(GetVec(op.Rd), res);
  240. }
  241. }
  242. public static void Fcvtms_Gp(ArmEmitterContext context)
  243. {
  244. if (Optimizations.UseSse41)
  245. {
  246. EmitSse41Fcvts_Gp(context, FPRoundingMode.TowardsMinusInfinity, isFixed: false);
  247. }
  248. else
  249. {
  250. EmitFcvt_s_Gp(context, (op1) => EmitUnaryMathCall(context, nameof(Math.Floor), op1));
  251. }
  252. }
  253. public static void Fcvtms_V(ArmEmitterContext context)
  254. {
  255. if (Optimizations.UseSse41)
  256. {
  257. EmitSse41FcvtsOpF(context, FPRoundingMode.TowardsMinusInfinity, scalar: false);
  258. }
  259. else
  260. {
  261. EmitFcvt(context, (op1) => EmitUnaryMathCall(context, nameof(Math.Floor), op1), signed: true, scalar: false);
  262. }
  263. }
  264. public static void Fcvtmu_Gp(ArmEmitterContext context)
  265. {
  266. if (Optimizations.UseSse41)
  267. {
  268. EmitSse41Fcvtu_Gp(context, FPRoundingMode.TowardsMinusInfinity, isFixed: false);
  269. }
  270. else
  271. {
  272. EmitFcvt_u_Gp(context, (op1) => EmitUnaryMathCall(context, nameof(Math.Floor), op1));
  273. }
  274. }
  275. public static void Fcvtn_V(ArmEmitterContext context)
  276. {
  277. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  278. int sizeF = op.Size & 1;
  279. if (Optimizations.UseSse2 && sizeF == 1)
  280. {
  281. Operand d = GetVec(op.Rd);
  282. Intrinsic movInst = op.RegisterSize == RegisterSize.Simd128 ? Intrinsic.X86Movlhps : Intrinsic.X86Movhlps;
  283. Operand nInt = context.AddIntrinsic(Intrinsic.X86Cvtpd2ps, GetVec(op.Rn));
  284. nInt = context.AddIntrinsic(Intrinsic.X86Movlhps, nInt, nInt);
  285. Operand res = context.VectorZeroUpper64(d);
  286. res = context.AddIntrinsic(movInst, res, nInt);
  287. context.Copy(d, res);
  288. }
  289. else if (Optimizations.UseF16c && sizeF == 0)
  290. {
  291. Debug.Assert(!Optimizations.ForceLegacySse);
  292. Operand d = GetVec(op.Rd);
  293. Operand n = GetVec(op.Rn);
  294. Intrinsic movInst = op.RegisterSize == RegisterSize.Simd128 ? Intrinsic.X86Movlhps : Intrinsic.X86Movhlps;
  295. Operand nInt = context.AddIntrinsic(Intrinsic.X86Vcvtps2ph, n, Const(X86GetRoundControl(FPRoundingMode.ToNearest)));
  296. nInt = context.AddIntrinsic(Intrinsic.X86Movlhps, nInt, nInt);
  297. Operand res = context.VectorZeroUpper64(d);
  298. res = context.AddIntrinsic(movInst, res, nInt);
  299. context.Copy(d, res);
  300. }
  301. else
  302. {
  303. OperandType type = sizeF == 0 ? OperandType.FP32 : OperandType.FP64;
  304. int elems = 4 >> sizeF;
  305. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  306. Operand d = GetVec(op.Rd);
  307. Operand res = part == 0 ? context.VectorZero() : context.Copy(d);
  308. for (int index = 0; index < elems; index++)
  309. {
  310. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  311. if (sizeF == 0)
  312. {
  313. context.StoreToContext();
  314. Operand e = context.Call(typeof(SoftFloat32_16).GetMethod(nameof(SoftFloat32_16.FPConvert)), ne);
  315. context.LoadFromContext();
  316. res = EmitVectorInsert(context, res, e, part + index, 1);
  317. }
  318. else /* if (sizeF == 1) */
  319. {
  320. Operand e = context.ConvertToFP(OperandType.FP32, ne);
  321. res = context.VectorInsert(res, e, part + index);
  322. }
  323. }
  324. context.Copy(d, res);
  325. }
  326. }
  327. public static void Fcvtns_Gp(ArmEmitterContext context)
  328. {
  329. if (Optimizations.UseSse41)
  330. {
  331. EmitSse41Fcvts_Gp(context, FPRoundingMode.ToNearest, isFixed: false);
  332. }
  333. else
  334. {
  335. EmitFcvt_s_Gp(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1));
  336. }
  337. }
  338. public static void Fcvtns_S(ArmEmitterContext context)
  339. {
  340. if (Optimizations.UseSse41)
  341. {
  342. EmitSse41FcvtsOpF(context, FPRoundingMode.ToNearest, scalar: true);
  343. }
  344. else
  345. {
  346. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: true, scalar: true);
  347. }
  348. }
  349. public static void Fcvtns_V(ArmEmitterContext context)
  350. {
  351. if (Optimizations.UseSse41)
  352. {
  353. EmitSse41FcvtsOpF(context, FPRoundingMode.ToNearest, scalar: false);
  354. }
  355. else
  356. {
  357. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: true, scalar: false);
  358. }
  359. }
  360. public static void Fcvtnu_S(ArmEmitterContext context)
  361. {
  362. if (Optimizations.UseSse41)
  363. {
  364. EmitSse41FcvtuOpF(context, FPRoundingMode.ToNearest, scalar: true);
  365. }
  366. else
  367. {
  368. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: false, scalar: true);
  369. }
  370. }
  371. public static void Fcvtnu_V(ArmEmitterContext context)
  372. {
  373. if (Optimizations.UseSse41)
  374. {
  375. EmitSse41FcvtuOpF(context, FPRoundingMode.ToNearest, scalar: false);
  376. }
  377. else
  378. {
  379. EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: false, scalar: false);
  380. }
  381. }
  382. public static void Fcvtps_Gp(ArmEmitterContext context)
  383. {
  384. if (Optimizations.UseSse41)
  385. {
  386. EmitSse41Fcvts_Gp(context, FPRoundingMode.TowardsPlusInfinity, isFixed: false);
  387. }
  388. else
  389. {
  390. EmitFcvt_s_Gp(context, (op1) => EmitUnaryMathCall(context, nameof(Math.Ceiling), op1));
  391. }
  392. }
  393. public static void Fcvtpu_Gp(ArmEmitterContext context)
  394. {
  395. if (Optimizations.UseSse41)
  396. {
  397. EmitSse41Fcvtu_Gp(context, FPRoundingMode.TowardsPlusInfinity, isFixed: false);
  398. }
  399. else
  400. {
  401. EmitFcvt_u_Gp(context, (op1) => EmitUnaryMathCall(context, nameof(Math.Ceiling), op1));
  402. }
  403. }
  404. public static void Fcvtzs_Gp(ArmEmitterContext context)
  405. {
  406. if (Optimizations.UseSse41)
  407. {
  408. EmitSse41Fcvts_Gp(context, FPRoundingMode.TowardsZero, isFixed: false);
  409. }
  410. else
  411. {
  412. EmitFcvt_s_Gp(context, (op1) => op1);
  413. }
  414. }
  415. public static void Fcvtzs_Gp_Fixed(ArmEmitterContext context)
  416. {
  417. if (Optimizations.UseSse41)
  418. {
  419. EmitSse41Fcvts_Gp(context, FPRoundingMode.TowardsZero, isFixed: true);
  420. }
  421. else
  422. {
  423. EmitFcvtzs_Gp_Fixed(context);
  424. }
  425. }
  426. public static void Fcvtzs_S(ArmEmitterContext context)
  427. {
  428. if (Optimizations.UseSse41)
  429. {
  430. EmitSse41FcvtsOpF(context, FPRoundingMode.TowardsZero, scalar: true);
  431. }
  432. else
  433. {
  434. EmitFcvtz(context, signed: true, scalar: true);
  435. }
  436. }
  437. public static void Fcvtzs_V(ArmEmitterContext context)
  438. {
  439. if (Optimizations.UseSse41)
  440. {
  441. EmitSse41FcvtsOpF(context, FPRoundingMode.TowardsZero, scalar: false);
  442. }
  443. else
  444. {
  445. EmitFcvtz(context, signed: true, scalar: false);
  446. }
  447. }
  448. public static void Fcvtzs_V_Fixed(ArmEmitterContext context)
  449. {
  450. if (Optimizations.UseSse41)
  451. {
  452. EmitSse41FcvtsOpF(context, FPRoundingMode.TowardsZero, scalar: false);
  453. }
  454. else
  455. {
  456. EmitFcvtz(context, signed: true, scalar: false);
  457. }
  458. }
  459. public static void Fcvtzu_Gp(ArmEmitterContext context)
  460. {
  461. if (Optimizations.UseSse41)
  462. {
  463. EmitSse41Fcvtu_Gp(context, FPRoundingMode.TowardsZero, isFixed: false);
  464. }
  465. else
  466. {
  467. EmitFcvt_u_Gp(context, (op1) => op1);
  468. }
  469. }
  470. public static void Fcvtzu_Gp_Fixed(ArmEmitterContext context)
  471. {
  472. if (Optimizations.UseSse41)
  473. {
  474. EmitSse41Fcvtu_Gp(context, FPRoundingMode.TowardsZero, isFixed: true);
  475. }
  476. else
  477. {
  478. EmitFcvtzu_Gp_Fixed(context);
  479. }
  480. }
  481. public static void Fcvtzu_S(ArmEmitterContext context)
  482. {
  483. if (Optimizations.UseSse41)
  484. {
  485. EmitSse41FcvtuOpF(context, FPRoundingMode.TowardsZero, scalar: true);
  486. }
  487. else
  488. {
  489. EmitFcvtz(context, signed: false, scalar: true);
  490. }
  491. }
  492. public static void Fcvtzu_V(ArmEmitterContext context)
  493. {
  494. if (Optimizations.UseSse41)
  495. {
  496. EmitSse41FcvtuOpF(context, FPRoundingMode.TowardsZero, scalar: false);
  497. }
  498. else
  499. {
  500. EmitFcvtz(context, signed: false, scalar: false);
  501. }
  502. }
  503. public static void Fcvtzu_V_Fixed(ArmEmitterContext context)
  504. {
  505. if (Optimizations.UseSse41)
  506. {
  507. EmitSse41FcvtuOpF(context, FPRoundingMode.TowardsZero, scalar: false);
  508. }
  509. else
  510. {
  511. EmitFcvtz(context, signed: false, scalar: false);
  512. }
  513. }
  514. public static void Scvtf_Gp(ArmEmitterContext context)
  515. {
  516. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  517. Operand res = GetIntOrZR(context, op.Rn);
  518. if (op.RegisterSize == RegisterSize.Int32)
  519. {
  520. res = context.SignExtend32(OperandType.I64, res);
  521. }
  522. res = EmitFPConvert(context, res, op.Size, signed: true);
  523. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  524. }
  525. public static void Scvtf_Gp_Fixed(ArmEmitterContext context)
  526. {
  527. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  528. Operand res = GetIntOrZR(context, op.Rn);
  529. if (op.RegisterSize == RegisterSize.Int32)
  530. {
  531. res = context.SignExtend32(OperandType.I64, res);
  532. }
  533. res = EmitFPConvert(context, res, op.Size, signed: true);
  534. res = EmitI2fFBitsMul(context, res, op.FBits);
  535. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  536. }
  537. public static void Scvtf_S(ArmEmitterContext context)
  538. {
  539. if (Optimizations.UseSse2)
  540. {
  541. EmitSse2ScvtfOp(context, scalar: true);
  542. }
  543. else
  544. {
  545. EmitCvtf(context, signed: true, scalar: true);
  546. }
  547. }
  548. public static void Scvtf_S_Fixed(ArmEmitterContext context)
  549. {
  550. if (Optimizations.UseSse2)
  551. {
  552. EmitSse2ScvtfOp(context, scalar: true);
  553. }
  554. else
  555. {
  556. EmitCvtf(context, signed: true, scalar: true);
  557. }
  558. }
  559. public static void Scvtf_V(ArmEmitterContext context)
  560. {
  561. if (Optimizations.UseSse2)
  562. {
  563. EmitSse2ScvtfOp(context, scalar: false);
  564. }
  565. else
  566. {
  567. EmitCvtf(context, signed: true, scalar: false);
  568. }
  569. }
  570. public static void Scvtf_V_Fixed(ArmEmitterContext context)
  571. {
  572. if (Optimizations.UseSse2)
  573. {
  574. EmitSse2ScvtfOp(context, scalar: false);
  575. }
  576. else
  577. {
  578. EmitCvtf(context, signed: true, scalar: false);
  579. }
  580. }
  581. public static void Ucvtf_Gp(ArmEmitterContext context)
  582. {
  583. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  584. Operand res = GetIntOrZR(context, op.Rn);
  585. res = EmitFPConvert(context, res, op.Size, signed: false);
  586. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  587. }
  588. public static void Ucvtf_Gp_Fixed(ArmEmitterContext context)
  589. {
  590. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  591. Operand res = GetIntOrZR(context, op.Rn);
  592. res = EmitFPConvert(context, res, op.Size, signed: false);
  593. res = EmitI2fFBitsMul(context, res, op.FBits);
  594. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), res, 0));
  595. }
  596. public static void Ucvtf_S(ArmEmitterContext context)
  597. {
  598. if (Optimizations.UseSse2)
  599. {
  600. EmitSse2UcvtfOp(context, scalar: true);
  601. }
  602. else
  603. {
  604. EmitCvtf(context, signed: false, scalar: true);
  605. }
  606. }
  607. public static void Ucvtf_S_Fixed(ArmEmitterContext context)
  608. {
  609. if (Optimizations.UseSse2)
  610. {
  611. EmitSse2UcvtfOp(context, scalar: true);
  612. }
  613. else
  614. {
  615. EmitCvtf(context, signed: false, scalar: true);
  616. }
  617. }
  618. public static void Ucvtf_V(ArmEmitterContext context)
  619. {
  620. if (Optimizations.UseSse2)
  621. {
  622. EmitSse2UcvtfOp(context, scalar: false);
  623. }
  624. else
  625. {
  626. EmitCvtf(context, signed: false, scalar: false);
  627. }
  628. }
  629. public static void Ucvtf_V_Fixed(ArmEmitterContext context)
  630. {
  631. if (Optimizations.UseSse2)
  632. {
  633. EmitSse2UcvtfOp(context, scalar: false);
  634. }
  635. else
  636. {
  637. EmitCvtf(context, signed: false, scalar: false);
  638. }
  639. }
  640. private static void EmitFcvt(ArmEmitterContext context, Func1I emit, bool signed, bool scalar)
  641. {
  642. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  643. Operand res = context.VectorZero();
  644. Operand n = GetVec(op.Rn);
  645. int sizeF = op.Size & 1;
  646. int sizeI = sizeF + 2;
  647. OperandType type = sizeF == 0 ? OperandType.FP32 : OperandType.FP64;
  648. int elems = !scalar ? op.GetBytesCount() >> sizeI : 1;
  649. for (int index = 0; index < elems; index++)
  650. {
  651. Operand ne = context.VectorExtract(type, n, index);
  652. Operand e = emit(ne);
  653. if (sizeF == 0)
  654. {
  655. MethodInfo info = signed
  656. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToS32))
  657. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToU32));
  658. e = context.Call(info, e);
  659. e = context.ZeroExtend32(OperandType.I64, e);
  660. }
  661. else /* if (sizeF == 1) */
  662. {
  663. MethodInfo info = signed
  664. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToS64))
  665. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToU64));
  666. e = context.Call(info, e);
  667. }
  668. res = EmitVectorInsert(context, res, e, index, sizeI);
  669. }
  670. context.Copy(GetVec(op.Rd), res);
  671. }
  672. private static void EmitFcvtz(ArmEmitterContext context, bool signed, bool scalar)
  673. {
  674. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  675. Operand res = context.VectorZero();
  676. Operand n = GetVec(op.Rn);
  677. int sizeF = op.Size & 1;
  678. int sizeI = sizeF + 2;
  679. OperandType type = sizeF == 0 ? OperandType.FP32 : OperandType.FP64;
  680. int fBits = GetFBits(context);
  681. int elems = !scalar ? op.GetBytesCount() >> sizeI : 1;
  682. for (int index = 0; index < elems; index++)
  683. {
  684. Operand ne = context.VectorExtract(type, n, index);
  685. Operand e = EmitF2iFBitsMul(context, ne, fBits);
  686. if (sizeF == 0)
  687. {
  688. MethodInfo info = signed
  689. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToS32))
  690. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToU32));
  691. e = context.Call(info, e);
  692. e = context.ZeroExtend32(OperandType.I64, e);
  693. }
  694. else /* if (sizeF == 1) */
  695. {
  696. MethodInfo info = signed
  697. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToS64))
  698. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToU64));
  699. e = context.Call(info, e);
  700. }
  701. res = EmitVectorInsert(context, res, e, index, sizeI);
  702. }
  703. context.Copy(GetVec(op.Rd), res);
  704. }
  705. private static void EmitFcvt_s_Gp(ArmEmitterContext context, Func1I emit)
  706. {
  707. EmitFcvt___Gp(context, emit, signed: true);
  708. }
  709. private static void EmitFcvt_u_Gp(ArmEmitterContext context, Func1I emit)
  710. {
  711. EmitFcvt___Gp(context, emit, signed: false);
  712. }
  713. private static void EmitFcvt___Gp(ArmEmitterContext context, Func1I emit, bool signed)
  714. {
  715. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  716. OperandType type = op.Size == 0 ? OperandType.FP32 : OperandType.FP64;
  717. Operand ne = context.VectorExtract(type, GetVec(op.Rn), 0);
  718. Operand res = signed
  719. ? EmitScalarFcvts(context, emit(ne), 0)
  720. : EmitScalarFcvtu(context, emit(ne), 0);
  721. SetIntOrZR(context, op.Rd, res);
  722. }
  723. private static void EmitFcvtzs_Gp_Fixed(ArmEmitterContext context)
  724. {
  725. EmitFcvtz__Gp_Fixed(context, signed: true);
  726. }
  727. private static void EmitFcvtzu_Gp_Fixed(ArmEmitterContext context)
  728. {
  729. EmitFcvtz__Gp_Fixed(context, signed: false);
  730. }
  731. private static void EmitFcvtz__Gp_Fixed(ArmEmitterContext context, bool signed)
  732. {
  733. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  734. OperandType type = op.Size == 0 ? OperandType.FP32 : OperandType.FP64;
  735. Operand ne = context.VectorExtract(type, GetVec(op.Rn), 0);
  736. Operand res = signed
  737. ? EmitScalarFcvts(context, ne, op.FBits)
  738. : EmitScalarFcvtu(context, ne, op.FBits);
  739. SetIntOrZR(context, op.Rd, res);
  740. }
  741. private static void EmitCvtf(ArmEmitterContext context, bool signed, bool scalar)
  742. {
  743. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  744. Operand res = context.VectorZero();
  745. int sizeF = op.Size & 1;
  746. int sizeI = sizeF + 2;
  747. int fBits = GetFBits(context);
  748. int elems = !scalar ? op.GetBytesCount() >> sizeI : 1;
  749. for (int index = 0; index < elems; index++)
  750. {
  751. Operand ne = EmitVectorLongExtract(context, op.Rn, index, sizeI);
  752. Operand e = EmitFPConvert(context, ne, sizeF, signed);
  753. e = EmitI2fFBitsMul(context, e, fBits);
  754. res = context.VectorInsert(res, e, index);
  755. }
  756. context.Copy(GetVec(op.Rd), res);
  757. }
  758. private static int GetFBits(ArmEmitterContext context)
  759. {
  760. if (context.CurrOp is OpCodeSimdShImm op)
  761. {
  762. return GetImmShr(op);
  763. }
  764. return 0;
  765. }
  766. private static Operand EmitFPConvert(ArmEmitterContext context, Operand value, int size, bool signed)
  767. {
  768. Debug.Assert(value.Type == OperandType.I32 || value.Type == OperandType.I64);
  769. Debug.Assert((uint)size < 2);
  770. OperandType type = size == 0 ? OperandType.FP32 : OperandType.FP64;
  771. if (signed)
  772. {
  773. return context.ConvertToFP(type, value);
  774. }
  775. else
  776. {
  777. return context.ConvertToFPUI(type, value);
  778. }
  779. }
  780. private static Operand EmitScalarFcvts(ArmEmitterContext context, Operand value, int fBits)
  781. {
  782. Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
  783. value = EmitF2iFBitsMul(context, value, fBits);
  784. MethodInfo info;
  785. if (context.CurrOp.RegisterSize == RegisterSize.Int32)
  786. {
  787. info = value.Type == OperandType.FP32
  788. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToS32))
  789. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToS32));
  790. }
  791. else
  792. {
  793. info = value.Type == OperandType.FP32
  794. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToS64))
  795. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToS64));
  796. }
  797. return context.Call(info, value);
  798. }
  799. private static Operand EmitScalarFcvtu(ArmEmitterContext context, Operand value, int fBits)
  800. {
  801. Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
  802. value = EmitF2iFBitsMul(context, value, fBits);
  803. MethodInfo info;
  804. if (context.CurrOp.RegisterSize == RegisterSize.Int32)
  805. {
  806. info = value.Type == OperandType.FP32
  807. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToU32))
  808. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToU32));
  809. }
  810. else
  811. {
  812. info = value.Type == OperandType.FP32
  813. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF32ToU64))
  814. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SatF64ToU64));
  815. }
  816. return context.Call(info, value);
  817. }
  818. private static Operand EmitF2iFBitsMul(ArmEmitterContext context, Operand value, int fBits)
  819. {
  820. Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
  821. if (fBits == 0)
  822. {
  823. return value;
  824. }
  825. if (value.Type == OperandType.FP32)
  826. {
  827. return context.Multiply(value, ConstF(MathF.Pow(2f, fBits)));
  828. }
  829. else /* if (value.Type == OperandType.FP64) */
  830. {
  831. return context.Multiply(value, ConstF(Math.Pow(2d, fBits)));
  832. }
  833. }
  834. private static Operand EmitI2fFBitsMul(ArmEmitterContext context, Operand value, int fBits)
  835. {
  836. Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
  837. if (fBits == 0)
  838. {
  839. return value;
  840. }
  841. if (value.Type == OperandType.FP32)
  842. {
  843. return context.Multiply(value, ConstF(1f / MathF.Pow(2f, fBits)));
  844. }
  845. else /* if (value.Type == OperandType.FP64) */
  846. {
  847. return context.Multiply(value, ConstF(1d / Math.Pow(2d, fBits)));
  848. }
  849. }
  850. public static Operand EmitSse2CvtDoubleToInt64OpF(ArmEmitterContext context, Operand opF, bool scalar)
  851. {
  852. Debug.Assert(opF.Type == OperandType.V128);
  853. Operand longL = context.AddIntrinsicLong (Intrinsic.X86Cvtsd2si, opF); // opFL
  854. Operand res = context.VectorCreateScalar(longL);
  855. if (!scalar)
  856. {
  857. Operand opFH = context.AddIntrinsic (Intrinsic.X86Movhlps, res, opF); // res doesn't matter.
  858. Operand longH = context.AddIntrinsicLong (Intrinsic.X86Cvtsd2si, opFH);
  859. Operand resH = context.VectorCreateScalar(longH);
  860. res = context.AddIntrinsic (Intrinsic.X86Movlhps, res, resH);
  861. }
  862. return res;
  863. }
  864. private static Operand EmitSse2CvtInt64ToDoubleOp(ArmEmitterContext context, Operand op, bool scalar)
  865. {
  866. Debug.Assert(op.Type == OperandType.V128);
  867. Operand longL = context.AddIntrinsicLong(Intrinsic.X86Cvtsi2si, op); // opL
  868. Operand res = context.AddIntrinsic (Intrinsic.X86Cvtsi2sd, context.VectorZero(), longL);
  869. if (!scalar)
  870. {
  871. Operand opH = context.AddIntrinsic (Intrinsic.X86Movhlps, res, op); // res doesn't matter.
  872. Operand longH = context.AddIntrinsicLong(Intrinsic.X86Cvtsi2si, opH);
  873. Operand resH = context.AddIntrinsic (Intrinsic.X86Cvtsi2sd, res, longH); // res doesn't matter.
  874. res = context.AddIntrinsic (Intrinsic.X86Movlhps, res, resH);
  875. }
  876. return res;
  877. }
  878. private static void EmitSse2ScvtfOp(ArmEmitterContext context, bool scalar)
  879. {
  880. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  881. Operand n = GetVec(op.Rn);
  882. // sizeF == ((OpCodeSimdShImm)op).Size - 2
  883. int sizeF = op.Size & 1;
  884. if (sizeF == 0)
  885. {
  886. Operand res = context.AddIntrinsic(Intrinsic.X86Cvtdq2ps, n);
  887. if (op is OpCodeSimdShImm fixedOp)
  888. {
  889. int fBits = GetImmShr(fixedOp);
  890. // BitConverter.Int32BitsToSingle(fpScaled) == 1f / MathF.Pow(2f, fBits)
  891. int fpScaled = 0x3F800000 - fBits * 0x800000;
  892. Operand fpScaledMask = scalar
  893. ? X86GetScalar (context, fpScaled)
  894. : X86GetAllElements(context, fpScaled);
  895. res = context.AddIntrinsic(Intrinsic.X86Mulps, res, fpScaledMask);
  896. }
  897. if (scalar)
  898. {
  899. res = context.VectorZeroUpper96(res);
  900. }
  901. else if (op.RegisterSize == RegisterSize.Simd64)
  902. {
  903. res = context.VectorZeroUpper64(res);
  904. }
  905. context.Copy(GetVec(op.Rd), res);
  906. }
  907. else /* if (sizeF == 1) */
  908. {
  909. Operand res = EmitSse2CvtInt64ToDoubleOp(context, n, scalar);
  910. if (op is OpCodeSimdShImm fixedOp)
  911. {
  912. int fBits = GetImmShr(fixedOp);
  913. // BitConverter.Int64BitsToDouble(fpScaled) == 1d / Math.Pow(2d, fBits)
  914. long fpScaled = 0x3FF0000000000000L - fBits * 0x10000000000000L;
  915. Operand fpScaledMask = scalar
  916. ? X86GetScalar (context, fpScaled)
  917. : X86GetAllElements(context, fpScaled);
  918. res = context.AddIntrinsic(Intrinsic.X86Mulpd, res, fpScaledMask);
  919. }
  920. if (scalar)
  921. {
  922. res = context.VectorZeroUpper64(res);
  923. }
  924. context.Copy(GetVec(op.Rd), res);
  925. }
  926. }
  927. private static void EmitSse2UcvtfOp(ArmEmitterContext context, bool scalar)
  928. {
  929. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  930. Operand n = GetVec(op.Rn);
  931. // sizeF == ((OpCodeSimdShImm)op).Size - 2
  932. int sizeF = op.Size & 1;
  933. if (sizeF == 0)
  934. {
  935. Operand mask = scalar // 65536.000f (1 << 16)
  936. ? X86GetScalar (context, 0x47800000)
  937. : X86GetAllElements(context, 0x47800000);
  938. Operand res = context.AddIntrinsic(Intrinsic.X86Psrld, n, Const(16));
  939. res = context.AddIntrinsic(Intrinsic.X86Cvtdq2ps, res);
  940. res = context.AddIntrinsic(Intrinsic.X86Mulps, res, mask);
  941. Operand res2 = context.AddIntrinsic(Intrinsic.X86Pslld, n, Const(16));
  942. res2 = context.AddIntrinsic(Intrinsic.X86Psrld, res2, Const(16));
  943. res2 = context.AddIntrinsic(Intrinsic.X86Cvtdq2ps, res2);
  944. res = context.AddIntrinsic(Intrinsic.X86Addps, res, res2);
  945. if (op is OpCodeSimdShImm fixedOp)
  946. {
  947. int fBits = GetImmShr(fixedOp);
  948. // BitConverter.Int32BitsToSingle(fpScaled) == 1f / MathF.Pow(2f, fBits)
  949. int fpScaled = 0x3F800000 - fBits * 0x800000;
  950. Operand fpScaledMask = scalar
  951. ? X86GetScalar (context, fpScaled)
  952. : X86GetAllElements(context, fpScaled);
  953. res = context.AddIntrinsic(Intrinsic.X86Mulps, res, fpScaledMask);
  954. }
  955. if (scalar)
  956. {
  957. res = context.VectorZeroUpper96(res);
  958. }
  959. else if (op.RegisterSize == RegisterSize.Simd64)
  960. {
  961. res = context.VectorZeroUpper64(res);
  962. }
  963. context.Copy(GetVec(op.Rd), res);
  964. }
  965. else /* if (sizeF == 1) */
  966. {
  967. Operand mask = scalar // 4294967296.0000000d (1L << 32)
  968. ? X86GetScalar (context, 0x41F0000000000000L)
  969. : X86GetAllElements(context, 0x41F0000000000000L);
  970. Operand res = context.AddIntrinsic (Intrinsic.X86Psrlq, n, Const(32));
  971. res = EmitSse2CvtInt64ToDoubleOp(context, res, scalar);
  972. res = context.AddIntrinsic (Intrinsic.X86Mulpd, res, mask);
  973. Operand res2 = context.AddIntrinsic (Intrinsic.X86Psllq, n, Const(32));
  974. res2 = context.AddIntrinsic (Intrinsic.X86Psrlq, res2, Const(32));
  975. res2 = EmitSse2CvtInt64ToDoubleOp(context, res2, scalar);
  976. res = context.AddIntrinsic(Intrinsic.X86Addpd, res, res2);
  977. if (op is OpCodeSimdShImm fixedOp)
  978. {
  979. int fBits = GetImmShr(fixedOp);
  980. // BitConverter.Int64BitsToDouble(fpScaled) == 1d / Math.Pow(2d, fBits)
  981. long fpScaled = 0x3FF0000000000000L - fBits * 0x10000000000000L;
  982. Operand fpScaledMask = scalar
  983. ? X86GetScalar (context, fpScaled)
  984. : X86GetAllElements(context, fpScaled);
  985. res = context.AddIntrinsic(Intrinsic.X86Mulpd, res, fpScaledMask);
  986. }
  987. if (scalar)
  988. {
  989. res = context.VectorZeroUpper64(res);
  990. }
  991. context.Copy(GetVec(op.Rd), res);
  992. }
  993. }
  994. private static void EmitSse41FcvtsOpF(ArmEmitterContext context, FPRoundingMode roundMode, bool scalar)
  995. {
  996. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  997. Operand n = GetVec(op.Rn);
  998. // sizeF == ((OpCodeSimdShImm)op).Size - 2
  999. int sizeF = op.Size & 1;
  1000. if (sizeF == 0)
  1001. {
  1002. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmpps, n, n, Const((int)CmpCondition.OrderedQ));
  1003. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1004. if (op is OpCodeSimdShImm fixedOp)
  1005. {
  1006. int fBits = GetImmShr(fixedOp);
  1007. // BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, fBits)
  1008. int fpScaled = 0x3F800000 + fBits * 0x800000;
  1009. Operand fpScaledMask = scalar
  1010. ? X86GetScalar (context, fpScaled)
  1011. : X86GetAllElements(context, fpScaled);
  1012. nRes = context.AddIntrinsic(Intrinsic.X86Mulps, nRes, fpScaledMask);
  1013. }
  1014. if (roundMode != FPRoundingMode.ToNearestAway)
  1015. {
  1016. nRes = context.AddIntrinsic(Intrinsic.X86Roundps, nRes, Const(X86GetRoundControl(roundMode)));
  1017. }
  1018. else
  1019. {
  1020. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar);
  1021. }
  1022. Operand nInt = context.AddIntrinsic(Intrinsic.X86Cvtps2dq, nRes);
  1023. Operand fpMaxValMask = scalar // 2.14748365E9f (2147483648)
  1024. ? X86GetScalar (context, 0x4F000000)
  1025. : X86GetAllElements(context, 0x4F000000);
  1026. nRes = context.AddIntrinsic(Intrinsic.X86Cmpps, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1027. Operand dRes = context.AddIntrinsic(Intrinsic.X86Pxor, nInt, nRes);
  1028. if (scalar)
  1029. {
  1030. dRes = context.VectorZeroUpper96(dRes);
  1031. }
  1032. else if (op.RegisterSize == RegisterSize.Simd64)
  1033. {
  1034. dRes = context.VectorZeroUpper64(dRes);
  1035. }
  1036. context.Copy(GetVec(op.Rd), dRes);
  1037. }
  1038. else /* if (sizeF == 1) */
  1039. {
  1040. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmppd, n, n, Const((int)CmpCondition.OrderedQ));
  1041. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1042. if (op is OpCodeSimdShImm fixedOp)
  1043. {
  1044. int fBits = GetImmShr(fixedOp);
  1045. // BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, fBits)
  1046. long fpScaled = 0x3FF0000000000000L + fBits * 0x10000000000000L;
  1047. Operand fpScaledMask = scalar
  1048. ? X86GetScalar (context, fpScaled)
  1049. : X86GetAllElements(context, fpScaled);
  1050. nRes = context.AddIntrinsic(Intrinsic.X86Mulpd, nRes, fpScaledMask);
  1051. }
  1052. if (roundMode != FPRoundingMode.ToNearestAway)
  1053. {
  1054. nRes = context.AddIntrinsic(Intrinsic.X86Roundpd, nRes, Const(X86GetRoundControl(roundMode)));
  1055. }
  1056. else
  1057. {
  1058. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar);
  1059. }
  1060. Operand nLong = EmitSse2CvtDoubleToInt64OpF(context, nRes, scalar);
  1061. Operand fpMaxValMask = scalar // 9.2233720368547760E18d (9223372036854775808)
  1062. ? X86GetScalar (context, 0x43E0000000000000L)
  1063. : X86GetAllElements(context, 0x43E0000000000000L);
  1064. nRes = context.AddIntrinsic(Intrinsic.X86Cmppd, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1065. Operand dRes = context.AddIntrinsic(Intrinsic.X86Pxor, nLong, nRes);
  1066. if (scalar)
  1067. {
  1068. dRes = context.VectorZeroUpper64(dRes);
  1069. }
  1070. context.Copy(GetVec(op.Rd), dRes);
  1071. }
  1072. }
  1073. private static void EmitSse41FcvtuOpF(ArmEmitterContext context, FPRoundingMode roundMode, bool scalar)
  1074. {
  1075. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  1076. Operand n = GetVec(op.Rn);
  1077. // sizeF == ((OpCodeSimdShImm)op).Size - 2
  1078. int sizeF = op.Size & 1;
  1079. if (sizeF == 0)
  1080. {
  1081. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmpps, n, n, Const((int)CmpCondition.OrderedQ));
  1082. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1083. if (op is OpCodeSimdShImm fixedOp)
  1084. {
  1085. int fBits = GetImmShr(fixedOp);
  1086. // BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, fBits)
  1087. int fpScaled = 0x3F800000 + fBits * 0x800000;
  1088. Operand fpScaledMask = scalar
  1089. ? X86GetScalar (context, fpScaled)
  1090. : X86GetAllElements(context, fpScaled);
  1091. nRes = context.AddIntrinsic(Intrinsic.X86Mulps, nRes, fpScaledMask);
  1092. }
  1093. if (roundMode != FPRoundingMode.ToNearestAway)
  1094. {
  1095. nRes = context.AddIntrinsic(Intrinsic.X86Roundps, nRes, Const(X86GetRoundControl(roundMode)));
  1096. }
  1097. else
  1098. {
  1099. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar);
  1100. }
  1101. Operand zero = context.VectorZero();
  1102. Operand nCmp = context.AddIntrinsic(Intrinsic.X86Cmpps, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1103. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1104. Operand fpMaxValMask = scalar // 2.14748365E9f (2147483648)
  1105. ? X86GetScalar (context, 0x4F000000)
  1106. : X86GetAllElements(context, 0x4F000000);
  1107. Operand nInt = context.AddIntrinsic(Intrinsic.X86Cvtps2dq, nRes);
  1108. nRes = context.AddIntrinsic(Intrinsic.X86Subps, nRes, fpMaxValMask);
  1109. nCmp = context.AddIntrinsic(Intrinsic.X86Cmpps, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1110. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1111. Operand nInt2 = context.AddIntrinsic(Intrinsic.X86Cvtps2dq, nRes);
  1112. nRes = context.AddIntrinsic(Intrinsic.X86Cmpps, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1113. Operand dRes = context.AddIntrinsic(Intrinsic.X86Pxor, nInt2, nRes);
  1114. dRes = context.AddIntrinsic(Intrinsic.X86Paddd, dRes, nInt);
  1115. if (scalar)
  1116. {
  1117. dRes = context.VectorZeroUpper96(dRes);
  1118. }
  1119. else if (op.RegisterSize == RegisterSize.Simd64)
  1120. {
  1121. dRes = context.VectorZeroUpper64(dRes);
  1122. }
  1123. context.Copy(GetVec(op.Rd), dRes);
  1124. }
  1125. else /* if (sizeF == 1) */
  1126. {
  1127. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmppd, n, n, Const((int)CmpCondition.OrderedQ));
  1128. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1129. if (op is OpCodeSimdShImm fixedOp)
  1130. {
  1131. int fBits = GetImmShr(fixedOp);
  1132. // BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, fBits)
  1133. long fpScaled = 0x3FF0000000000000L + fBits * 0x10000000000000L;
  1134. Operand fpScaledMask = scalar
  1135. ? X86GetScalar (context, fpScaled)
  1136. : X86GetAllElements(context, fpScaled);
  1137. nRes = context.AddIntrinsic(Intrinsic.X86Mulpd, nRes, fpScaledMask);
  1138. }
  1139. if (roundMode != FPRoundingMode.ToNearestAway)
  1140. {
  1141. nRes = context.AddIntrinsic(Intrinsic.X86Roundpd, nRes, Const(X86GetRoundControl(roundMode)));
  1142. }
  1143. else
  1144. {
  1145. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar);
  1146. }
  1147. Operand zero = context.VectorZero();
  1148. Operand nCmp = context.AddIntrinsic(Intrinsic.X86Cmppd, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1149. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1150. Operand fpMaxValMask = scalar // 9.2233720368547760E18d (9223372036854775808)
  1151. ? X86GetScalar (context, 0x43E0000000000000L)
  1152. : X86GetAllElements(context, 0x43E0000000000000L);
  1153. Operand nLong = EmitSse2CvtDoubleToInt64OpF(context, nRes, scalar);
  1154. nRes = context.AddIntrinsic(Intrinsic.X86Subpd, nRes, fpMaxValMask);
  1155. nCmp = context.AddIntrinsic(Intrinsic.X86Cmppd, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1156. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1157. Operand nLong2 = EmitSse2CvtDoubleToInt64OpF(context, nRes, scalar);
  1158. nRes = context.AddIntrinsic(Intrinsic.X86Cmppd, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1159. Operand dRes = context.AddIntrinsic(Intrinsic.X86Pxor, nLong2, nRes);
  1160. dRes = context.AddIntrinsic(Intrinsic.X86Paddq, dRes, nLong);
  1161. if (scalar)
  1162. {
  1163. dRes = context.VectorZeroUpper64(dRes);
  1164. }
  1165. context.Copy(GetVec(op.Rd), dRes);
  1166. }
  1167. }
  1168. private static void EmitSse41Fcvts_Gp(ArmEmitterContext context, FPRoundingMode roundMode, bool isFixed)
  1169. {
  1170. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  1171. Operand n = GetVec(op.Rn);
  1172. if (op.Size == 0)
  1173. {
  1174. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmpss, n, n, Const((int)CmpCondition.OrderedQ));
  1175. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1176. if (isFixed)
  1177. {
  1178. // BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, op.FBits)
  1179. int fpScaled = 0x3F800000 + op.FBits * 0x800000;
  1180. Operand fpScaledMask = X86GetScalar(context, fpScaled);
  1181. nRes = context.AddIntrinsic(Intrinsic.X86Mulss, nRes, fpScaledMask);
  1182. }
  1183. if (roundMode != FPRoundingMode.ToNearestAway)
  1184. {
  1185. nRes = context.AddIntrinsic(Intrinsic.X86Roundss, nRes, Const(X86GetRoundControl(roundMode)));
  1186. }
  1187. else
  1188. {
  1189. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar: true);
  1190. }
  1191. Operand nIntOrLong = op.RegisterSize == RegisterSize.Int32
  1192. ? context.AddIntrinsicInt (Intrinsic.X86Cvtss2si, nRes)
  1193. : context.AddIntrinsicLong(Intrinsic.X86Cvtss2si, nRes);
  1194. int fpMaxVal = op.RegisterSize == RegisterSize.Int32
  1195. ? 0x4F000000 // 2.14748365E9f (2147483648)
  1196. : 0x5F000000; // 9.223372E18f (9223372036854775808)
  1197. Operand fpMaxValMask = X86GetScalar(context, fpMaxVal);
  1198. nRes = context.AddIntrinsic(Intrinsic.X86Cmpss, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1199. Operand nInt = context.AddIntrinsicInt(Intrinsic.X86Cvtsi2si, nRes);
  1200. if (op.RegisterSize == RegisterSize.Int64)
  1201. {
  1202. nInt = context.SignExtend32(OperandType.I64, nInt);
  1203. }
  1204. Operand dRes = context.BitwiseExclusiveOr(nIntOrLong, nInt);
  1205. SetIntOrZR(context, op.Rd, dRes);
  1206. }
  1207. else /* if (op.Size == 1) */
  1208. {
  1209. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmpsd, n, n, Const((int)CmpCondition.OrderedQ));
  1210. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1211. if (isFixed)
  1212. {
  1213. // BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, op.FBits)
  1214. long fpScaled = 0x3FF0000000000000L + op.FBits * 0x10000000000000L;
  1215. Operand fpScaledMask = X86GetScalar(context, fpScaled);
  1216. nRes = context.AddIntrinsic(Intrinsic.X86Mulsd, nRes, fpScaledMask);
  1217. }
  1218. if (roundMode != FPRoundingMode.ToNearestAway)
  1219. {
  1220. nRes = context.AddIntrinsic(Intrinsic.X86Roundsd, nRes, Const(X86GetRoundControl(roundMode)));
  1221. }
  1222. else
  1223. {
  1224. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar: true);
  1225. }
  1226. Operand nIntOrLong = op.RegisterSize == RegisterSize.Int32
  1227. ? context.AddIntrinsicInt (Intrinsic.X86Cvtsd2si, nRes)
  1228. : context.AddIntrinsicLong(Intrinsic.X86Cvtsd2si, nRes);
  1229. long fpMaxVal = op.RegisterSize == RegisterSize.Int32
  1230. ? 0x41E0000000000000L // 2147483648.0000000d (2147483648)
  1231. : 0x43E0000000000000L; // 9.2233720368547760E18d (9223372036854775808)
  1232. Operand fpMaxValMask = X86GetScalar(context, fpMaxVal);
  1233. nRes = context.AddIntrinsic(Intrinsic.X86Cmpsd, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1234. Operand nLong = context.AddIntrinsicLong(Intrinsic.X86Cvtsi2si, nRes);
  1235. if (op.RegisterSize == RegisterSize.Int32)
  1236. {
  1237. nLong = context.ConvertI64ToI32(nLong);
  1238. }
  1239. Operand dRes = context.BitwiseExclusiveOr(nIntOrLong, nLong);
  1240. SetIntOrZR(context, op.Rd, dRes);
  1241. }
  1242. }
  1243. private static void EmitSse41Fcvtu_Gp(ArmEmitterContext context, FPRoundingMode roundMode, bool isFixed)
  1244. {
  1245. OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
  1246. Operand n = GetVec(op.Rn);
  1247. if (op.Size == 0)
  1248. {
  1249. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmpss, n, n, Const((int)CmpCondition.OrderedQ));
  1250. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1251. if (isFixed)
  1252. {
  1253. // BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, op.FBits)
  1254. int fpScaled = 0x3F800000 + op.FBits * 0x800000;
  1255. Operand fpScaledMask = X86GetScalar(context, fpScaled);
  1256. nRes = context.AddIntrinsic(Intrinsic.X86Mulss, nRes, fpScaledMask);
  1257. }
  1258. if (roundMode != FPRoundingMode.ToNearestAway)
  1259. {
  1260. nRes = context.AddIntrinsic(Intrinsic.X86Roundss, nRes, Const(X86GetRoundControl(roundMode)));
  1261. }
  1262. else
  1263. {
  1264. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar: true);
  1265. }
  1266. Operand zero = context.VectorZero();
  1267. Operand nCmp = context.AddIntrinsic(Intrinsic.X86Cmpss, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1268. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1269. int fpMaxVal = op.RegisterSize == RegisterSize.Int32
  1270. ? 0x4F000000 // 2.14748365E9f (2147483648)
  1271. : 0x5F000000; // 9.223372E18f (9223372036854775808)
  1272. Operand fpMaxValMask = X86GetScalar(context, fpMaxVal);
  1273. Operand nIntOrLong = op.RegisterSize == RegisterSize.Int32
  1274. ? context.AddIntrinsicInt (Intrinsic.X86Cvtss2si, nRes)
  1275. : context.AddIntrinsicLong(Intrinsic.X86Cvtss2si, nRes);
  1276. nRes = context.AddIntrinsic(Intrinsic.X86Subss, nRes, fpMaxValMask);
  1277. nCmp = context.AddIntrinsic(Intrinsic.X86Cmpss, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1278. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1279. Operand nIntOrLong2 = op.RegisterSize == RegisterSize.Int32
  1280. ? context.AddIntrinsicInt (Intrinsic.X86Cvtss2si, nRes)
  1281. : context.AddIntrinsicLong(Intrinsic.X86Cvtss2si, nRes);
  1282. nRes = context.AddIntrinsic(Intrinsic.X86Cmpss, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1283. Operand nInt = context.AddIntrinsicInt(Intrinsic.X86Cvtsi2si, nRes);
  1284. if (op.RegisterSize == RegisterSize.Int64)
  1285. {
  1286. nInt = context.SignExtend32(OperandType.I64, nInt);
  1287. }
  1288. Operand dRes = context.BitwiseExclusiveOr(nIntOrLong2, nInt);
  1289. dRes = context.Add(dRes, nIntOrLong);
  1290. SetIntOrZR(context, op.Rd, dRes);
  1291. }
  1292. else /* if (op.Size == 1) */
  1293. {
  1294. Operand nRes = context.AddIntrinsic(Intrinsic.X86Cmpsd, n, n, Const((int)CmpCondition.OrderedQ));
  1295. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, n);
  1296. if (isFixed)
  1297. {
  1298. // BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, op.FBits)
  1299. long fpScaled = 0x3FF0000000000000L + op.FBits * 0x10000000000000L;
  1300. Operand fpScaledMask = X86GetScalar(context, fpScaled);
  1301. nRes = context.AddIntrinsic(Intrinsic.X86Mulsd, nRes, fpScaledMask);
  1302. }
  1303. if (roundMode != FPRoundingMode.ToNearestAway)
  1304. {
  1305. nRes = context.AddIntrinsic(Intrinsic.X86Roundsd, nRes, Const(X86GetRoundControl(roundMode)));
  1306. }
  1307. else
  1308. {
  1309. nRes = EmitSse41RoundToNearestWithTiesToAwayOpF(context, nRes, scalar: true);
  1310. }
  1311. Operand zero = context.VectorZero();
  1312. Operand nCmp = context.AddIntrinsic(Intrinsic.X86Cmpsd, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1313. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1314. long fpMaxVal = op.RegisterSize == RegisterSize.Int32
  1315. ? 0x41E0000000000000L // 2147483648.0000000d (2147483648)
  1316. : 0x43E0000000000000L; // 9.2233720368547760E18d (9223372036854775808)
  1317. Operand fpMaxValMask = X86GetScalar(context, fpMaxVal);
  1318. Operand nIntOrLong = op.RegisterSize == RegisterSize.Int32
  1319. ? context.AddIntrinsicInt (Intrinsic.X86Cvtsd2si, nRes)
  1320. : context.AddIntrinsicLong(Intrinsic.X86Cvtsd2si, nRes);
  1321. nRes = context.AddIntrinsic(Intrinsic.X86Subsd, nRes, fpMaxValMask);
  1322. nCmp = context.AddIntrinsic(Intrinsic.X86Cmpsd, nRes, zero, Const((int)CmpCondition.NotLessThanOrEqual));
  1323. nRes = context.AddIntrinsic(Intrinsic.X86Pand, nRes, nCmp);
  1324. Operand nIntOrLong2 = op.RegisterSize == RegisterSize.Int32
  1325. ? context.AddIntrinsicInt (Intrinsic.X86Cvtsd2si, nRes)
  1326. : context.AddIntrinsicLong(Intrinsic.X86Cvtsd2si, nRes);
  1327. nRes = context.AddIntrinsic(Intrinsic.X86Cmpsd, nRes, fpMaxValMask, Const((int)CmpCondition.NotLessThan));
  1328. Operand nLong = context.AddIntrinsicLong(Intrinsic.X86Cvtsi2si, nRes);
  1329. if (op.RegisterSize == RegisterSize.Int32)
  1330. {
  1331. nLong = context.ConvertI64ToI32(nLong);
  1332. }
  1333. Operand dRes = context.BitwiseExclusiveOr(nIntOrLong2, nLong);
  1334. dRes = context.Add(dRes, nIntOrLong);
  1335. SetIntOrZR(context, op.Rd, dRes);
  1336. }
  1337. }
  1338. private static Operand EmitVectorLongExtract(ArmEmitterContext context, int reg, int index, int size)
  1339. {
  1340. OperandType type = size == 3 ? OperandType.I64 : OperandType.I32;
  1341. return context.VectorExtract(type, GetVec(reg), index);
  1342. }
  1343. }
  1344. }