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Decoders
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c1bdf19061
Implement some ARM32 memory instructions and CMP (#565)
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%!s(int64=7) %!d(string=hai) anos |
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Events
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2e143365eb
Optimized memory modified check (#538)
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%!s(int64=7) %!d(string=hai) anos |
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Exceptions
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00579927e4
Better process implementation (#491)
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%!s(int64=7) %!d(string=hai) anos |
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Instructions
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c1bdf19061
Implement some ARM32 memory instructions and CMP (#565)
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%!s(int64=7) %!d(string=hai) anos |
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Memory
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2e143365eb
Optimized memory modified check (#538)
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%!s(int64=7) %!d(string=hai) anos |
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State
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c1bdf19061
Implement some ARM32 memory instructions and CMP (#565)
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%!s(int64=7) %!d(string=hai) anos |
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Translation
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c1bdf19061
Implement some ARM32 memory instructions and CMP (#565)
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%!s(int64=7) %!d(string=hai) anos |
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ChocolArm64.csproj
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2f25b34941
Add linux-x64 to RID property to make tests works on linux (#205)
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%!s(int64=7) %!d(string=hai) anos |
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CpuThread.cs
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36b9ab0e48
Add ARM32 support on the translator (#561)
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%!s(int64=7) %!d(string=hai) anos |
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OpCodeTable.cs
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c1bdf19061
Implement some ARM32 memory instructions and CMP (#565)
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%!s(int64=7) %!d(string=hai) anos |
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Optimizations.cs
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0f5b6dfbe8
Fix Frecpe_S/V and Frsqrte_S/V (full FP emu.). Add Sse Opt. & SoftFloat Impl. for Fcmeq/ge/gt/le/lt_S/V (Reg & Zero), Faddp_S/V, Fmaxp_V, Fminp_V Inst.; add Sse Opt. for Shll_V, S/Ushll_V Inst.; improve Sse Opt. for Xtn_V Inst.. Add Tests. (#543)
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%!s(int64=7) %!d(string=hai) anos |
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TranslatedSub.cs
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36e8e074c9
Misc. CPU improvements (#519)
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%!s(int64=7) %!d(string=hai) anos |
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TranslatedSubType.cs
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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%!s(int64=7) %!d(string=hai) anos |
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Translator.cs
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36b9ab0e48
Add ARM32 support on the translator (#561)
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%!s(int64=7) %!d(string=hai) anos |
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TranslatorCache.cs
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36b9ab0e48
Add ARM32 support on the translator (#561)
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%!s(int64=7) %!d(string=hai) anos |
gdkchan
c1bdf19061
Implement some ARM32 memory instructions and CMP (#565)