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Albero (Tree): d05db79a3e
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ryujinx
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ARMeilleure
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Instructions
LDj3SNuD 8a33e884f8 Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 5 anni fa
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CryptoHelper.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitAlu.cs b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) 6 anni fa
InstEmitAlu32.cs 8a33e884f8 Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 5 anni fa
InstEmitAluHelper.cs 61634dd415 Clear JIT cache on exit (#1518) 5 anni fa
InstEmitBfm.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitCcmp.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitCsel.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitDiv.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitException.cs 6c9565693f IPC refactor part 1: Use explicit separate threads to process requests (#1447) 5 anni fa
InstEmitException32.cs 6c9565693f IPC refactor part 1: Use explicit separate threads to process requests (#1447) 5 anni fa
InstEmitFlow.cs 2421186d97 Generalize tail continues (#1298) 5 anni fa
InstEmitFlow32.cs 2421186d97 Generalize tail continues (#1298) 5 anni fa
InstEmitFlowHelper.cs 61634dd415 Clear JIT cache on exit (#1518) 5 anni fa
InstEmitHash.cs d7044b10a2 Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 5 anni fa
InstEmitHash32.cs d7044b10a2 Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 5 anni fa
InstEmitHashHelper.cs d7044b10a2 Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 5 anni fa
InstEmitHelper.cs 61634dd415 Clear JIT cache on exit (#1518) 5 anni fa
InstEmitMemory.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitMemory32.cs b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) 6 anni fa
InstEmitMemoryEx.cs 9878fc2d3c Implement inline memory load/store exclusive and ordered (#1413) 5 anni fa
InstEmitMemoryEx32.cs 9878fc2d3c Implement inline memory load/store exclusive and ordered (#1413) 5 anni fa
InstEmitMemoryExHelper.cs c8bb3cc50e Fix register read after write on STREX implementation (#1801) 5 anni fa
InstEmitMemoryHelper.cs b4d8d893a4 Memory Read/Write Tracking using Region Handles (#1272) 5 anni fa
InstEmitMove.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitMul.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitMul32.cs 8a33e884f8 Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 5 anni fa
InstEmitSimdArithmetic.cs 567ea726e1 Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 5 anni fa
InstEmitSimdArithmetic32.cs 8a33e884f8 Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 5 anni fa
InstEmitSimdCmp.cs e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) 5 anni fa
InstEmitSimdCmp32.cs e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) 5 anni fa
InstEmitSimdCrypto.cs 5e724cf24e Add Profiled Persistent Translation Cache. (#769) 5 anni fa
InstEmitSimdCrypto32.cs 5e724cf24e Add Profiled Persistent Translation Cache. (#769) 5 anni fa
InstEmitSimdCvt.cs 0679084f11 CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650) 5 anni fa
InstEmitSimdCvt32.cs e901b7850c CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) 5 anni fa
InstEmitSimdHash.cs 5e724cf24e Add Profiled Persistent Translation Cache. (#769) 5 anni fa
InstEmitSimdHelper.cs 567ea726e1 Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 5 anni fa
InstEmitSimdHelper32.cs 8a33e884f8 Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 5 anni fa
InstEmitSimdLogical.cs 0915731a9d Implemented fast paths for: (#846) 6 anni fa
InstEmitSimdLogical32.cs 3af2ce74ec Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) 5 anni fa
InstEmitSimdMemory.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) 6 anni fa
InstEmitSimdMemory32.cs b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) 6 anni fa
InstEmitSimdMove.cs 5e724cf24e Add Profiled Persistent Translation Cache. (#769) 5 anni fa
InstEmitSimdMove32.cs 6938988427 Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471) 5 anni fa
InstEmitSimdShift.cs a804db6eed Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335) 5 anni fa
InstEmitSimdShift32.cs 04e330cc00 Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577) 5 anni fa
InstEmitSystem.cs 5e724cf24e Add Profiled Persistent Translation Cache. (#769) 5 anni fa
InstEmitSystem32.cs e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) 5 anni fa
InstName.cs e901b7850c CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) 5 anni fa
NativeInterface.cs b5c215111d PPTC Follow-up. (#1712) 5 anni fa
SoftFallback.cs e4ee61d6c3 Improve V128 (#1097) 6 anni fa
SoftFloat.cs 5e724cf24e Add Profiled Persistent Translation Cache. (#769) 5 anni fa