CpuTestSimdCvt32.cs 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264
  1. #define SimdCvt32
  2. using ARMeilleure.State;
  3. using NUnit.Framework;
  4. using System;
  5. using System.Collections.Generic;
  6. namespace Ryujinx.Tests.Cpu
  7. {
  8. [Category("SimdCvt32")]
  9. public sealed class CpuTestSimdCvt32 : CpuTest32
  10. {
  11. #if SimdCvt32
  12. #region "ValueSource (Opcodes)"
  13. #endregion
  14. #region "ValueSource (Types)"
  15. private static uint[] _1S_()
  16. {
  17. return new uint[] { 0x00000000u, 0x7FFFFFFFu,
  18. 0x80000000u, 0xFFFFFFFFu };
  19. }
  20. private static IEnumerable<ulong> _1S_F_()
  21. {
  22. yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
  23. yield return 0x0000000080800000ul; // -Min Normal
  24. yield return 0x00000000807FFFFFul; // -Max Subnormal
  25. yield return 0x0000000080000001ul; // -Min Subnormal (-float.Epsilon)
  26. yield return 0x000000007F7FFFFFul; // +Max Normal (float.MaxValue)
  27. yield return 0x0000000000800000ul; // +Min Normal
  28. yield return 0x00000000007FFFFFul; // +Max Subnormal
  29. yield return 0x0000000000000001ul; // +Min Subnormal (float.Epsilon)
  30. if (!NoZeros)
  31. {
  32. yield return 0x0000000080000000ul; // -Zero
  33. yield return 0x0000000000000000ul; // +Zero
  34. }
  35. if (!NoInfs)
  36. {
  37. yield return 0x00000000FF800000ul; // -Infinity
  38. yield return 0x000000007F800000ul; // +Infinity
  39. }
  40. if (!NoNaNs)
  41. {
  42. yield return 0x00000000FFC00000ul; // -QNaN (all zeros payload) (float.NaN)
  43. yield return 0x00000000FFBFFFFFul; // -SNaN (all ones payload)
  44. yield return 0x000000007FC00000ul; // +QNaN (all zeros payload) (-float.NaN) (DefaultNaN)
  45. yield return 0x000000007FBFFFFFul; // +SNaN (all ones payload)
  46. }
  47. for (int cnt = 1; cnt <= RndCnt; cnt++)
  48. {
  49. ulong grbg = TestContext.CurrentContext.Random.NextUInt();
  50. ulong rnd1 = GenNormalS();
  51. ulong rnd2 = GenSubnormalS();
  52. yield return (grbg << 32) | rnd1;
  53. yield return (grbg << 32) | rnd2;
  54. }
  55. }
  56. private static IEnumerable<ulong> _1D_F_()
  57. {
  58. yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
  59. yield return 0x8010000000000000ul; // -Min Normal
  60. yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
  61. yield return 0x8000000000000001ul; // -Min Subnormal (-double.Epsilon)
  62. yield return 0x7FEFFFFFFFFFFFFFul; // +Max Normal (double.MaxValue)
  63. yield return 0x0010000000000000ul; // +Min Normal
  64. yield return 0x000FFFFFFFFFFFFFul; // +Max Subnormal
  65. yield return 0x0000000000000001ul; // +Min Subnormal (double.Epsilon)
  66. if (!NoZeros)
  67. {
  68. yield return 0x8000000000000000ul; // -Zero
  69. yield return 0x0000000000000000ul; // +Zero
  70. }
  71. if (!NoInfs)
  72. {
  73. yield return 0xFFF0000000000000ul; // -Infinity
  74. yield return 0x7FF0000000000000ul; // +Infinity
  75. }
  76. if (!NoNaNs)
  77. {
  78. yield return 0xFFF8000000000000ul; // -QNaN (all zeros payload) (double.NaN)
  79. yield return 0xFFF7FFFFFFFFFFFFul; // -SNaN (all ones payload)
  80. yield return 0x7FF8000000000000ul; // +QNaN (all zeros payload) (-double.NaN) (DefaultNaN)
  81. yield return 0x7FF7FFFFFFFFFFFFul; // +SNaN (all ones payload)
  82. }
  83. for (int cnt = 1; cnt <= RndCnt; cnt++)
  84. {
  85. ulong rnd1 = GenNormalD();
  86. ulong rnd2 = GenSubnormalD();
  87. yield return rnd1;
  88. yield return rnd2;
  89. }
  90. }
  91. #endregion
  92. private const int RndCnt = 2;
  93. private static readonly bool NoZeros = false;
  94. private static readonly bool NoInfs = false;
  95. private static readonly bool NoNaNs = false;
  96. [Explicit]
  97. [Test, Pairwise, Description("VCVT.<dt>.F32 <Sd>, <Sm>")]
  98. public void Vcvt_F32_I32([Values(0u, 1u, 2u, 3u)] uint rd,
  99. [Values(0u, 1u, 2u, 3u)] uint rm,
  100. [ValueSource(nameof(_1S_F_))] ulong s0,
  101. [ValueSource(nameof(_1S_F_))] ulong s1,
  102. [ValueSource(nameof(_1S_F_))] ulong s2,
  103. [ValueSource(nameof(_1S_F_))] ulong s3,
  104. [Values] bool unsigned) // <U32, S32>
  105. {
  106. uint opcode = 0xeebc0ac0u; // VCVT.U32.F32 S0, S0
  107. if (!unsigned)
  108. {
  109. opcode |= 1 << 16; // opc2<0>
  110. }
  111. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  112. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  113. V128 v0 = MakeVectorE0E1E2E3((uint)s0, (uint)s1, (uint)s2, (uint)s3);
  114. SingleOpcode(opcode, v0: v0);
  115. CompareAgainstUnicorn();
  116. }
  117. [Explicit]
  118. [Test, Pairwise, Description("VCVT.<dt>.F64 <Sd>, <Dm>")]
  119. public void Vcvt_F64_I32([Values(0u, 1u, 2u, 3u)] uint rd,
  120. [Values(0u, 1u)] uint rm,
  121. [ValueSource(nameof(_1D_F_))] ulong d0,
  122. [ValueSource(nameof(_1D_F_))] ulong d1,
  123. [Values] bool unsigned) // <U32, S32>
  124. {
  125. uint opcode = 0xeebc0bc0u; // VCVT.U32.F64 S0, D0
  126. if (!unsigned)
  127. {
  128. opcode |= 1 << 16; // opc2<0>
  129. }
  130. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  131. opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
  132. V128 v0 = MakeVectorE0E1(d0, d1);
  133. SingleOpcode(opcode, v0: v0);
  134. CompareAgainstUnicorn();
  135. }
  136. [Explicit]
  137. [Test, Pairwise, Description("VCVT.F32.<dt> <Sd>, <Sm>")]
  138. public void Vcvt_I32_F32([Values(0u, 1u, 2u, 3u)] uint rd,
  139. [Values(0u, 1u, 2u, 3u)] uint rm,
  140. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s0,
  141. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s1,
  142. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s2,
  143. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s3,
  144. [Values] bool unsigned, // <U32, S32>
  145. [Values(RMode.Rn)] RMode rMode)
  146. {
  147. uint opcode = 0xeeb80a40u; // VCVT.F32.U32 S0, S0
  148. if (!unsigned)
  149. {
  150. opcode |= 1 << 7; // op
  151. }
  152. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  153. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  154. V128 v0 = MakeVectorE0E1E2E3(s0, s1, s2, s3);
  155. int fpscr = (int)rMode << (int)Fpcr.RMode;
  156. SingleOpcode(opcode, v0: v0, fpscr: fpscr);
  157. CompareAgainstUnicorn();
  158. }
  159. [Explicit]
  160. [Test, Pairwise, Description("VCVT.F64.<dt> <Dd>, <Sm>")]
  161. public void Vcvt_I32_F64([Values(0u, 1u)] uint rd,
  162. [Values(0u, 1u, 2u, 3u)] uint rm,
  163. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s0,
  164. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s1,
  165. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s2,
  166. [ValueSource(nameof(_1S_))] [Random(RndCnt)] uint s3,
  167. [Values] bool unsigned, // <U32, S32>
  168. [Values(RMode.Rn)] RMode rMode)
  169. {
  170. uint opcode = 0xeeb80b40u; // VCVT.F64.U32 D0, S0
  171. if (!unsigned)
  172. {
  173. opcode |= 1 << 7; // op
  174. }
  175. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  176. opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
  177. V128 v0 = MakeVectorE0E1E2E3(s0, s1, s2, s3);
  178. int fpscr = (int)rMode << (int)Fpcr.RMode;
  179. SingleOpcode(opcode, v0: v0, fpscr: fpscr);
  180. CompareAgainstUnicorn();
  181. }
  182. [Test, Pairwise, Description("VRINTX.F<size> <Sd>, <Sm>")]
  183. public void Vrintx_S([Values(0u, 1u)] uint rd,
  184. [Values(0u, 1u)] uint rm,
  185. [Values(2u, 3u)] uint size,
  186. [ValueSource(nameof(_1D_F_))] ulong s0,
  187. [ValueSource(nameof(_1D_F_))] ulong s1,
  188. [ValueSource(nameof(_1D_F_))] ulong s2,
  189. [Values(RMode.Rn, RMode.Rm, RMode.Rp)] RMode rMode)
  190. {
  191. uint opcode = 0xEB70A40;
  192. V128 v0, v1, v2;
  193. if (size == 2)
  194. {
  195. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  196. opcode |= ((rd & 0x1e) >> 11) | ((rm & 0x1) << 22);
  197. v0 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s0), (uint)BitConverter.SingleToInt32Bits(s0));
  198. v1 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s1), (uint)BitConverter.SingleToInt32Bits(s0));
  199. v2 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s2), (uint)BitConverter.SingleToInt32Bits(s1));
  200. }
  201. else
  202. {
  203. opcode |= ((rm & 0xf) << 0) | ((rd & 0x10) << 1);
  204. opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
  205. v0 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s0), (uint)BitConverter.DoubleToInt64Bits(s0));
  206. v1 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s1), (uint)BitConverter.DoubleToInt64Bits(s0));
  207. v2 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s2), (uint)BitConverter.DoubleToInt64Bits(s1));
  208. }
  209. opcode |= ((size & 3) << 8);
  210. int fpscr = (int)rMode << (int)Fpcr.RMode;
  211. SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, fpscr: fpscr);
  212. CompareAgainstUnicorn();
  213. }
  214. #endif
  215. }
  216. }