LDj3SNuD 5af8ce7c38 A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… (#3712) пре 3 година
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Aarch32Mode.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) пре 6 година
ExceptionCallback.cs 0c87bf9ea4 Refactor CPU interface to allow the implementation of other CPU emulators (#3362) пре 3 година
ExecutionContext.cs 814f75142e Fpsr and Fpcr freed. (#3701) пре 3 година
ExecutionMode.cs dc0adb533d PPTC & Pool Enhancements. (#1968) пре 5 година
FPCR.cs 814f75142e Fpsr and Fpcr freed. (#3701) пре 3 година
FPException.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) пре 6 година
FPRoundingMode.cs 5af8ce7c38 A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… (#3712) пре 3 година
FPSCR.cs 814f75142e Fpsr and Fpcr freed. (#3701) пре 3 година
FPSR.cs 814f75142e Fpsr and Fpcr freed. (#3701) пре 3 година
FPState.cs 814f75142e Fpsr and Fpcr freed. (#3701) пре 3 година
FPType.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) пре 6 година
ICounter.cs 0c87bf9ea4 Refactor CPU interface to allow the implementation of other CPU emulators (#3362) пре 3 година
NativeContext.cs 814f75142e Fpsr and Fpcr freed. (#3701) пре 3 година
PState.cs 8e119a1e96 Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 (#3693) пре 3 година
RegisterAlias.cs b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) пре 6 година
RegisterConsts.cs b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) пре 6 година
V128.cs 430ba6da65 CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) пре 5 година