AInstEmitSimdHelper.cs 47 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495
  1. using ChocolArm64.Decoder;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection;
  6. using System.Reflection.Emit;
  7. using System.Runtime.Intrinsics;
  8. using System.Runtime.Intrinsics.X86;
  9. namespace ChocolArm64.Instruction
  10. {
  11. static class AInstEmitSimdHelper
  12. {
  13. public static readonly Type[] IntTypesPerSizeLog2 = new Type[]
  14. {
  15. typeof(sbyte),
  16. typeof(short),
  17. typeof(int),
  18. typeof(long)
  19. };
  20. public static readonly Type[] UIntTypesPerSizeLog2 = new Type[]
  21. {
  22. typeof(byte),
  23. typeof(ushort),
  24. typeof(uint),
  25. typeof(ulong)
  26. };
  27. public static readonly Type[] VectorIntTypesPerSizeLog2 = new Type[]
  28. {
  29. typeof(Vector128<sbyte>),
  30. typeof(Vector128<short>),
  31. typeof(Vector128<int>),
  32. typeof(Vector128<long>)
  33. };
  34. public static readonly Type[] VectorUIntTypesPerSizeLog2 = new Type[]
  35. {
  36. typeof(Vector128<byte>),
  37. typeof(Vector128<ushort>),
  38. typeof(Vector128<uint>),
  39. typeof(Vector128<ulong>)
  40. };
  41. [Flags]
  42. public enum OperFlags
  43. {
  44. Rd = 1 << 0,
  45. Rn = 1 << 1,
  46. Rm = 1 << 2,
  47. Ra = 1 << 3,
  48. RnRm = Rn | Rm,
  49. RdRn = Rd | Rn,
  50. RaRnRm = Ra | Rn | Rm,
  51. RdRnRm = Rd | Rn | Rm
  52. }
  53. public static int GetImmShl(AOpCodeSimdShImm Op)
  54. {
  55. return Op.Imm - (8 << Op.Size);
  56. }
  57. public static int GetImmShr(AOpCodeSimdShImm Op)
  58. {
  59. return (8 << (Op.Size + 1)) - Op.Imm;
  60. }
  61. public static void EmitSse2Op(AILEmitterCtx Context, string Name)
  62. {
  63. EmitSseOp(Context, Name, typeof(Sse2));
  64. }
  65. public static void EmitSse41Op(AILEmitterCtx Context, string Name)
  66. {
  67. EmitSseOp(Context, Name, typeof(Sse41));
  68. }
  69. public static void EmitSse42Op(AILEmitterCtx Context, string Name)
  70. {
  71. EmitSseOp(Context, Name, typeof(Sse42));
  72. }
  73. private static void EmitSseOp(AILEmitterCtx Context, string Name, Type Type)
  74. {
  75. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  76. EmitLdvecWithSignedCast(Context, Op.Rn, Op.Size);
  77. Type BaseType = VectorIntTypesPerSizeLog2[Op.Size];
  78. if (Op is AOpCodeSimdReg BinOp)
  79. {
  80. EmitLdvecWithSignedCast(Context, BinOp.Rm, Op.Size);
  81. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType, BaseType }));
  82. }
  83. else
  84. {
  85. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType }));
  86. }
  87. EmitStvecWithSignedCast(Context, Op.Rd, Op.Size);
  88. if (Op.RegisterSize == ARegisterSize.SIMD64)
  89. {
  90. EmitVectorZeroUpper(Context, Op.Rd);
  91. }
  92. }
  93. public static void EmitLdvecWithSignedCast(AILEmitterCtx Context, int Reg, int Size)
  94. {
  95. Context.EmitLdvec(Reg);
  96. switch (Size)
  97. {
  98. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToSByte)); break;
  99. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt16)); break;
  100. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt32)); break;
  101. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt64)); break;
  102. default: throw new ArgumentOutOfRangeException(nameof(Size));
  103. }
  104. }
  105. public static void EmitLdvecWithCastToDouble(AILEmitterCtx Context, int Reg)
  106. {
  107. Context.EmitLdvec(Reg);
  108. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToDouble));
  109. }
  110. public static void EmitStvecWithCastFromDouble(AILEmitterCtx Context, int Reg)
  111. {
  112. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorDoubleToSingle));
  113. Context.EmitStvec(Reg);
  114. }
  115. public static void EmitLdvecWithUnsignedCast(AILEmitterCtx Context, int Reg, int Size)
  116. {
  117. Context.EmitLdvec(Reg);
  118. switch (Size)
  119. {
  120. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToByte)); break;
  121. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToUInt16)); break;
  122. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToUInt32)); break;
  123. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToUInt64)); break;
  124. default: throw new ArgumentOutOfRangeException(nameof(Size));
  125. }
  126. }
  127. public static void EmitStvecWithSignedCast(AILEmitterCtx Context, int Reg, int Size)
  128. {
  129. switch (Size)
  130. {
  131. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSByteToSingle)); break;
  132. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt16ToSingle)); break;
  133. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt32ToSingle)); break;
  134. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt64ToSingle)); break;
  135. default: throw new ArgumentOutOfRangeException(nameof(Size));
  136. }
  137. Context.EmitStvec(Reg);
  138. }
  139. public static void EmitStvecWithUnsignedCast(AILEmitterCtx Context, int Reg, int Size)
  140. {
  141. switch (Size)
  142. {
  143. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorByteToSingle)); break;
  144. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorUInt16ToSingle)); break;
  145. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorUInt32ToSingle)); break;
  146. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorUInt64ToSingle)); break;
  147. default: throw new ArgumentOutOfRangeException(nameof(Size));
  148. }
  149. Context.EmitStvec(Reg);
  150. }
  151. public static void EmitScalarSseOrSse2OpF(AILEmitterCtx Context, string Name)
  152. {
  153. EmitSseOrSse2OpF(Context, Name, true);
  154. }
  155. public static void EmitVectorSseOrSse2OpF(AILEmitterCtx Context, string Name)
  156. {
  157. EmitSseOrSse2OpF(Context, Name, false);
  158. }
  159. public static void EmitSseOrSse2OpF(AILEmitterCtx Context, string Name, bool Scalar)
  160. {
  161. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  162. int SizeF = Op.Size & 1;
  163. void Ldvec(int Reg)
  164. {
  165. Context.EmitLdvec(Reg);
  166. if (SizeF == 1)
  167. {
  168. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToDouble));
  169. }
  170. }
  171. Ldvec(Op.Rn);
  172. Type Type;
  173. Type BaseType;
  174. if (SizeF == 0)
  175. {
  176. Type = typeof(Sse);
  177. BaseType = typeof(Vector128<float>);
  178. }
  179. else /* if (SizeF == 1) */
  180. {
  181. Type = typeof(Sse2);
  182. BaseType = typeof(Vector128<double>);
  183. }
  184. if (Op is AOpCodeSimdReg BinOp)
  185. {
  186. Ldvec(BinOp.Rm);
  187. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType, BaseType }));
  188. }
  189. else
  190. {
  191. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType }));
  192. }
  193. if (SizeF == 1)
  194. {
  195. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorDoubleToSingle));
  196. }
  197. Context.EmitStvec(Op.Rd);
  198. if (Scalar)
  199. {
  200. if (SizeF == 0)
  201. {
  202. EmitVectorZero32_128(Context, Op.Rd);
  203. }
  204. else /* if (SizeF == 1) */
  205. {
  206. EmitVectorZeroUpper(Context, Op.Rd);
  207. }
  208. }
  209. else if (Op.RegisterSize == ARegisterSize.SIMD64)
  210. {
  211. EmitVectorZeroUpper(Context, Op.Rd);
  212. }
  213. }
  214. public static void EmitUnaryMathCall(AILEmitterCtx Context, string Name)
  215. {
  216. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  217. int SizeF = Op.Size & 1;
  218. MethodInfo MthdInfo;
  219. if (SizeF == 0)
  220. {
  221. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float) });
  222. }
  223. else /* if (SizeF == 1) */
  224. {
  225. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double) });
  226. }
  227. Context.EmitCall(MthdInfo);
  228. }
  229. public static void EmitBinaryMathCall(AILEmitterCtx Context, string Name)
  230. {
  231. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  232. int SizeF = Op.Size & 1;
  233. MethodInfo MthdInfo;
  234. if (SizeF == 0)
  235. {
  236. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float), typeof(float) });
  237. }
  238. else /* if (SizeF == 1) */
  239. {
  240. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double), typeof(double) });
  241. }
  242. Context.EmitCall(MthdInfo);
  243. }
  244. public static void EmitRoundMathCall(AILEmitterCtx Context, MidpointRounding RoundMode)
  245. {
  246. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  247. int SizeF = Op.Size & 1;
  248. MethodInfo MthdInfo;
  249. if (SizeF == 0)
  250. {
  251. MthdInfo = typeof(MathF).GetMethod(nameof(MathF.Round), new Type[] { typeof(float), typeof(MidpointRounding) });
  252. }
  253. else /* if (SizeF == 1) */
  254. {
  255. MthdInfo = typeof(Math).GetMethod(nameof(Math.Round), new Type[] { typeof(double), typeof(MidpointRounding) });
  256. }
  257. Context.EmitLdc_I4((int)RoundMode);
  258. Context.EmitCall(MthdInfo);
  259. }
  260. public static void EmitUnarySoftFloatCall(AILEmitterCtx Context, string Name)
  261. {
  262. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  263. int SizeF = Op.Size & 1;
  264. MethodInfo MthdInfo;
  265. if (SizeF == 0)
  266. {
  267. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(float) });
  268. }
  269. else /* if (SizeF == 1) */
  270. {
  271. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(double) });
  272. }
  273. Context.EmitCall(MthdInfo);
  274. }
  275. public static void EmitSoftFloatCall(AILEmitterCtx Context, string Name)
  276. {
  277. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  278. Type Type = (Op.Size & 1) == 0
  279. ? typeof(ASoftFloat_32)
  280. : typeof(ASoftFloat_64);
  281. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  282. Context.EmitCall(Type, Name);
  283. }
  284. public static void EmitScalarBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
  285. {
  286. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  287. EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: false);
  288. }
  289. public static void EmitScalarTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
  290. {
  291. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  292. EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: true);
  293. }
  294. public static void EmitScalarOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
  295. {
  296. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  297. int SizeF = Op.Size & 1;
  298. if (Ternary)
  299. {
  300. EmitVectorExtractF(Context, Op.Rd, 0, SizeF);
  301. }
  302. EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
  303. EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
  304. Emit();
  305. EmitScalarSetF(Context, Op.Rd, SizeF);
  306. }
  307. public static void EmitScalarUnaryOpSx(AILEmitterCtx Context, Action Emit)
  308. {
  309. EmitScalarOp(Context, Emit, OperFlags.Rn, true);
  310. }
  311. public static void EmitScalarBinaryOpSx(AILEmitterCtx Context, Action Emit)
  312. {
  313. EmitScalarOp(Context, Emit, OperFlags.RnRm, true);
  314. }
  315. public static void EmitScalarUnaryOpZx(AILEmitterCtx Context, Action Emit)
  316. {
  317. EmitScalarOp(Context, Emit, OperFlags.Rn, false);
  318. }
  319. public static void EmitScalarBinaryOpZx(AILEmitterCtx Context, Action Emit)
  320. {
  321. EmitScalarOp(Context, Emit, OperFlags.RnRm, false);
  322. }
  323. public static void EmitScalarTernaryOpZx(AILEmitterCtx Context, Action Emit)
  324. {
  325. EmitScalarOp(Context, Emit, OperFlags.RdRnRm, false);
  326. }
  327. public static void EmitScalarOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  328. {
  329. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  330. bool Rd = (Opers & OperFlags.Rd) != 0;
  331. bool Rn = (Opers & OperFlags.Rn) != 0;
  332. bool Rm = (Opers & OperFlags.Rm) != 0;
  333. if (Rd)
  334. {
  335. EmitVectorExtract(Context, Op.Rd, 0, Op.Size, Signed);
  336. }
  337. if (Rn)
  338. {
  339. EmitVectorExtract(Context, Op.Rn, 0, Op.Size, Signed);
  340. }
  341. if (Rm)
  342. {
  343. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, 0, Op.Size, Signed);
  344. }
  345. Emit();
  346. EmitScalarSet(Context, Op.Rd, Op.Size);
  347. }
  348. public static void EmitScalarUnaryOpF(AILEmitterCtx Context, Action Emit)
  349. {
  350. EmitScalarOpF(Context, Emit, OperFlags.Rn);
  351. }
  352. public static void EmitScalarBinaryOpF(AILEmitterCtx Context, Action Emit)
  353. {
  354. EmitScalarOpF(Context, Emit, OperFlags.RnRm);
  355. }
  356. public static void EmitScalarTernaryRaOpF(AILEmitterCtx Context, Action Emit)
  357. {
  358. EmitScalarOpF(Context, Emit, OperFlags.RaRnRm);
  359. }
  360. public static void EmitScalarOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  361. {
  362. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  363. int SizeF = Op.Size & 1;
  364. bool Ra = (Opers & OperFlags.Ra) != 0;
  365. bool Rn = (Opers & OperFlags.Rn) != 0;
  366. bool Rm = (Opers & OperFlags.Rm) != 0;
  367. if (Ra)
  368. {
  369. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Ra, 0, SizeF);
  370. }
  371. if (Rn)
  372. {
  373. EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
  374. }
  375. if (Rm)
  376. {
  377. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Rm, 0, SizeF);
  378. }
  379. Emit();
  380. EmitScalarSetF(Context, Op.Rd, SizeF);
  381. }
  382. public static void EmitVectorUnaryOpF(AILEmitterCtx Context, Action Emit)
  383. {
  384. EmitVectorOpF(Context, Emit, OperFlags.Rn);
  385. }
  386. public static void EmitVectorBinaryOpF(AILEmitterCtx Context, Action Emit)
  387. {
  388. EmitVectorOpF(Context, Emit, OperFlags.RnRm);
  389. }
  390. public static void EmitVectorTernaryOpF(AILEmitterCtx Context, Action Emit)
  391. {
  392. EmitVectorOpF(Context, Emit, OperFlags.RdRnRm);
  393. }
  394. public static void EmitVectorOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  395. {
  396. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  397. int SizeF = Op.Size & 1;
  398. int Bytes = Op.GetBitsCount() >> 3;
  399. int Elems = Bytes >> SizeF + 2;
  400. bool Rd = (Opers & OperFlags.Rd) != 0;
  401. bool Rn = (Opers & OperFlags.Rn) != 0;
  402. bool Rm = (Opers & OperFlags.Rm) != 0;
  403. for (int Index = 0; Index < Elems; Index++)
  404. {
  405. if (Rd)
  406. {
  407. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  408. }
  409. if (Rn)
  410. {
  411. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  412. }
  413. if (Rm)
  414. {
  415. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Rm, Index, SizeF);
  416. }
  417. Emit();
  418. EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
  419. }
  420. if (Op.RegisterSize == ARegisterSize.SIMD64)
  421. {
  422. EmitVectorZeroUpper(Context, Op.Rd);
  423. }
  424. }
  425. public static void EmitVectorBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
  426. {
  427. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  428. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: false);
  429. }
  430. public static void EmitVectorTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
  431. {
  432. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  433. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: true);
  434. }
  435. public static void EmitVectorOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
  436. {
  437. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  438. int SizeF = Op.Size & 1;
  439. int Bytes = Op.GetBitsCount() >> 3;
  440. int Elems = Bytes >> SizeF + 2;
  441. for (int Index = 0; Index < Elems; Index++)
  442. {
  443. if (Ternary)
  444. {
  445. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  446. }
  447. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  448. EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
  449. Emit();
  450. EmitVectorInsertTmpF(Context, Index, SizeF);
  451. }
  452. Context.EmitLdvectmp();
  453. Context.EmitStvec(Op.Rd);
  454. if (Op.RegisterSize == ARegisterSize.SIMD64)
  455. {
  456. EmitVectorZeroUpper(Context, Op.Rd);
  457. }
  458. }
  459. public static void EmitVectorUnaryOpSx(AILEmitterCtx Context, Action Emit)
  460. {
  461. EmitVectorOp(Context, Emit, OperFlags.Rn, true);
  462. }
  463. public static void EmitVectorBinaryOpSx(AILEmitterCtx Context, Action Emit)
  464. {
  465. EmitVectorOp(Context, Emit, OperFlags.RnRm, true);
  466. }
  467. public static void EmitVectorTernaryOpSx(AILEmitterCtx Context, Action Emit)
  468. {
  469. EmitVectorOp(Context, Emit, OperFlags.RdRnRm, true);
  470. }
  471. public static void EmitVectorUnaryOpZx(AILEmitterCtx Context, Action Emit)
  472. {
  473. EmitVectorOp(Context, Emit, OperFlags.Rn, false);
  474. }
  475. public static void EmitVectorBinaryOpZx(AILEmitterCtx Context, Action Emit)
  476. {
  477. EmitVectorOp(Context, Emit, OperFlags.RnRm, false);
  478. }
  479. public static void EmitVectorTernaryOpZx(AILEmitterCtx Context, Action Emit)
  480. {
  481. EmitVectorOp(Context, Emit, OperFlags.RdRnRm, false);
  482. }
  483. public static void EmitVectorOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  484. {
  485. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  486. int Bytes = Op.GetBitsCount() >> 3;
  487. int Elems = Bytes >> Op.Size;
  488. bool Rd = (Opers & OperFlags.Rd) != 0;
  489. bool Rn = (Opers & OperFlags.Rn) != 0;
  490. bool Rm = (Opers & OperFlags.Rm) != 0;
  491. for (int Index = 0; Index < Elems; Index++)
  492. {
  493. if (Rd)
  494. {
  495. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  496. }
  497. if (Rn)
  498. {
  499. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  500. }
  501. if (Rm)
  502. {
  503. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  504. }
  505. Emit();
  506. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  507. }
  508. if (Op.RegisterSize == ARegisterSize.SIMD64)
  509. {
  510. EmitVectorZeroUpper(Context, Op.Rd);
  511. }
  512. }
  513. public static void EmitVectorBinaryOpByElemSx(AILEmitterCtx Context, Action Emit)
  514. {
  515. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  516. EmitVectorOpByElem(Context, Emit, Op.Index, false, true);
  517. }
  518. public static void EmitVectorBinaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  519. {
  520. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  521. EmitVectorOpByElem(Context, Emit, Op.Index, false, false);
  522. }
  523. public static void EmitVectorTernaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  524. {
  525. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  526. EmitVectorOpByElem(Context, Emit, Op.Index, true, false);
  527. }
  528. public static void EmitVectorOpByElem(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary, bool Signed)
  529. {
  530. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  531. int Bytes = Op.GetBitsCount() >> 3;
  532. int Elems = Bytes >> Op.Size;
  533. EmitVectorExtract(Context, Op.Rm, Elem, Op.Size, Signed);
  534. Context.EmitSttmp();
  535. for (int Index = 0; Index < Elems; Index++)
  536. {
  537. if (Ternary)
  538. {
  539. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  540. }
  541. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  542. Context.EmitLdtmp();
  543. Emit();
  544. EmitVectorInsertTmp(Context, Index, Op.Size);
  545. }
  546. Context.EmitLdvectmp();
  547. Context.EmitStvec(Op.Rd);
  548. if (Op.RegisterSize == ARegisterSize.SIMD64)
  549. {
  550. EmitVectorZeroUpper(Context, Op.Rd);
  551. }
  552. }
  553. public static void EmitVectorImmUnaryOp(AILEmitterCtx Context, Action Emit)
  554. {
  555. EmitVectorImmOp(Context, Emit, false);
  556. }
  557. public static void EmitVectorImmBinaryOp(AILEmitterCtx Context, Action Emit)
  558. {
  559. EmitVectorImmOp(Context, Emit, true);
  560. }
  561. public static void EmitVectorImmOp(AILEmitterCtx Context, Action Emit, bool Binary)
  562. {
  563. AOpCodeSimdImm Op = (AOpCodeSimdImm)Context.CurrOp;
  564. int Bytes = Op.GetBitsCount() >> 3;
  565. int Elems = Bytes >> Op.Size;
  566. for (int Index = 0; Index < Elems; Index++)
  567. {
  568. if (Binary)
  569. {
  570. EmitVectorExtractZx(Context, Op.Rd, Index, Op.Size);
  571. }
  572. Context.EmitLdc_I8(Op.Imm);
  573. Emit();
  574. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  575. }
  576. if (Op.RegisterSize == ARegisterSize.SIMD64)
  577. {
  578. EmitVectorZeroUpper(Context, Op.Rd);
  579. }
  580. }
  581. public static void EmitVectorWidenRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  582. {
  583. EmitVectorWidenRmBinaryOp(Context, Emit, true);
  584. }
  585. public static void EmitVectorWidenRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  586. {
  587. EmitVectorWidenRmBinaryOp(Context, Emit, false);
  588. }
  589. public static void EmitVectorWidenRmBinaryOp(AILEmitterCtx Context, Action Emit, bool Signed)
  590. {
  591. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  592. int Elems = 8 >> Op.Size;
  593. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  594. for (int Index = 0; Index < Elems; Index++)
  595. {
  596. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, Signed);
  597. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  598. Emit();
  599. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  600. }
  601. Context.EmitLdvectmp();
  602. Context.EmitStvec(Op.Rd);
  603. }
  604. public static void EmitVectorWidenRnRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  605. {
  606. EmitVectorWidenRnRmOp(Context, Emit, false, true);
  607. }
  608. public static void EmitVectorWidenRnRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  609. {
  610. EmitVectorWidenRnRmOp(Context, Emit, false, false);
  611. }
  612. public static void EmitVectorWidenRnRmTernaryOpSx(AILEmitterCtx Context, Action Emit)
  613. {
  614. EmitVectorWidenRnRmOp(Context, Emit, true, true);
  615. }
  616. public static void EmitVectorWidenRnRmTernaryOpZx(AILEmitterCtx Context, Action Emit)
  617. {
  618. EmitVectorWidenRnRmOp(Context, Emit, true, false);
  619. }
  620. public static void EmitVectorWidenRnRmOp(AILEmitterCtx Context, Action Emit, bool Ternary, bool Signed)
  621. {
  622. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  623. int Elems = 8 >> Op.Size;
  624. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  625. for (int Index = 0; Index < Elems; Index++)
  626. {
  627. if (Ternary)
  628. {
  629. EmitVectorExtract(Context, Op.Rd, Index, Op.Size + 1, Signed);
  630. }
  631. EmitVectorExtract(Context, Op.Rn, Part + Index, Op.Size, Signed);
  632. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  633. Emit();
  634. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  635. }
  636. Context.EmitLdvectmp();
  637. Context.EmitStvec(Op.Rd);
  638. }
  639. public static void EmitVectorPairwiseOpSx(AILEmitterCtx Context, Action Emit)
  640. {
  641. EmitVectorPairwiseOp(Context, Emit, true);
  642. }
  643. public static void EmitVectorPairwiseOpZx(AILEmitterCtx Context, Action Emit)
  644. {
  645. EmitVectorPairwiseOp(Context, Emit, false);
  646. }
  647. public static void EmitVectorPairwiseOp(AILEmitterCtx Context, Action Emit, bool Signed)
  648. {
  649. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  650. int Words = Op.GetBitsCount() >> 4;
  651. int Pairs = Words >> Op.Size;
  652. for (int Index = 0; Index < Pairs; Index++)
  653. {
  654. int Idx = Index << 1;
  655. EmitVectorExtract(Context, Op.Rn, Idx, Op.Size, Signed);
  656. EmitVectorExtract(Context, Op.Rn, Idx + 1, Op.Size, Signed);
  657. Emit();
  658. EmitVectorExtract(Context, Op.Rm, Idx, Op.Size, Signed);
  659. EmitVectorExtract(Context, Op.Rm, Idx + 1, Op.Size, Signed);
  660. Emit();
  661. EmitVectorInsertTmp(Context, Pairs + Index, Op.Size);
  662. EmitVectorInsertTmp(Context, Index, Op.Size);
  663. }
  664. Context.EmitLdvectmp();
  665. Context.EmitStvec(Op.Rd);
  666. if (Op.RegisterSize == ARegisterSize.SIMD64)
  667. {
  668. EmitVectorZeroUpper(Context, Op.Rd);
  669. }
  670. }
  671. public static void EmitVectorPairwiseOpF(AILEmitterCtx Context, Action Emit)
  672. {
  673. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  674. int SizeF = Op.Size & 1;
  675. int Words = Op.GetBitsCount() >> 4;
  676. int Pairs = Words >> SizeF + 2;
  677. for (int Index = 0; Index < Pairs; Index++)
  678. {
  679. int Idx = Index << 1;
  680. EmitVectorExtractF(Context, Op.Rn, Idx, SizeF);
  681. EmitVectorExtractF(Context, Op.Rn, Idx + 1, SizeF);
  682. Emit();
  683. EmitVectorExtractF(Context, Op.Rm, Idx, SizeF);
  684. EmitVectorExtractF(Context, Op.Rm, Idx + 1, SizeF);
  685. Emit();
  686. EmitVectorInsertTmpF(Context, Pairs + Index, SizeF);
  687. EmitVectorInsertTmpF(Context, Index, SizeF);
  688. }
  689. Context.EmitLdvectmp();
  690. Context.EmitStvec(Op.Rd);
  691. if (Op.RegisterSize == ARegisterSize.SIMD64)
  692. {
  693. EmitVectorZeroUpper(Context, Op.Rd);
  694. }
  695. }
  696. [Flags]
  697. public enum SaturatingFlags
  698. {
  699. Scalar = 1 << 0,
  700. Signed = 1 << 1,
  701. Add = 1 << 2,
  702. Sub = 1 << 3,
  703. Accumulate = 1 << 4,
  704. ScalarSx = Scalar | Signed,
  705. ScalarZx = Scalar,
  706. VectorSx = Signed,
  707. VectorZx = 0
  708. }
  709. public static void EmitScalarSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit)
  710. {
  711. EmitSaturatingUnaryOpSx(Context, Emit, SaturatingFlags.ScalarSx);
  712. }
  713. public static void EmitVectorSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit)
  714. {
  715. EmitSaturatingUnaryOpSx(Context, Emit, SaturatingFlags.VectorSx);
  716. }
  717. public static void EmitSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit, SaturatingFlags Flags)
  718. {
  719. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  720. bool Scalar = (Flags & SaturatingFlags.Scalar) != 0;
  721. int Bytes = Op.GetBitsCount() >> 3;
  722. int Elems = !Scalar ? Bytes >> Op.Size : 1;
  723. if (Scalar)
  724. {
  725. EmitVectorZeroLowerTmp(Context);
  726. }
  727. for (int Index = 0; Index < Elems; Index++)
  728. {
  729. EmitVectorExtractSx(Context, Op.Rn, Index, Op.Size);
  730. Emit();
  731. if (Op.Size <= 2)
  732. {
  733. EmitSatQ(Context, Op.Size, true, true);
  734. }
  735. else /* if (Op.Size == 3) */
  736. {
  737. EmitUnarySignedSatQAbsOrNeg(Context);
  738. }
  739. EmitVectorInsertTmp(Context, Index, Op.Size);
  740. }
  741. Context.EmitLdvectmp();
  742. Context.EmitStvec(Op.Rd);
  743. if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
  744. {
  745. EmitVectorZeroUpper(Context, Op.Rd);
  746. }
  747. }
  748. public static void EmitScalarSaturatingBinaryOpSx(AILEmitterCtx Context, SaturatingFlags Flags)
  749. {
  750. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.ScalarSx | Flags);
  751. }
  752. public static void EmitScalarSaturatingBinaryOpZx(AILEmitterCtx Context, SaturatingFlags Flags)
  753. {
  754. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.ScalarZx | Flags);
  755. }
  756. public static void EmitVectorSaturatingBinaryOpSx(AILEmitterCtx Context, SaturatingFlags Flags)
  757. {
  758. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.VectorSx | Flags);
  759. }
  760. public static void EmitVectorSaturatingBinaryOpZx(AILEmitterCtx Context, SaturatingFlags Flags)
  761. {
  762. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.VectorZx | Flags);
  763. }
  764. public static void EmitSaturatingBinaryOp(AILEmitterCtx Context, Action Emit, SaturatingFlags Flags)
  765. {
  766. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  767. bool Scalar = (Flags & SaturatingFlags.Scalar) != 0;
  768. bool Signed = (Flags & SaturatingFlags.Signed) != 0;
  769. bool Add = (Flags & SaturatingFlags.Add) != 0;
  770. bool Sub = (Flags & SaturatingFlags.Sub) != 0;
  771. bool Accumulate = (Flags & SaturatingFlags.Accumulate) != 0;
  772. int Bytes = Op.GetBitsCount() >> 3;
  773. int Elems = !Scalar ? Bytes >> Op.Size : 1;
  774. if (Scalar)
  775. {
  776. EmitVectorZeroLowerTmp(Context);
  777. }
  778. if (Add || Sub)
  779. {
  780. for (int Index = 0; Index < Elems; Index++)
  781. {
  782. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  783. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  784. if (Op.Size <= 2)
  785. {
  786. Context.Emit(Add ? OpCodes.Add : OpCodes.Sub);
  787. EmitSatQ(Context, Op.Size, true, Signed);
  788. }
  789. else /* if (Op.Size == 3) */
  790. {
  791. if (Add)
  792. {
  793. EmitBinarySatQAdd(Context, Signed);
  794. }
  795. else /* if (Sub) */
  796. {
  797. EmitBinarySatQSub(Context, Signed);
  798. }
  799. }
  800. EmitVectorInsertTmp(Context, Index, Op.Size);
  801. }
  802. }
  803. else if (Accumulate)
  804. {
  805. for (int Index = 0; Index < Elems; Index++)
  806. {
  807. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, !Signed);
  808. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  809. if (Op.Size <= 2)
  810. {
  811. Context.Emit(OpCodes.Add);
  812. EmitSatQ(Context, Op.Size, true, Signed);
  813. }
  814. else /* if (Op.Size == 3) */
  815. {
  816. EmitBinarySatQAccumulate(Context, Signed);
  817. }
  818. EmitVectorInsertTmp(Context, Index, Op.Size);
  819. }
  820. }
  821. else
  822. {
  823. for (int Index = 0; Index < Elems; Index++)
  824. {
  825. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  826. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  827. Emit();
  828. EmitSatQ(Context, Op.Size, true, Signed);
  829. EmitVectorInsertTmp(Context, Index, Op.Size);
  830. }
  831. }
  832. Context.EmitLdvectmp();
  833. Context.EmitStvec(Op.Rd);
  834. if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
  835. {
  836. EmitVectorZeroUpper(Context, Op.Rd);
  837. }
  838. }
  839. [Flags]
  840. public enum SaturatingNarrowFlags
  841. {
  842. Scalar = 1 << 0,
  843. SignedSrc = 1 << 1,
  844. SignedDst = 1 << 2,
  845. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  846. ScalarSxZx = Scalar | SignedSrc,
  847. ScalarZxZx = Scalar,
  848. VectorSxSx = SignedSrc | SignedDst,
  849. VectorSxZx = SignedSrc,
  850. VectorZxZx = 0
  851. }
  852. public static void EmitSaturatingNarrowOp(AILEmitterCtx Context, SaturatingNarrowFlags Flags)
  853. {
  854. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  855. bool Scalar = (Flags & SaturatingNarrowFlags.Scalar) != 0;
  856. bool SignedSrc = (Flags & SaturatingNarrowFlags.SignedSrc) != 0;
  857. bool SignedDst = (Flags & SaturatingNarrowFlags.SignedDst) != 0;
  858. int Elems = !Scalar ? 8 >> Op.Size : 1;
  859. int Part = !Scalar && (Op.RegisterSize == ARegisterSize.SIMD128) ? Elems : 0;
  860. if (Scalar)
  861. {
  862. EmitVectorZeroLowerTmp(Context);
  863. }
  864. if (Part != 0)
  865. {
  866. Context.EmitLdvec(Op.Rd);
  867. Context.EmitStvectmp();
  868. }
  869. for (int Index = 0; Index < Elems; Index++)
  870. {
  871. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, SignedSrc);
  872. EmitSatQ(Context, Op.Size, SignedSrc, SignedDst);
  873. EmitVectorInsertTmp(Context, Part + Index, Op.Size);
  874. }
  875. Context.EmitLdvectmp();
  876. Context.EmitStvec(Op.Rd);
  877. if (Part == 0)
  878. {
  879. EmitVectorZeroUpper(Context, Op.Rd);
  880. }
  881. }
  882. // TSrc (16bit, 32bit, 64bit; signed, unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  883. public static void EmitSatQ(
  884. AILEmitterCtx Context,
  885. int SizeDst,
  886. bool SignedSrc,
  887. bool SignedDst)
  888. {
  889. if (SizeDst > 2)
  890. {
  891. throw new ArgumentOutOfRangeException(nameof(SizeDst));
  892. }
  893. Context.EmitLdc_I4(SizeDst);
  894. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  895. if (SignedSrc)
  896. {
  897. ASoftFallback.EmitCall(Context, SignedDst
  898. ? nameof(ASoftFallback.SignedSrcSignedDstSatQ)
  899. : nameof(ASoftFallback.SignedSrcUnsignedDstSatQ));
  900. }
  901. else
  902. {
  903. ASoftFallback.EmitCall(Context, SignedDst
  904. ? nameof(ASoftFallback.UnsignedSrcSignedDstSatQ)
  905. : nameof(ASoftFallback.UnsignedSrcUnsignedDstSatQ));
  906. }
  907. }
  908. // TSrc (64bit) == TDst (64bit); signed.
  909. public static void EmitUnarySignedSatQAbsOrNeg(AILEmitterCtx Context)
  910. {
  911. if (((AOpCodeSimd)Context.CurrOp).Size < 3)
  912. {
  913. throw new InvalidOperationException();
  914. }
  915. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  916. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.UnarySignedSatQAbsOrNeg));
  917. }
  918. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  919. public static void EmitBinarySatQAdd(AILEmitterCtx Context, bool Signed)
  920. {
  921. if (((AOpCodeSimdReg)Context.CurrOp).Size < 3)
  922. {
  923. throw new InvalidOperationException();
  924. }
  925. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  926. ASoftFallback.EmitCall(Context, Signed
  927. ? nameof(ASoftFallback.BinarySignedSatQAdd)
  928. : nameof(ASoftFallback.BinaryUnsignedSatQAdd));
  929. }
  930. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  931. public static void EmitBinarySatQSub(AILEmitterCtx Context, bool Signed)
  932. {
  933. if (((AOpCodeSimdReg)Context.CurrOp).Size < 3)
  934. {
  935. throw new InvalidOperationException();
  936. }
  937. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  938. ASoftFallback.EmitCall(Context, Signed
  939. ? nameof(ASoftFallback.BinarySignedSatQSub)
  940. : nameof(ASoftFallback.BinaryUnsignedSatQSub));
  941. }
  942. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  943. public static void EmitBinarySatQAccumulate(AILEmitterCtx Context, bool Signed)
  944. {
  945. if (((AOpCodeSimd)Context.CurrOp).Size < 3)
  946. {
  947. throw new InvalidOperationException();
  948. }
  949. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  950. ASoftFallback.EmitCall(Context, Signed
  951. ? nameof(ASoftFallback.BinarySignedSatQAcc)
  952. : nameof(ASoftFallback.BinaryUnsignedSatQAcc));
  953. }
  954. public static void EmitScalarSet(AILEmitterCtx Context, int Reg, int Size)
  955. {
  956. EmitVectorZeroAll(Context, Reg);
  957. EmitVectorInsert(Context, Reg, 0, Size);
  958. }
  959. public static void EmitScalarSetF(AILEmitterCtx Context, int Reg, int Size)
  960. {
  961. if (AOptimizations.UseSse41 && Size == 0)
  962. {
  963. //If the type is float, we can perform insertion and
  964. //zero the upper bits with a single instruction (INSERTPS);
  965. Context.EmitLdvec(Reg);
  966. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Sse41VectorInsertScalarSingle));
  967. Context.EmitStvec(Reg);
  968. }
  969. else
  970. {
  971. EmitVectorZeroAll(Context, Reg);
  972. EmitVectorInsertF(Context, Reg, 0, Size);
  973. }
  974. }
  975. public static void EmitVectorExtractSx(AILEmitterCtx Context, int Reg, int Index, int Size)
  976. {
  977. EmitVectorExtract(Context, Reg, Index, Size, true);
  978. }
  979. public static void EmitVectorExtractZx(AILEmitterCtx Context, int Reg, int Index, int Size)
  980. {
  981. EmitVectorExtract(Context, Reg, Index, Size, false);
  982. }
  983. public static void EmitVectorExtract(AILEmitterCtx Context, int Reg, int Index, int Size, bool Signed)
  984. {
  985. ThrowIfInvalid(Index, Size);
  986. Context.EmitLdvec(Reg);
  987. Context.EmitLdc_I4(Index);
  988. Context.EmitLdc_I4(Size);
  989. AVectorHelper.EmitCall(Context, Signed
  990. ? nameof(AVectorHelper.VectorExtractIntSx)
  991. : nameof(AVectorHelper.VectorExtractIntZx));
  992. }
  993. public static void EmitVectorExtractF(AILEmitterCtx Context, int Reg, int Index, int Size)
  994. {
  995. ThrowIfInvalidF(Index, Size);
  996. Context.EmitLdvec(Reg);
  997. Context.EmitLdc_I4(Index);
  998. if (Size == 0)
  999. {
  1000. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorExtractSingle));
  1001. }
  1002. else if (Size == 1)
  1003. {
  1004. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorExtractDouble));
  1005. }
  1006. else
  1007. {
  1008. throw new ArgumentOutOfRangeException(nameof(Size));
  1009. }
  1010. }
  1011. public static void EmitVectorZeroAll(AILEmitterCtx Context, int Rd)
  1012. {
  1013. if (AOptimizations.UseSse2)
  1014. {
  1015. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleZero));
  1016. Context.EmitStvec(Rd);
  1017. }
  1018. else
  1019. {
  1020. EmitVectorZeroLower(Context, Rd);
  1021. EmitVectorZeroUpper(Context, Rd);
  1022. }
  1023. }
  1024. public static void EmitVectorZeroLower(AILEmitterCtx Context, int Rd)
  1025. {
  1026. EmitVectorInsert(Context, Rd, 0, 3, 0);
  1027. }
  1028. public static void EmitVectorZeroLowerTmp(AILEmitterCtx Context)
  1029. {
  1030. EmitVectorInsertTmp(Context, 0, 3, 0);
  1031. }
  1032. public static void EmitVectorZeroUpper(AILEmitterCtx Context, int Reg)
  1033. {
  1034. if (AOptimizations.UseSse2)
  1035. {
  1036. //TODO: Use MoveScalar once it is fixed, as of the
  1037. //time of writing it just crashes the JIT.
  1038. EmitLdvecWithUnsignedCast(Context, Reg, 3);
  1039. Type[] Types = new Type[] { typeof(Vector128<ulong>), typeof(byte) };
  1040. //Context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.MoveScalar), Types));
  1041. Context.EmitLdc_I4(8);
  1042. Context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ShiftLeftLogical128BitLane), Types));
  1043. Context.EmitLdc_I4(8);
  1044. Context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ShiftRightLogical128BitLane), Types));
  1045. EmitStvecWithUnsignedCast(Context, Reg, 3);
  1046. }
  1047. else
  1048. {
  1049. EmitVectorInsert(Context, Reg, 1, 3, 0);
  1050. }
  1051. }
  1052. public static void EmitVectorZero32_128(AILEmitterCtx Context, int Reg)
  1053. {
  1054. Context.EmitLdvec(Reg);
  1055. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorZero32_128));
  1056. Context.EmitStvec(Reg);
  1057. }
  1058. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size)
  1059. {
  1060. ThrowIfInvalid(Index, Size);
  1061. Context.EmitLdvec(Reg);
  1062. Context.EmitLdc_I4(Index);
  1063. Context.EmitLdc_I4(Size);
  1064. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  1065. Context.EmitStvec(Reg);
  1066. }
  1067. public static void EmitVectorInsertTmp(AILEmitterCtx Context, int Index, int Size)
  1068. {
  1069. ThrowIfInvalid(Index, Size);
  1070. Context.EmitLdvectmp();
  1071. Context.EmitLdc_I4(Index);
  1072. Context.EmitLdc_I4(Size);
  1073. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  1074. Context.EmitStvectmp();
  1075. }
  1076. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size, long Value)
  1077. {
  1078. ThrowIfInvalid(Index, Size);
  1079. Context.EmitLdc_I8(Value);
  1080. Context.EmitLdvec(Reg);
  1081. Context.EmitLdc_I4(Index);
  1082. Context.EmitLdc_I4(Size);
  1083. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  1084. Context.EmitStvec(Reg);
  1085. }
  1086. public static void EmitVectorInsertTmp(AILEmitterCtx Context, int Index, int Size, long Value)
  1087. {
  1088. ThrowIfInvalid(Index, Size);
  1089. Context.EmitLdc_I8(Value);
  1090. Context.EmitLdvectmp();
  1091. Context.EmitLdc_I4(Index);
  1092. Context.EmitLdc_I4(Size);
  1093. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  1094. Context.EmitStvectmp();
  1095. }
  1096. public static void EmitVectorInsertF(AILEmitterCtx Context, int Reg, int Index, int Size)
  1097. {
  1098. ThrowIfInvalidF(Index, Size);
  1099. Context.EmitLdvec(Reg);
  1100. Context.EmitLdc_I4(Index);
  1101. if (Size == 0)
  1102. {
  1103. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertSingle));
  1104. }
  1105. else if (Size == 1)
  1106. {
  1107. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertDouble));
  1108. }
  1109. else
  1110. {
  1111. throw new ArgumentOutOfRangeException(nameof(Size));
  1112. }
  1113. Context.EmitStvec(Reg);
  1114. }
  1115. public static void EmitVectorInsertTmpF(AILEmitterCtx Context, int Index, int Size)
  1116. {
  1117. ThrowIfInvalidF(Index, Size);
  1118. Context.EmitLdvectmp();
  1119. Context.EmitLdc_I4(Index);
  1120. if (Size == 0)
  1121. {
  1122. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertSingle));
  1123. }
  1124. else if (Size == 1)
  1125. {
  1126. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertDouble));
  1127. }
  1128. else
  1129. {
  1130. throw new ArgumentOutOfRangeException(nameof(Size));
  1131. }
  1132. Context.EmitStvectmp();
  1133. }
  1134. private static void ThrowIfInvalid(int Index, int Size)
  1135. {
  1136. if ((uint)Size > 3u)
  1137. {
  1138. throw new ArgumentOutOfRangeException(nameof(Size));
  1139. }
  1140. if ((uint)Index >= 16u >> Size)
  1141. {
  1142. throw new ArgumentOutOfRangeException(nameof(Index));
  1143. }
  1144. }
  1145. private static void ThrowIfInvalidF(int Index, int Size)
  1146. {
  1147. if ((uint)Size > 1u)
  1148. {
  1149. throw new ArgumentOutOfRangeException(nameof(Size));
  1150. }
  1151. if ((uint)Index >= 4u >> Size)
  1152. {
  1153. throw new ArgumentOutOfRangeException(nameof(Index));
  1154. }
  1155. }
  1156. }
  1157. }