AInstEmitMemory.cs 6.4 KB

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  1. using ChocolArm64.Decoder;
  2. using ChocolArm64.Translation;
  3. using System.Reflection.Emit;
  4. using static ChocolArm64.Instruction.AInstEmitMemoryHelper;
  5. namespace ChocolArm64.Instruction
  6. {
  7. static partial class AInstEmit
  8. {
  9. public static void Adr(AILEmitterCtx Context)
  10. {
  11. AOpCodeAdr Op = (AOpCodeAdr)Context.CurrOp;
  12. Context.EmitLdc_I(Op.Position + Op.Imm);
  13. Context.EmitStintzr(Op.Rd);
  14. }
  15. public static void Adrp(AILEmitterCtx Context)
  16. {
  17. AOpCodeAdr Op = (AOpCodeAdr)Context.CurrOp;
  18. Context.EmitLdc_I((Op.Position & ~0xfffL) + (Op.Imm << 12));
  19. Context.EmitStintzr(Op.Rd);
  20. }
  21. public static void Ldr(AILEmitterCtx Context) => EmitLdr(Context, false);
  22. public static void Ldrs(AILEmitterCtx Context) => EmitLdr(Context, true);
  23. private static void EmitLdr(AILEmitterCtx Context, bool Signed)
  24. {
  25. AOpCodeMem Op = (AOpCodeMem)Context.CurrOp;
  26. Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
  27. EmitLoadAddress(Context);
  28. if (Signed && Op.Extend64)
  29. {
  30. EmitReadSx64Call(Context, Op.Size);
  31. }
  32. else if (Signed)
  33. {
  34. EmitReadSx32Call(Context, Op.Size);
  35. }
  36. else
  37. {
  38. EmitReadZxCall(Context, Op.Size);
  39. }
  40. if (Op is IAOpCodeSimd)
  41. {
  42. Context.EmitStvec(Op.Rt);
  43. }
  44. else
  45. {
  46. Context.EmitStintzr(Op.Rt);
  47. }
  48. EmitWBackIfNeeded(Context);
  49. }
  50. public static void LdrLit(AILEmitterCtx Context)
  51. {
  52. IAOpCodeLit Op = (IAOpCodeLit)Context.CurrOp;
  53. if (Op.Prefetch)
  54. {
  55. return;
  56. }
  57. Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
  58. Context.EmitLdc_I8(Op.Imm);
  59. if (Op.Signed)
  60. {
  61. EmitReadSx64Call(Context, Op.Size);
  62. }
  63. else
  64. {
  65. EmitReadZxCall(Context, Op.Size);
  66. }
  67. if (Op is IAOpCodeSimd)
  68. {
  69. Context.EmitStvec(Op.Rt);
  70. }
  71. else
  72. {
  73. Context.EmitStint(Op.Rt);
  74. }
  75. }
  76. public static void Ldp(AILEmitterCtx Context)
  77. {
  78. AOpCodeMemPair Op = (AOpCodeMemPair)Context.CurrOp;
  79. void EmitReadAndStore(int Rt)
  80. {
  81. if (Op.Extend64)
  82. {
  83. EmitReadSx64Call(Context, Op.Size);
  84. }
  85. else
  86. {
  87. EmitReadZxCall(Context, Op.Size);
  88. }
  89. if (Op is IAOpCodeSimd)
  90. {
  91. Context.EmitStvec(Rt);
  92. }
  93. else
  94. {
  95. Context.EmitStintzr(Rt);
  96. }
  97. }
  98. Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
  99. EmitLoadAddress(Context);
  100. EmitReadAndStore(Op.Rt);
  101. Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
  102. Context.EmitLdtmp();
  103. Context.EmitLdc_I8(1 << Op.Size);
  104. Context.Emit(OpCodes.Add);
  105. EmitReadAndStore(Op.Rt2);
  106. EmitWBackIfNeeded(Context);
  107. }
  108. public static void Str(AILEmitterCtx Context)
  109. {
  110. AOpCodeMem Op = (AOpCodeMem)Context.CurrOp;
  111. Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
  112. EmitLoadAddress(Context);
  113. if (Op is IAOpCodeSimd)
  114. {
  115. Context.EmitLdvec(Op.Rt);
  116. }
  117. else
  118. {
  119. Context.EmitLdintzr(Op.Rt);
  120. }
  121. EmitWriteCall(Context, Op.Size);
  122. EmitWBackIfNeeded(Context);
  123. }
  124. public static void Stp(AILEmitterCtx Context)
  125. {
  126. AOpCodeMemPair Op = (AOpCodeMemPair)Context.CurrOp;
  127. Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
  128. EmitLoadAddress(Context);
  129. if (Op is IAOpCodeSimd)
  130. {
  131. Context.EmitLdvec(Op.Rt);
  132. }
  133. else
  134. {
  135. Context.EmitLdintzr(Op.Rt);
  136. }
  137. EmitWriteCall(Context, Op.Size);
  138. Context.EmitLdarg(ATranslatedSub.MemoryArgIdx);
  139. Context.EmitLdtmp();
  140. Context.EmitLdc_I8(1 << Op.Size);
  141. Context.Emit(OpCodes.Add);
  142. if (Op is IAOpCodeSimd)
  143. {
  144. Context.EmitLdvec(Op.Rt2);
  145. }
  146. else
  147. {
  148. Context.EmitLdintzr(Op.Rt2);
  149. }
  150. EmitWriteCall(Context, Op.Size);
  151. EmitWBackIfNeeded(Context);
  152. }
  153. private static void EmitLoadAddress(AILEmitterCtx Context)
  154. {
  155. switch (Context.CurrOp)
  156. {
  157. case AOpCodeMemImm Op:
  158. Context.EmitLdint(Op.Rn);
  159. if (!Op.PostIdx)
  160. {
  161. //Pre-indexing.
  162. Context.EmitLdc_I(Op.Imm);
  163. Context.Emit(OpCodes.Add);
  164. }
  165. break;
  166. case AOpCodeMemReg Op:
  167. Context.EmitLdint(Op.Rn);
  168. Context.EmitLdintzr(Op.Rm);
  169. Context.EmitCast(Op.IntType);
  170. if (Op.Shift)
  171. {
  172. Context.EmitLsl(Op.Size);
  173. }
  174. Context.Emit(OpCodes.Add);
  175. break;
  176. }
  177. //Save address to Scratch var since the register value may change.
  178. Context.Emit(OpCodes.Dup);
  179. Context.EmitSttmp();
  180. }
  181. private static void EmitWBackIfNeeded(AILEmitterCtx Context)
  182. {
  183. //Check whenever the current OpCode has post-indexed write back, if so write it.
  184. //Note: AOpCodeMemPair inherits from AOpCodeMemImm, so this works for both.
  185. if (Context.CurrOp is AOpCodeMemImm Op && Op.WBack)
  186. {
  187. Context.EmitLdtmp();
  188. if (Op.PostIdx)
  189. {
  190. Context.EmitLdc_I(Op.Imm);
  191. Context.Emit(OpCodes.Add);
  192. }
  193. Context.EmitStint(Op.Rn);
  194. }
  195. }
  196. }
  197. }