Translator.cs 8.9 KB

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  1. using Ryujinx.Graphics.Shader.CodeGen.Glsl;
  2. using Ryujinx.Graphics.Shader.Decoders;
  3. using Ryujinx.Graphics.Shader.IntermediateRepresentation;
  4. using Ryujinx.Graphics.Shader.StructuredIr;
  5. using Ryujinx.Graphics.Shader.Translation.Optimizations;
  6. using System.Collections.Generic;
  7. using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
  8. namespace Ryujinx.Graphics.Shader.Translation
  9. {
  10. public static class Translator
  11. {
  12. private const int HeaderSize = 0x50;
  13. internal struct FunctionCode
  14. {
  15. public Operation[] Code { get; }
  16. public FunctionCode(Operation[] code)
  17. {
  18. Code = code;
  19. }
  20. }
  21. public static TranslatorContext CreateContext(
  22. ulong address,
  23. IGpuAccessor gpuAccessor,
  24. TranslationFlags flags,
  25. TranslationCounts counts = null)
  26. {
  27. counts ??= new TranslationCounts();
  28. Block[][] cfg = DecodeShader(address, gpuAccessor, flags, counts, out ShaderConfig config);
  29. return new TranslatorContext(address, cfg, config);
  30. }
  31. internal static ShaderProgram Translate(FunctionCode[] functions, ShaderConfig config, out ShaderProgramInfo shaderProgramInfo)
  32. {
  33. var cfgs = new ControlFlowGraph[functions.Length];
  34. var frus = new RegisterUsage.FunctionRegisterUsage[functions.Length];
  35. for (int i = 0; i < functions.Length; i++)
  36. {
  37. cfgs[i] = ControlFlowGraph.Create(functions[i].Code);
  38. if (i != 0)
  39. {
  40. frus[i] = RegisterUsage.RunPass(cfgs[i]);
  41. }
  42. }
  43. Function[] funcs = new Function[functions.Length];
  44. for (int i = 0; i < functions.Length; i++)
  45. {
  46. var cfg = cfgs[i];
  47. int inArgumentsCount = 0;
  48. int outArgumentsCount = 0;
  49. if (i != 0)
  50. {
  51. var fru = frus[i];
  52. inArgumentsCount = fru.InArguments.Length;
  53. outArgumentsCount = fru.OutArguments.Length;
  54. }
  55. if (cfg.Blocks.Length != 0)
  56. {
  57. RegisterUsage.FixupCalls(cfg.Blocks, frus);
  58. Dominance.FindDominators(cfg);
  59. Dominance.FindDominanceFrontiers(cfg.Blocks);
  60. Ssa.Rename(cfg.Blocks);
  61. Optimizer.RunPass(cfg.Blocks, config);
  62. Rewriter.RunPass(cfg.Blocks, config);
  63. }
  64. funcs[i] = new Function(cfg.Blocks, $"fun{i}", false, inArgumentsCount, outArgumentsCount);
  65. }
  66. StructuredProgramInfo sInfo = StructuredProgram.MakeStructuredProgram(funcs, config);
  67. string glslCode = GlslGenerator.Generate(sInfo, config);
  68. shaderProgramInfo = new ShaderProgramInfo(
  69. config.GetConstantBufferDescriptors(),
  70. config.GetStorageBufferDescriptors(),
  71. config.GetTextureDescriptors(),
  72. config.GetImageDescriptors(),
  73. config.UsedFeatures.HasFlag(FeatureFlags.InstanceId),
  74. config.ClipDistancesWritten);
  75. return new ShaderProgram(config.Stage, glslCode);
  76. }
  77. private static Block[][] DecodeShader(
  78. ulong address,
  79. IGpuAccessor gpuAccessor,
  80. TranslationFlags flags,
  81. TranslationCounts counts,
  82. out ShaderConfig config)
  83. {
  84. Block[][] cfg;
  85. ulong maxEndAddress = 0;
  86. bool hasBindless;
  87. if ((flags & TranslationFlags.Compute) != 0)
  88. {
  89. config = new ShaderConfig(gpuAccessor, flags, counts);
  90. cfg = Decoder.Decode(gpuAccessor, address, out hasBindless);
  91. }
  92. else
  93. {
  94. config = new ShaderConfig(new ShaderHeader(gpuAccessor, address), gpuAccessor, flags, counts);
  95. cfg = Decoder.Decode(gpuAccessor, address + HeaderSize, out hasBindless);
  96. }
  97. if (hasBindless)
  98. {
  99. config.SetUsedFeature(FeatureFlags.Bindless);
  100. }
  101. for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
  102. {
  103. for (int blkIndex = 0; blkIndex < cfg[funcIndex].Length; blkIndex++)
  104. {
  105. Block block = cfg[funcIndex][blkIndex];
  106. if (maxEndAddress < block.EndAddress)
  107. {
  108. maxEndAddress = block.EndAddress;
  109. }
  110. if (!hasBindless)
  111. {
  112. for (int index = 0; index < block.OpCodes.Count; index++)
  113. {
  114. if (block.OpCodes[index] is OpCodeTextureBase texture)
  115. {
  116. config.TextureHandlesForCache.Add(texture.HandleOffset);
  117. }
  118. }
  119. }
  120. }
  121. }
  122. config.SizeAdd((int)maxEndAddress + (flags.HasFlag(TranslationFlags.Compute) ? 0 : HeaderSize));
  123. return cfg;
  124. }
  125. internal static FunctionCode[] EmitShader(Block[][] cfg, ShaderConfig config)
  126. {
  127. Dictionary<ulong, int> funcIds = new Dictionary<ulong, int>();
  128. for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
  129. {
  130. funcIds.Add(cfg[funcIndex][0].Address, funcIndex);
  131. }
  132. List<FunctionCode> funcs = new List<FunctionCode>();
  133. for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
  134. {
  135. EmitterContext context = new EmitterContext(config, funcIndex != 0, funcIds);
  136. for (int blkIndex = 0; blkIndex < cfg[funcIndex].Length; blkIndex++)
  137. {
  138. Block block = cfg[funcIndex][blkIndex];
  139. context.CurrBlock = block;
  140. context.MarkLabel(context.GetLabel(block.Address));
  141. EmitOps(context, block);
  142. }
  143. funcs.Add(new FunctionCode(context.GetOperations()));
  144. }
  145. return funcs.ToArray();
  146. }
  147. private static void EmitOps(EmitterContext context, Block block)
  148. {
  149. for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++)
  150. {
  151. OpCode op = block.OpCodes[opIndex];
  152. if ((context.Config.Flags & TranslationFlags.DebugMode) != 0)
  153. {
  154. string instName;
  155. if (op.Emitter != null)
  156. {
  157. instName = op.Emitter.Method.Name;
  158. }
  159. else
  160. {
  161. instName = "???";
  162. context.Config.GpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16}).");
  163. }
  164. string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
  165. context.Add(new CommentNode(dbgComment));
  166. }
  167. if (op.NeverExecute)
  168. {
  169. continue;
  170. }
  171. Operand predSkipLbl = null;
  172. bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget;
  173. if (op is OpCodeBranchPop opBranchPop)
  174. {
  175. // If the instruction is a SYNC or BRK instruction with only one
  176. // possible target address, then the instruction is basically
  177. // just a simple branch, we can generate code similar to branch
  178. // instructions, with the condition check on the branch itself.
  179. skipPredicateCheck = opBranchPop.Targets.Count < 2;
  180. }
  181. if (!(op.Predicate.IsPT || skipPredicateCheck))
  182. {
  183. Operand label;
  184. if (opIndex == block.OpCodes.Count - 1 && block.Next != null)
  185. {
  186. label = context.GetLabel(block.Next.Address);
  187. }
  188. else
  189. {
  190. label = Label();
  191. predSkipLbl = label;
  192. }
  193. Operand pred = Register(op.Predicate);
  194. if (op.InvertPredicate)
  195. {
  196. context.BranchIfTrue(label, pred);
  197. }
  198. else
  199. {
  200. context.BranchIfFalse(label, pred);
  201. }
  202. }
  203. context.CurrOp = op;
  204. op.Emitter?.Invoke(context);
  205. if (predSkipLbl != null)
  206. {
  207. context.MarkLabel(predSkipLbl);
  208. }
  209. }
  210. }
  211. }
  212. }