AInstEmitSimdHelper.cs 42 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356
  1. using ChocolArm64.Decoder;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection;
  6. using System.Reflection.Emit;
  7. using System.Runtime.CompilerServices;
  8. using System.Runtime.Intrinsics;
  9. using System.Runtime.Intrinsics.X86;
  10. namespace ChocolArm64.Instruction
  11. {
  12. static class AInstEmitSimdHelper
  13. {
  14. [Flags]
  15. public enum OperFlags
  16. {
  17. Rd = 1 << 0,
  18. Rn = 1 << 1,
  19. Rm = 1 << 2,
  20. Ra = 1 << 3,
  21. RnRm = Rn | Rm,
  22. RdRn = Rd | Rn,
  23. RaRnRm = Ra | Rn | Rm,
  24. RdRnRm = Rd | Rn | Rm
  25. }
  26. public static int GetImmShl(AOpCodeSimdShImm Op)
  27. {
  28. return Op.Imm - (8 << Op.Size);
  29. }
  30. public static int GetImmShr(AOpCodeSimdShImm Op)
  31. {
  32. return (8 << (Op.Size + 1)) - Op.Imm;
  33. }
  34. [MethodImpl(MethodImplOptions.AggressiveInlining)]
  35. public static void EmitSse2Call(AILEmitterCtx Context, string Name)
  36. {
  37. EmitSseCall(Context, Name, typeof(Sse2));
  38. }
  39. [MethodImpl(MethodImplOptions.AggressiveInlining)]
  40. public static void EmitSse41Call(AILEmitterCtx Context, string Name)
  41. {
  42. EmitSseCall(Context, Name, typeof(Sse41));
  43. }
  44. [MethodImpl(MethodImplOptions.AggressiveInlining)]
  45. public static void EmitSse42Call(AILEmitterCtx Context, string Name)
  46. {
  47. EmitSseCall(Context, Name, typeof(Sse42));
  48. }
  49. private static void EmitSseCall(AILEmitterCtx Context, string Name, Type Type)
  50. {
  51. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  52. void Ldvec(int Reg)
  53. {
  54. Context.EmitLdvec(Reg);
  55. switch (Op.Size)
  56. {
  57. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToSByte)); break;
  58. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt16)); break;
  59. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt32)); break;
  60. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt64)); break;
  61. }
  62. }
  63. Ldvec(Op.Rn);
  64. Type BaseType = null;
  65. switch (Op.Size)
  66. {
  67. case 0: BaseType = typeof(Vector128<sbyte>); break;
  68. case 1: BaseType = typeof(Vector128<short>); break;
  69. case 2: BaseType = typeof(Vector128<int>); break;
  70. case 3: BaseType = typeof(Vector128<long>); break;
  71. }
  72. if (Op is AOpCodeSimdReg BinOp)
  73. {
  74. Ldvec(BinOp.Rm);
  75. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType, BaseType }));
  76. }
  77. else
  78. {
  79. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType }));
  80. }
  81. switch (Op.Size)
  82. {
  83. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSByteToSingle)); break;
  84. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt16ToSingle)); break;
  85. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt32ToSingle)); break;
  86. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt64ToSingle)); break;
  87. }
  88. Context.EmitStvec(Op.Rd);
  89. if (Op.RegisterSize == ARegisterSize.SIMD64)
  90. {
  91. EmitVectorZeroUpper(Context, Op.Rd);
  92. }
  93. }
  94. public static void EmitScalarSseOrSse2CallF(AILEmitterCtx Context, string Name)
  95. {
  96. EmitSseOrSse2CallF(Context, Name, true);
  97. }
  98. public static void EmitVectorSseOrSse2CallF(AILEmitterCtx Context, string Name)
  99. {
  100. EmitSseOrSse2CallF(Context, Name, false);
  101. }
  102. public static void EmitSseOrSse2CallF(AILEmitterCtx Context, string Name, bool Scalar)
  103. {
  104. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  105. int SizeF = Op.Size & 1;
  106. void Ldvec(int Reg)
  107. {
  108. Context.EmitLdvec(Reg);
  109. if (SizeF == 1)
  110. {
  111. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToDouble));
  112. }
  113. }
  114. Ldvec(Op.Rn);
  115. Type Type;
  116. Type BaseType;
  117. if (SizeF == 0)
  118. {
  119. Type = typeof(Sse);
  120. BaseType = typeof(Vector128<float>);
  121. }
  122. else /* if (SizeF == 1) */
  123. {
  124. Type = typeof(Sse2);
  125. BaseType = typeof(Vector128<double>);
  126. }
  127. if (Op is AOpCodeSimdReg BinOp)
  128. {
  129. Ldvec(BinOp.Rm);
  130. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType, BaseType }));
  131. }
  132. else
  133. {
  134. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType }));
  135. }
  136. if (SizeF == 1)
  137. {
  138. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorDoubleToSingle));
  139. }
  140. Context.EmitStvec(Op.Rd);
  141. if (Scalar)
  142. {
  143. if (SizeF == 0)
  144. {
  145. EmitVectorZero32_128(Context, Op.Rd);
  146. }
  147. else /* if (SizeF == 1) */
  148. {
  149. EmitVectorZeroUpper(Context, Op.Rd);
  150. }
  151. }
  152. else if (Op.RegisterSize == ARegisterSize.SIMD64)
  153. {
  154. EmitVectorZeroUpper(Context, Op.Rd);
  155. }
  156. }
  157. public static void EmitUnaryMathCall(AILEmitterCtx Context, string Name)
  158. {
  159. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  160. int SizeF = Op.Size & 1;
  161. MethodInfo MthdInfo;
  162. if (SizeF == 0)
  163. {
  164. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float) });
  165. }
  166. else /* if (SizeF == 1) */
  167. {
  168. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double) });
  169. }
  170. Context.EmitCall(MthdInfo);
  171. }
  172. public static void EmitBinaryMathCall(AILEmitterCtx Context, string Name)
  173. {
  174. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  175. int SizeF = Op.Size & 1;
  176. MethodInfo MthdInfo;
  177. if (SizeF == 0)
  178. {
  179. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float), typeof(float) });
  180. }
  181. else /* if (SizeF == 1) */
  182. {
  183. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double), typeof(double) });
  184. }
  185. Context.EmitCall(MthdInfo);
  186. }
  187. public static void EmitRoundMathCall(AILEmitterCtx Context, MidpointRounding RoundMode)
  188. {
  189. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  190. int SizeF = Op.Size & 1;
  191. Context.EmitLdc_I4((int)RoundMode);
  192. MethodInfo MthdInfo;
  193. Type[] Types = new Type[] { null, typeof(MidpointRounding) };
  194. Types[0] = SizeF == 0
  195. ? typeof(float)
  196. : typeof(double);
  197. if (SizeF == 0)
  198. {
  199. MthdInfo = typeof(MathF).GetMethod(nameof(MathF.Round), Types);
  200. }
  201. else /* if (SizeF == 1) */
  202. {
  203. MthdInfo = typeof(Math).GetMethod(nameof(Math.Round), Types);
  204. }
  205. Context.EmitCall(MthdInfo);
  206. }
  207. public static void EmitUnarySoftFloatCall(AILEmitterCtx Context, string Name)
  208. {
  209. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  210. int SizeF = Op.Size & 1;
  211. MethodInfo MthdInfo;
  212. if (SizeF == 0)
  213. {
  214. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(float) });
  215. }
  216. else /* if (SizeF == 1) */
  217. {
  218. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(double) });
  219. }
  220. Context.EmitCall(MthdInfo);
  221. }
  222. public static void EmitBinarySoftFloatCall(AILEmitterCtx Context, string Name)
  223. {
  224. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  225. int SizeF = Op.Size & 1;
  226. MethodInfo MthdInfo;
  227. if (SizeF == 0)
  228. {
  229. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(float), typeof(float) });
  230. }
  231. else /* if (SizeF == 1) */
  232. {
  233. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(double), typeof(double) });
  234. }
  235. Context.EmitCall(MthdInfo);
  236. }
  237. public static void EmitScalarBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
  238. {
  239. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  240. EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: false);
  241. }
  242. public static void EmitScalarTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
  243. {
  244. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  245. EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: true);
  246. }
  247. public static void EmitScalarOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
  248. {
  249. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  250. int SizeF = Op.Size & 1;
  251. if (Ternary)
  252. {
  253. EmitVectorExtractF(Context, Op.Rd, 0, SizeF);
  254. }
  255. EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
  256. EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
  257. Emit();
  258. EmitScalarSetF(Context, Op.Rd, SizeF);
  259. }
  260. public static void EmitScalarUnaryOpSx(AILEmitterCtx Context, Action Emit)
  261. {
  262. EmitScalarOp(Context, Emit, OperFlags.Rn, true);
  263. }
  264. public static void EmitScalarBinaryOpSx(AILEmitterCtx Context, Action Emit)
  265. {
  266. EmitScalarOp(Context, Emit, OperFlags.RnRm, true);
  267. }
  268. public static void EmitScalarUnaryOpZx(AILEmitterCtx Context, Action Emit)
  269. {
  270. EmitScalarOp(Context, Emit, OperFlags.Rn, false);
  271. }
  272. public static void EmitScalarBinaryOpZx(AILEmitterCtx Context, Action Emit)
  273. {
  274. EmitScalarOp(Context, Emit, OperFlags.RnRm, false);
  275. }
  276. public static void EmitScalarTernaryOpZx(AILEmitterCtx Context, Action Emit)
  277. {
  278. EmitScalarOp(Context, Emit, OperFlags.RdRnRm, false);
  279. }
  280. public static void EmitScalarOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  281. {
  282. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  283. bool Rd = (Opers & OperFlags.Rd) != 0;
  284. bool Rn = (Opers & OperFlags.Rn) != 0;
  285. bool Rm = (Opers & OperFlags.Rm) != 0;
  286. if (Rd)
  287. {
  288. EmitVectorExtract(Context, Op.Rd, 0, Op.Size, Signed);
  289. }
  290. if (Rn)
  291. {
  292. EmitVectorExtract(Context, Op.Rn, 0, Op.Size, Signed);
  293. }
  294. if (Rm)
  295. {
  296. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, 0, Op.Size, Signed);
  297. }
  298. Emit();
  299. EmitScalarSet(Context, Op.Rd, Op.Size);
  300. }
  301. public static void EmitScalarUnaryOpF(AILEmitterCtx Context, Action Emit)
  302. {
  303. EmitScalarOpF(Context, Emit, OperFlags.Rn);
  304. }
  305. public static void EmitScalarBinaryOpF(AILEmitterCtx Context, Action Emit)
  306. {
  307. EmitScalarOpF(Context, Emit, OperFlags.RnRm);
  308. }
  309. public static void EmitScalarTernaryRaOpF(AILEmitterCtx Context, Action Emit)
  310. {
  311. EmitScalarOpF(Context, Emit, OperFlags.RaRnRm);
  312. }
  313. public static void EmitScalarOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  314. {
  315. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  316. int SizeF = Op.Size & 1;
  317. bool Ra = (Opers & OperFlags.Ra) != 0;
  318. bool Rn = (Opers & OperFlags.Rn) != 0;
  319. bool Rm = (Opers & OperFlags.Rm) != 0;
  320. if (Ra)
  321. {
  322. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Ra, 0, SizeF);
  323. }
  324. if (Rn)
  325. {
  326. EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
  327. }
  328. if (Rm)
  329. {
  330. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Rm, 0, SizeF);
  331. }
  332. Emit();
  333. EmitScalarSetF(Context, Op.Rd, SizeF);
  334. }
  335. public static void EmitVectorUnaryOpF(AILEmitterCtx Context, Action Emit)
  336. {
  337. EmitVectorOpF(Context, Emit, OperFlags.Rn);
  338. }
  339. public static void EmitVectorBinaryOpF(AILEmitterCtx Context, Action Emit)
  340. {
  341. EmitVectorOpF(Context, Emit, OperFlags.RnRm);
  342. }
  343. public static void EmitVectorTernaryOpF(AILEmitterCtx Context, Action Emit)
  344. {
  345. EmitVectorOpF(Context, Emit, OperFlags.RdRnRm);
  346. }
  347. public static void EmitVectorOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  348. {
  349. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  350. int SizeF = Op.Size & 1;
  351. int Bytes = Op.GetBitsCount() >> 3;
  352. int Elems = Bytes >> SizeF + 2;
  353. bool Rd = (Opers & OperFlags.Rd) != 0;
  354. bool Rn = (Opers & OperFlags.Rn) != 0;
  355. bool Rm = (Opers & OperFlags.Rm) != 0;
  356. for (int Index = 0; Index < Elems; Index++)
  357. {
  358. if (Rd)
  359. {
  360. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  361. }
  362. if (Rn)
  363. {
  364. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  365. }
  366. if (Rm)
  367. {
  368. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Rm, Index, SizeF);
  369. }
  370. Emit();
  371. EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
  372. }
  373. if (Op.RegisterSize == ARegisterSize.SIMD64)
  374. {
  375. EmitVectorZeroUpper(Context, Op.Rd);
  376. }
  377. }
  378. public static void EmitVectorBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
  379. {
  380. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  381. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: false);
  382. }
  383. public static void EmitVectorTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
  384. {
  385. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  386. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: true);
  387. }
  388. public static void EmitVectorOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
  389. {
  390. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  391. int SizeF = Op.Size & 1;
  392. int Bytes = Op.GetBitsCount() >> 3;
  393. int Elems = Bytes >> SizeF + 2;
  394. for (int Index = 0; Index < Elems; Index++)
  395. {
  396. if (Ternary)
  397. {
  398. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  399. }
  400. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  401. EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
  402. Emit();
  403. EmitVectorInsertTmpF(Context, Index, SizeF);
  404. }
  405. Context.EmitLdvectmp();
  406. Context.EmitStvec(Op.Rd);
  407. if (Op.RegisterSize == ARegisterSize.SIMD64)
  408. {
  409. EmitVectorZeroUpper(Context, Op.Rd);
  410. }
  411. }
  412. public static void EmitVectorUnaryOpSx(AILEmitterCtx Context, Action Emit)
  413. {
  414. EmitVectorOp(Context, Emit, OperFlags.Rn, true);
  415. }
  416. public static void EmitVectorBinaryOpSx(AILEmitterCtx Context, Action Emit)
  417. {
  418. EmitVectorOp(Context, Emit, OperFlags.RnRm, true);
  419. }
  420. public static void EmitVectorTernaryOpSx(AILEmitterCtx Context, Action Emit)
  421. {
  422. EmitVectorOp(Context, Emit, OperFlags.RdRnRm, true);
  423. }
  424. public static void EmitVectorUnaryOpZx(AILEmitterCtx Context, Action Emit)
  425. {
  426. EmitVectorOp(Context, Emit, OperFlags.Rn, false);
  427. }
  428. public static void EmitVectorBinaryOpZx(AILEmitterCtx Context, Action Emit)
  429. {
  430. EmitVectorOp(Context, Emit, OperFlags.RnRm, false);
  431. }
  432. public static void EmitVectorTernaryOpZx(AILEmitterCtx Context, Action Emit)
  433. {
  434. EmitVectorOp(Context, Emit, OperFlags.RdRnRm, false);
  435. }
  436. public static void EmitVectorOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  437. {
  438. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  439. int Bytes = Op.GetBitsCount() >> 3;
  440. int Elems = Bytes >> Op.Size;
  441. bool Rd = (Opers & OperFlags.Rd) != 0;
  442. bool Rn = (Opers & OperFlags.Rn) != 0;
  443. bool Rm = (Opers & OperFlags.Rm) != 0;
  444. for (int Index = 0; Index < Elems; Index++)
  445. {
  446. if (Rd)
  447. {
  448. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  449. }
  450. if (Rn)
  451. {
  452. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  453. }
  454. if (Rm)
  455. {
  456. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  457. }
  458. Emit();
  459. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  460. }
  461. if (Op.RegisterSize == ARegisterSize.SIMD64)
  462. {
  463. EmitVectorZeroUpper(Context, Op.Rd);
  464. }
  465. }
  466. public static void EmitVectorBinaryOpByElemSx(AILEmitterCtx Context, Action Emit)
  467. {
  468. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  469. EmitVectorOpByElem(Context, Emit, Op.Index, false, true);
  470. }
  471. public static void EmitVectorBinaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  472. {
  473. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  474. EmitVectorOpByElem(Context, Emit, Op.Index, false, false);
  475. }
  476. public static void EmitVectorTernaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  477. {
  478. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  479. EmitVectorOpByElem(Context, Emit, Op.Index, true, false);
  480. }
  481. public static void EmitVectorOpByElem(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary, bool Signed)
  482. {
  483. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  484. int Bytes = Op.GetBitsCount() >> 3;
  485. int Elems = Bytes >> Op.Size;
  486. EmitVectorExtract(Context, Op.Rm, Elem, Op.Size, Signed);
  487. Context.EmitSttmp();
  488. for (int Index = 0; Index < Elems; Index++)
  489. {
  490. if (Ternary)
  491. {
  492. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  493. }
  494. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  495. Context.EmitLdtmp();
  496. Emit();
  497. EmitVectorInsertTmp(Context, Index, Op.Size);
  498. }
  499. Context.EmitLdvectmp();
  500. Context.EmitStvec(Op.Rd);
  501. if (Op.RegisterSize == ARegisterSize.SIMD64)
  502. {
  503. EmitVectorZeroUpper(Context, Op.Rd);
  504. }
  505. }
  506. public static void EmitVectorImmUnaryOp(AILEmitterCtx Context, Action Emit)
  507. {
  508. EmitVectorImmOp(Context, Emit, false);
  509. }
  510. public static void EmitVectorImmBinaryOp(AILEmitterCtx Context, Action Emit)
  511. {
  512. EmitVectorImmOp(Context, Emit, true);
  513. }
  514. public static void EmitVectorImmOp(AILEmitterCtx Context, Action Emit, bool Binary)
  515. {
  516. AOpCodeSimdImm Op = (AOpCodeSimdImm)Context.CurrOp;
  517. int Bytes = Op.GetBitsCount() >> 3;
  518. int Elems = Bytes >> Op.Size;
  519. for (int Index = 0; Index < Elems; Index++)
  520. {
  521. if (Binary)
  522. {
  523. EmitVectorExtractZx(Context, Op.Rd, Index, Op.Size);
  524. }
  525. Context.EmitLdc_I8(Op.Imm);
  526. Emit();
  527. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  528. }
  529. if (Op.RegisterSize == ARegisterSize.SIMD64)
  530. {
  531. EmitVectorZeroUpper(Context, Op.Rd);
  532. }
  533. }
  534. public static void EmitVectorWidenRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  535. {
  536. EmitVectorWidenRmBinaryOp(Context, Emit, true);
  537. }
  538. public static void EmitVectorWidenRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  539. {
  540. EmitVectorWidenRmBinaryOp(Context, Emit, false);
  541. }
  542. public static void EmitVectorWidenRmBinaryOp(AILEmitterCtx Context, Action Emit, bool Signed)
  543. {
  544. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  545. int Elems = 8 >> Op.Size;
  546. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  547. for (int Index = 0; Index < Elems; Index++)
  548. {
  549. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, Signed);
  550. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  551. Emit();
  552. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  553. }
  554. Context.EmitLdvectmp();
  555. Context.EmitStvec(Op.Rd);
  556. }
  557. public static void EmitVectorWidenRnRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  558. {
  559. EmitVectorWidenRnRmOp(Context, Emit, false, true);
  560. }
  561. public static void EmitVectorWidenRnRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  562. {
  563. EmitVectorWidenRnRmOp(Context, Emit, false, false);
  564. }
  565. public static void EmitVectorWidenRnRmTernaryOpSx(AILEmitterCtx Context, Action Emit)
  566. {
  567. EmitVectorWidenRnRmOp(Context, Emit, true, true);
  568. }
  569. public static void EmitVectorWidenRnRmTernaryOpZx(AILEmitterCtx Context, Action Emit)
  570. {
  571. EmitVectorWidenRnRmOp(Context, Emit, true, false);
  572. }
  573. public static void EmitVectorWidenRnRmOp(AILEmitterCtx Context, Action Emit, bool Ternary, bool Signed)
  574. {
  575. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  576. int Elems = 8 >> Op.Size;
  577. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  578. for (int Index = 0; Index < Elems; Index++)
  579. {
  580. if (Ternary)
  581. {
  582. EmitVectorExtract(Context, Op.Rd, Index, Op.Size + 1, Signed);
  583. }
  584. EmitVectorExtract(Context, Op.Rn, Part + Index, Op.Size, Signed);
  585. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  586. Emit();
  587. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  588. }
  589. Context.EmitLdvectmp();
  590. Context.EmitStvec(Op.Rd);
  591. }
  592. public static void EmitVectorPairwiseOpSx(AILEmitterCtx Context, Action Emit)
  593. {
  594. EmitVectorPairwiseOp(Context, Emit, true);
  595. }
  596. public static void EmitVectorPairwiseOpZx(AILEmitterCtx Context, Action Emit)
  597. {
  598. EmitVectorPairwiseOp(Context, Emit, false);
  599. }
  600. public static void EmitVectorPairwiseOp(AILEmitterCtx Context, Action Emit, bool Signed)
  601. {
  602. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  603. int Words = Op.GetBitsCount() >> 4;
  604. int Pairs = Words >> Op.Size;
  605. for (int Index = 0; Index < Pairs; Index++)
  606. {
  607. int Idx = Index << 1;
  608. EmitVectorExtract(Context, Op.Rn, Idx, Op.Size, Signed);
  609. EmitVectorExtract(Context, Op.Rn, Idx + 1, Op.Size, Signed);
  610. Emit();
  611. EmitVectorExtract(Context, Op.Rm, Idx, Op.Size, Signed);
  612. EmitVectorExtract(Context, Op.Rm, Idx + 1, Op.Size, Signed);
  613. Emit();
  614. EmitVectorInsertTmp(Context, Pairs + Index, Op.Size);
  615. EmitVectorInsertTmp(Context, Index, Op.Size);
  616. }
  617. Context.EmitLdvectmp();
  618. Context.EmitStvec(Op.Rd);
  619. if (Op.RegisterSize == ARegisterSize.SIMD64)
  620. {
  621. EmitVectorZeroUpper(Context, Op.Rd);
  622. }
  623. }
  624. [Flags]
  625. public enum SaturatingFlags
  626. {
  627. Scalar = 1 << 0,
  628. Signed = 1 << 1,
  629. Add = 1 << 2,
  630. Sub = 1 << 3,
  631. Accumulate = 1 << 4,
  632. ScalarSx = Scalar | Signed,
  633. ScalarZx = Scalar,
  634. VectorSx = Signed,
  635. VectorZx = 0
  636. }
  637. public static void EmitScalarSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit)
  638. {
  639. EmitSaturatingUnaryOpSx(Context, Emit, SaturatingFlags.ScalarSx);
  640. }
  641. public static void EmitVectorSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit)
  642. {
  643. EmitSaturatingUnaryOpSx(Context, Emit, SaturatingFlags.VectorSx);
  644. }
  645. public static void EmitSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit, SaturatingFlags Flags)
  646. {
  647. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  648. bool Scalar = (Flags & SaturatingFlags.Scalar) != 0;
  649. int Bytes = Op.GetBitsCount() >> 3;
  650. int Elems = !Scalar ? Bytes >> Op.Size : 1;
  651. if (Scalar)
  652. {
  653. EmitVectorZeroLowerTmp(Context);
  654. }
  655. for (int Index = 0; Index < Elems; Index++)
  656. {
  657. EmitVectorExtractSx(Context, Op.Rn, Index, Op.Size);
  658. Emit();
  659. if (Op.Size <= 2)
  660. {
  661. EmitSatQ(Context, Op.Size, true, true);
  662. }
  663. else /* if (Op.Size == 3) */
  664. {
  665. EmitUnarySignedSatQAbsOrNeg(Context);
  666. }
  667. EmitVectorInsertTmp(Context, Index, Op.Size);
  668. }
  669. Context.EmitLdvectmp();
  670. Context.EmitStvec(Op.Rd);
  671. if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
  672. {
  673. EmitVectorZeroUpper(Context, Op.Rd);
  674. }
  675. }
  676. public static void EmitScalarSaturatingBinaryOpSx(AILEmitterCtx Context, SaturatingFlags Flags)
  677. {
  678. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.ScalarSx | Flags);
  679. }
  680. public static void EmitScalarSaturatingBinaryOpZx(AILEmitterCtx Context, SaturatingFlags Flags)
  681. {
  682. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.ScalarZx | Flags);
  683. }
  684. public static void EmitVectorSaturatingBinaryOpSx(AILEmitterCtx Context, SaturatingFlags Flags)
  685. {
  686. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.VectorSx | Flags);
  687. }
  688. public static void EmitVectorSaturatingBinaryOpZx(AILEmitterCtx Context, SaturatingFlags Flags)
  689. {
  690. EmitSaturatingBinaryOp(Context, () => { }, SaturatingFlags.VectorZx | Flags);
  691. }
  692. public static void EmitSaturatingBinaryOp(AILEmitterCtx Context, Action Emit, SaturatingFlags Flags)
  693. {
  694. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  695. bool Scalar = (Flags & SaturatingFlags.Scalar) != 0;
  696. bool Signed = (Flags & SaturatingFlags.Signed) != 0;
  697. bool Add = (Flags & SaturatingFlags.Add) != 0;
  698. bool Sub = (Flags & SaturatingFlags.Sub) != 0;
  699. bool Accumulate = (Flags & SaturatingFlags.Accumulate) != 0;
  700. int Bytes = Op.GetBitsCount() >> 3;
  701. int Elems = !Scalar ? Bytes >> Op.Size : 1;
  702. if (Scalar)
  703. {
  704. EmitVectorZeroLowerTmp(Context);
  705. }
  706. if (Add || Sub)
  707. {
  708. for (int Index = 0; Index < Elems; Index++)
  709. {
  710. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  711. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  712. if (Op.Size <= 2)
  713. {
  714. Context.Emit(Add ? OpCodes.Add : OpCodes.Sub);
  715. EmitSatQ(Context, Op.Size, true, Signed);
  716. }
  717. else /* if (Op.Size == 3) */
  718. {
  719. if (Add)
  720. {
  721. EmitBinarySatQAdd(Context, Signed);
  722. }
  723. else /* if (Sub) */
  724. {
  725. EmitBinarySatQSub(Context, Signed);
  726. }
  727. }
  728. EmitVectorInsertTmp(Context, Index, Op.Size);
  729. }
  730. }
  731. else if (Accumulate)
  732. {
  733. for (int Index = 0; Index < Elems; Index++)
  734. {
  735. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, !Signed);
  736. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  737. if (Op.Size <= 2)
  738. {
  739. Context.Emit(OpCodes.Add);
  740. EmitSatQ(Context, Op.Size, true, Signed);
  741. }
  742. else /* if (Op.Size == 3) */
  743. {
  744. EmitBinarySatQAccumulate(Context, Signed);
  745. }
  746. EmitVectorInsertTmp(Context, Index, Op.Size);
  747. }
  748. }
  749. else
  750. {
  751. for (int Index = 0; Index < Elems; Index++)
  752. {
  753. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  754. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  755. Emit();
  756. EmitSatQ(Context, Op.Size, true, Signed);
  757. EmitVectorInsertTmp(Context, Index, Op.Size);
  758. }
  759. }
  760. Context.EmitLdvectmp();
  761. Context.EmitStvec(Op.Rd);
  762. if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
  763. {
  764. EmitVectorZeroUpper(Context, Op.Rd);
  765. }
  766. }
  767. [Flags]
  768. public enum SaturatingNarrowFlags
  769. {
  770. Scalar = 1 << 0,
  771. SignedSrc = 1 << 1,
  772. SignedDst = 1 << 2,
  773. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  774. ScalarSxZx = Scalar | SignedSrc,
  775. ScalarZxZx = Scalar,
  776. VectorSxSx = SignedSrc | SignedDst,
  777. VectorSxZx = SignedSrc,
  778. VectorZxZx = 0
  779. }
  780. public static void EmitSaturatingNarrowOp(AILEmitterCtx Context, SaturatingNarrowFlags Flags)
  781. {
  782. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  783. bool Scalar = (Flags & SaturatingNarrowFlags.Scalar) != 0;
  784. bool SignedSrc = (Flags & SaturatingNarrowFlags.SignedSrc) != 0;
  785. bool SignedDst = (Flags & SaturatingNarrowFlags.SignedDst) != 0;
  786. int Elems = !Scalar ? 8 >> Op.Size : 1;
  787. int Part = !Scalar && (Op.RegisterSize == ARegisterSize.SIMD128) ? Elems : 0;
  788. if (Scalar)
  789. {
  790. EmitVectorZeroLowerTmp(Context);
  791. }
  792. if (Part != 0)
  793. {
  794. Context.EmitLdvec(Op.Rd);
  795. Context.EmitStvectmp();
  796. }
  797. for (int Index = 0; Index < Elems; Index++)
  798. {
  799. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, SignedSrc);
  800. EmitSatQ(Context, Op.Size, SignedSrc, SignedDst);
  801. EmitVectorInsertTmp(Context, Part + Index, Op.Size);
  802. }
  803. Context.EmitLdvectmp();
  804. Context.EmitStvec(Op.Rd);
  805. if (Part == 0)
  806. {
  807. EmitVectorZeroUpper(Context, Op.Rd);
  808. }
  809. }
  810. // TSrc (16bit, 32bit, 64bit; signed, unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  811. public static void EmitSatQ(
  812. AILEmitterCtx Context,
  813. int SizeDst,
  814. bool SignedSrc,
  815. bool SignedDst)
  816. {
  817. if (SizeDst > 2)
  818. {
  819. throw new ArgumentOutOfRangeException(nameof(SizeDst));
  820. }
  821. Context.EmitLdc_I4(SizeDst);
  822. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  823. if (SignedSrc)
  824. {
  825. ASoftFallback.EmitCall(Context, SignedDst
  826. ? nameof(ASoftFallback.SignedSrcSignedDstSatQ)
  827. : nameof(ASoftFallback.SignedSrcUnsignedDstSatQ));
  828. }
  829. else
  830. {
  831. ASoftFallback.EmitCall(Context, SignedDst
  832. ? nameof(ASoftFallback.UnsignedSrcSignedDstSatQ)
  833. : nameof(ASoftFallback.UnsignedSrcUnsignedDstSatQ));
  834. }
  835. }
  836. // TSrc (64bit) == TDst (64bit); signed.
  837. public static void EmitUnarySignedSatQAbsOrNeg(AILEmitterCtx Context)
  838. {
  839. if (((AOpCodeSimd)Context.CurrOp).Size < 3)
  840. {
  841. throw new InvalidOperationException();
  842. }
  843. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  844. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.UnarySignedSatQAbsOrNeg));
  845. }
  846. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  847. public static void EmitBinarySatQAdd(AILEmitterCtx Context, bool Signed)
  848. {
  849. if (((AOpCodeSimdReg)Context.CurrOp).Size < 3)
  850. {
  851. throw new InvalidOperationException();
  852. }
  853. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  854. ASoftFallback.EmitCall(Context, Signed
  855. ? nameof(ASoftFallback.BinarySignedSatQAdd)
  856. : nameof(ASoftFallback.BinaryUnsignedSatQAdd));
  857. }
  858. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  859. public static void EmitBinarySatQSub(AILEmitterCtx Context, bool Signed)
  860. {
  861. if (((AOpCodeSimdReg)Context.CurrOp).Size < 3)
  862. {
  863. throw new InvalidOperationException();
  864. }
  865. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  866. ASoftFallback.EmitCall(Context, Signed
  867. ? nameof(ASoftFallback.BinarySignedSatQSub)
  868. : nameof(ASoftFallback.BinaryUnsignedSatQSub));
  869. }
  870. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  871. public static void EmitBinarySatQAccumulate(AILEmitterCtx Context, bool Signed)
  872. {
  873. if (((AOpCodeSimd)Context.CurrOp).Size < 3)
  874. {
  875. throw new InvalidOperationException();
  876. }
  877. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  878. ASoftFallback.EmitCall(Context, Signed
  879. ? nameof(ASoftFallback.BinarySignedSatQAcc)
  880. : nameof(ASoftFallback.BinaryUnsignedSatQAcc));
  881. }
  882. public static void EmitScalarSet(AILEmitterCtx Context, int Reg, int Size)
  883. {
  884. EmitVectorZeroAll(Context, Reg);
  885. EmitVectorInsert(Context, Reg, 0, Size);
  886. }
  887. public static void EmitScalarSetF(AILEmitterCtx Context, int Reg, int Size)
  888. {
  889. EmitVectorZeroAll(Context, Reg);
  890. EmitVectorInsertF(Context, Reg, 0, Size);
  891. }
  892. public static void EmitVectorExtractSx(AILEmitterCtx Context, int Reg, int Index, int Size)
  893. {
  894. EmitVectorExtract(Context, Reg, Index, Size, true);
  895. }
  896. public static void EmitVectorExtractZx(AILEmitterCtx Context, int Reg, int Index, int Size)
  897. {
  898. EmitVectorExtract(Context, Reg, Index, Size, false);
  899. }
  900. public static void EmitVectorExtract(AILEmitterCtx Context, int Reg, int Index, int Size, bool Signed)
  901. {
  902. ThrowIfInvalid(Index, Size);
  903. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  904. Context.EmitLdvec(Reg);
  905. Context.EmitLdc_I4(Index);
  906. Context.EmitLdc_I4(Size);
  907. AVectorHelper.EmitCall(Context, Signed
  908. ? nameof(AVectorHelper.VectorExtractIntSx)
  909. : nameof(AVectorHelper.VectorExtractIntZx));
  910. }
  911. public static void EmitVectorExtractF(AILEmitterCtx Context, int Reg, int Index, int Size)
  912. {
  913. ThrowIfInvalidF(Index, Size);
  914. Context.EmitLdvec(Reg);
  915. Context.EmitLdc_I4(Index);
  916. if (Size == 0)
  917. {
  918. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorExtractSingle));
  919. }
  920. else if (Size == 1)
  921. {
  922. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorExtractDouble));
  923. }
  924. else
  925. {
  926. throw new ArgumentOutOfRangeException(nameof(Size));
  927. }
  928. }
  929. public static void EmitVectorZeroAll(AILEmitterCtx Context, int Rd)
  930. {
  931. EmitVectorZeroLower(Context, Rd);
  932. EmitVectorZeroUpper(Context, Rd);
  933. }
  934. public static void EmitVectorZeroLower(AILEmitterCtx Context, int Rd)
  935. {
  936. EmitVectorInsert(Context, Rd, 0, 3, 0);
  937. }
  938. public static void EmitVectorZeroLowerTmp(AILEmitterCtx Context)
  939. {
  940. EmitVectorInsertTmp(Context, 0, 3, 0);
  941. }
  942. public static void EmitVectorZeroUpper(AILEmitterCtx Context, int Rd)
  943. {
  944. EmitVectorInsert(Context, Rd, 1, 3, 0);
  945. }
  946. public static void EmitVectorZero32_128(AILEmitterCtx Context, int Reg)
  947. {
  948. Context.EmitLdvec(Reg);
  949. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorZero32_128));
  950. Context.EmitStvec(Reg);
  951. }
  952. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size)
  953. {
  954. ThrowIfInvalid(Index, Size);
  955. Context.EmitLdvec(Reg);
  956. Context.EmitLdc_I4(Index);
  957. Context.EmitLdc_I4(Size);
  958. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  959. Context.EmitStvec(Reg);
  960. }
  961. public static void EmitVectorInsertTmp(AILEmitterCtx Context, int Index, int Size)
  962. {
  963. ThrowIfInvalid(Index, Size);
  964. Context.EmitLdvectmp();
  965. Context.EmitLdc_I4(Index);
  966. Context.EmitLdc_I4(Size);
  967. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  968. Context.EmitStvectmp();
  969. }
  970. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size, long Value)
  971. {
  972. ThrowIfInvalid(Index, Size);
  973. Context.EmitLdc_I8(Value);
  974. Context.EmitLdvec(Reg);
  975. Context.EmitLdc_I4(Index);
  976. Context.EmitLdc_I4(Size);
  977. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  978. Context.EmitStvec(Reg);
  979. }
  980. public static void EmitVectorInsertTmp(AILEmitterCtx Context, int Index, int Size, long Value)
  981. {
  982. ThrowIfInvalid(Index, Size);
  983. Context.EmitLdc_I8(Value);
  984. Context.EmitLdvectmp();
  985. Context.EmitLdc_I4(Index);
  986. Context.EmitLdc_I4(Size);
  987. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  988. Context.EmitStvectmp();
  989. }
  990. public static void EmitVectorInsertF(AILEmitterCtx Context, int Reg, int Index, int Size)
  991. {
  992. ThrowIfInvalidF(Index, Size);
  993. Context.EmitLdvec(Reg);
  994. Context.EmitLdc_I4(Index);
  995. if (Size == 0)
  996. {
  997. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertSingle));
  998. }
  999. else if (Size == 1)
  1000. {
  1001. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertDouble));
  1002. }
  1003. else
  1004. {
  1005. throw new ArgumentOutOfRangeException(nameof(Size));
  1006. }
  1007. Context.EmitStvec(Reg);
  1008. }
  1009. public static void EmitVectorInsertTmpF(AILEmitterCtx Context, int Index, int Size)
  1010. {
  1011. ThrowIfInvalidF(Index, Size);
  1012. Context.EmitLdvectmp();
  1013. Context.EmitLdc_I4(Index);
  1014. if (Size == 0)
  1015. {
  1016. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertSingle));
  1017. }
  1018. else if (Size == 1)
  1019. {
  1020. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertDouble));
  1021. }
  1022. else
  1023. {
  1024. throw new ArgumentOutOfRangeException(nameof(Size));
  1025. }
  1026. Context.EmitStvectmp();
  1027. }
  1028. private static void ThrowIfInvalid(int Index, int Size)
  1029. {
  1030. if ((uint)Size > 3)
  1031. {
  1032. throw new ArgumentOutOfRangeException(nameof(Size));
  1033. }
  1034. if ((uint)Index >= 16 >> Size)
  1035. {
  1036. throw new ArgumentOutOfRangeException(nameof(Index));
  1037. }
  1038. }
  1039. private static void ThrowIfInvalidF(int Index, int Size)
  1040. {
  1041. if ((uint)Size > 1)
  1042. {
  1043. throw new ArgumentOutOfRangeException(nameof(Size));
  1044. }
  1045. if ((uint)Index >= 4 >> Size)
  1046. {
  1047. throw new ArgumentOutOfRangeException(nameof(Index));
  1048. }
  1049. }
  1050. }
  1051. }