LDj3SNuD 2cb8bd7006 CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492) %!s(int64=5) %!d(string=hai) anos
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CpuTest.cs 6938988427 Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471) %!s(int64=5) %!d(string=hai) anos
CpuTest32.cs 6938988427 Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471) %!s(int64=5) %!d(string=hai) anos
CpuTestAlu.cs d87c5375f1 Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) %!s(int64=7) %!d(string=hai) anos
CpuTestAlu32.cs fb0939f9b6 Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) %!s(int64=6) %!d(string=hai) anos
CpuTestAluBinary.cs d7044b10a2 Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) %!s(int64=5) %!d(string=hai) anos
CpuTestAluBinary32.cs d7044b10a2 Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) %!s(int64=5) %!d(string=hai) anos
CpuTestAluImm.cs 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) %!s(int64=7) %!d(string=hai) anos
CpuTestAluRs.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestAluRs32.cs b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) %!s(int64=6) %!d(string=hai) anos
CpuTestAluRx.cs 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) %!s(int64=7) %!d(string=hai) anos
CpuTestBf32.cs b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) %!s(int64=6) %!d(string=hai) anos
CpuTestBfm.cs 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) %!s(int64=7) %!d(string=hai) anos
CpuTestCcmpImm.cs 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) %!s(int64=7) %!d(string=hai) anos
CpuTestCcmpReg.cs 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) %!s(int64=7) %!d(string=hai) anos
CpuTestCsel.cs 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) %!s(int64=7) %!d(string=hai) anos
CpuTestMisc.cs a804db6eed Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335) %!s(int64=5) %!d(string=hai) anos
CpuTestMisc32.cs e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) %!s(int64=5) %!d(string=hai) anos
CpuTestMov.cs d87c5375f1 Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) %!s(int64=7) %!d(string=hai) anos
CpuTestMul.cs 1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) %!s(int64=7) %!d(string=hai) anos
CpuTestMul32.cs fb0939f9b6 Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) %!s(int64=6) %!d(string=hai) anos
CpuTestSimd.cs a804db6eed Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335) %!s(int64=5) %!d(string=hai) anos
CpuTestSimd32.cs 56a61a5758 CPU: A32: Fix Vabs_V & Vneg_V (S8, S16, S32 & F32); add Tests. (#1394) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdCrypto.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdCrypto32.cs dd433c1296 Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdCvt.cs 0915731a9d Implemented fast paths for: (#846) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdCvt32.cs 6938988427 Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdExt.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdFcond.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdFmov.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdImm.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdIns.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdLogical32.cs 3af2ce74ec Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdMemory32.cs e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdMov32.cs 9a49f8aec9 Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdReg.cs a804db6eed Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdReg32.cs e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdRegElem.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdRegElem32.cs c26f3774bd Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdRegElemF.cs a731ab3a2a Add a new JIT compiler for CPU code (#693) %!s(int64=6) %!d(string=hai) anos
CpuTestSimdShImm.cs 2cb8bd7006 CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdShImm32.cs e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) %!s(int64=5) %!d(string=hai) anos
CpuTestSimdTbl.cs 16869402bf Add Tbx Inst. (fast & slow paths), with Tests. (#782) %!s(int64=6) %!d(string=hai) anos
CpuTestSystem.cs 7c111a3567 Add Mrs & Msr (Nzcv) Inst., with Tests. (#819) %!s(int64=6) %!d(string=hai) anos