| .. |
|
ACryptoHelper.cs
|
d021d5dfa9
Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365)
|
7 年之前 |
|
AInst.cs
|
9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
|
8 年之前 |
|
AInstEmitAlu.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 年之前 |
|
AInstEmitAluHelper.cs
|
708761963e
Fix corner cases of ADCS and SBFM
|
8 年之前 |
|
AInstEmitBfm.cs
|
708761963e
Fix corner cases of ADCS and SBFM
|
8 年之前 |
|
AInstEmitCcmp.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 年之前 |
|
AInstEmitCsel.cs
|
950011c90f
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
|
8 年之前 |
|
AInstEmitException.cs
|
65105c2a3b
Implement SvcGetThreadContext3
|
7 年之前 |
|
AInstEmitFlow.cs
|
6d65e53664
Remove cold methods from the CPU cache (#224)
|
7 年之前 |
|
AInstEmitHash.cs
|
8f6387128a
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
|
7 年之前 |
|
AInstEmitMemory.cs
|
4731c7545d
Fix mistake on astc conversion, make some static methods that shouldn't be public private, remove old commmented out code
|
8 年之前 |
|
AInstEmitMemoryEx.cs
|
b8133c1997
Thread scheduler rewrite (#393)
|
7 年之前 |
|
AInstEmitMemoryHelper.cs
|
c393cdf8e3
More flexible memory manager (#307)
|
7 年之前 |
|
AInstEmitMove.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 年之前 |
|
AInstEmitMul.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 年之前 |
|
AInstEmitSimdArithmetic.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 年之前 |
|
AInstEmitSimdCmp.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 年之前 |
|
AInstEmitSimdCrypto.cs
|
d021d5dfa9
Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365)
|
7 年之前 |
|
AInstEmitSimdCvt.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 年之前 |
|
AInstEmitSimdHash.cs
|
34100051e4
Add SHA256H, SHA256H2, SHA256SU0, SHA256SU1 instructions; add 4 Tests (closed box). (#352)
|
7 年之前 |
|
AInstEmitSimdHelper.cs
|
bba9bf97d0
Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437)
|
7 年之前 |
|
AInstEmitSimdLogical.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 年之前 |
|
AInstEmitSimdMemory.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 年之前 |
|
AInstEmitSimdMove.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 年之前 |
|
AInstEmitSimdShift.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 年之前 |
|
AInstEmitSystem.cs
|
2ed24af756
Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count
|
8 年之前 |
|
AInstEmitter.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 年之前 |
|
AInstInterpreter.cs
|
9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
|
8 年之前 |
|
ASoftFallback.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 年之前 |
|
ASoftFloat.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 年之前 |
|
AVectorHelper.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 年之前 |