CpuTestSimdCvt32.cs 21 KB

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  1. #define SimdCvt32
  2. using ARMeilleure.State;
  3. using NUnit.Framework;
  4. using System;
  5. using System.Collections.Generic;
  6. namespace Ryujinx.Tests.Cpu
  7. {
  8. [Category("SimdCvt32")]
  9. public sealed class CpuTestSimdCvt32 : CpuTest32
  10. {
  11. #if SimdCvt32
  12. #region "ValueSource (Opcodes)"
  13. private static uint[] _Vrint_AMNP_V_F32_()
  14. {
  15. return
  16. [
  17. 0xf3ba0500u, // VRINTA.F32 Q0, Q0
  18. 0xf3ba0680u, // VRINTM.F32 Q0, Q0
  19. 0xf3ba0400u, // VRINTN.F32 Q0, Q0
  20. 0xf3ba0780u // VRINTP.F32 Q0, Q0
  21. ];
  22. }
  23. #endregion
  24. #region "ValueSource (Types)"
  25. private static uint[] _1S_()
  26. {
  27. return
  28. [
  29. 0x00000000u, 0x7FFFFFFFu,
  30. 0x80000000u, 0xFFFFFFFFu
  31. ];
  32. }
  33. private static IEnumerable<ulong> _1S_F_()
  34. {
  35. yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
  36. yield return 0x0000000080800000ul; // -Min Normal
  37. yield return 0x00000000807FFFFFul; // -Max Subnormal
  38. yield return 0x0000000080000001ul; // -Min Subnormal (-float.Epsilon)
  39. yield return 0x000000007F7FFFFFul; // +Max Normal (float.MaxValue)
  40. yield return 0x0000000000800000ul; // +Min Normal
  41. yield return 0x00000000007FFFFFul; // +Max Subnormal
  42. yield return 0x0000000000000001ul; // +Min Subnormal (float.Epsilon)
  43. if (!_noZeros)
  44. {
  45. yield return 0x0000000080000000ul; // -Zero
  46. yield return 0x0000000000000000ul; // +Zero
  47. }
  48. if (!_noInfs)
  49. {
  50. yield return 0x00000000FF800000ul; // -Infinity
  51. yield return 0x000000007F800000ul; // +Infinity
  52. }
  53. if (!_noNaNs)
  54. {
  55. yield return 0x00000000FFC00000ul; // -QNaN (all zeros payload) (float.NaN)
  56. yield return 0x00000000FFBFFFFFul; // -SNaN (all ones payload)
  57. yield return 0x000000007FC00000ul; // +QNaN (all zeros payload) (-float.NaN) (DefaultNaN)
  58. yield return 0x000000007FBFFFFFul; // +SNaN (all ones payload)
  59. }
  60. for (int cnt = 1; cnt <= RndCnt; cnt++)
  61. {
  62. ulong grbg = TestContext.CurrentContext.Random.NextUInt();
  63. ulong rnd1 = GenNormalS();
  64. ulong rnd2 = GenSubnormalS();
  65. yield return (grbg << 32) | rnd1;
  66. yield return (grbg << 32) | rnd2;
  67. }
  68. }
  69. private static IEnumerable<ulong> _2S_F_()
  70. {
  71. yield return 0xFF7FFFFFFF7FFFFFul; // -Max Normal (float.MinValue)
  72. yield return 0x8080000080800000ul; // -Min Normal
  73. yield return 0x807FFFFF807FFFFFul; // -Max Subnormal
  74. yield return 0x8000000180000001ul; // -Min Subnormal (-float.Epsilon)
  75. yield return 0x7F7FFFFF7F7FFFFFul; // +Max Normal (float.MaxValue)
  76. yield return 0x0080000000800000ul; // +Min Normal
  77. yield return 0x007FFFFF007FFFFFul; // +Max Subnormal
  78. yield return 0x0000000100000001ul; // +Min Subnormal (float.Epsilon)
  79. if (!_noZeros)
  80. {
  81. yield return 0x8000000080000000ul; // -Zero
  82. yield return 0x0000000000000000ul; // +Zero
  83. }
  84. if (!_noInfs)
  85. {
  86. yield return 0xFF800000FF800000ul; // -Infinity
  87. yield return 0x7F8000007F800000ul; // +Infinity
  88. }
  89. if (!_noNaNs)
  90. {
  91. yield return 0xFFC00000FFC00000ul; // -QNaN (all zeros payload) (float.NaN)
  92. yield return 0xFFBFFFFFFFBFFFFFul; // -SNaN (all ones payload)
  93. yield return 0x7FC000007FC00000ul; // +QNaN (all zeros payload) (-float.NaN) (DefaultNaN)
  94. yield return 0x7FBFFFFF7FBFFFFFul; // +SNaN (all ones payload)
  95. }
  96. for (int cnt = 1; cnt <= RndCnt; cnt++)
  97. {
  98. ulong rnd1 = GenNormalS();
  99. ulong rnd2 = GenSubnormalS();
  100. yield return (rnd1 << 32) | rnd1;
  101. yield return (rnd2 << 32) | rnd2;
  102. }
  103. }
  104. private static IEnumerable<ulong> _1D_F_()
  105. {
  106. yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
  107. yield return 0x8010000000000000ul; // -Min Normal
  108. yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
  109. yield return 0x8000000000000001ul; // -Min Subnormal (-double.Epsilon)
  110. yield return 0x7FEFFFFFFFFFFFFFul; // +Max Normal (double.MaxValue)
  111. yield return 0x0010000000000000ul; // +Min Normal
  112. yield return 0x000FFFFFFFFFFFFFul; // +Max Subnormal
  113. yield return 0x0000000000000001ul; // +Min Subnormal (double.Epsilon)
  114. if (!_noZeros)
  115. {
  116. yield return 0x8000000000000000ul; // -Zero
  117. yield return 0x0000000000000000ul; // +Zero
  118. }
  119. if (!_noInfs)
  120. {
  121. yield return 0xFFF0000000000000ul; // -Infinity
  122. yield return 0x7FF0000000000000ul; // +Infinity
  123. }
  124. if (!_noNaNs)
  125. {
  126. yield return 0xFFF8000000000000ul; // -QNaN (all zeros payload) (double.NaN)
  127. yield return 0xFFF7FFFFFFFFFFFFul; // -SNaN (all ones payload)
  128. yield return 0x7FF8000000000000ul; // +QNaN (all zeros payload) (-double.NaN) (DefaultNaN)
  129. yield return 0x7FF7FFFFFFFFFFFFul; // +SNaN (all ones payload)
  130. }
  131. for (int cnt = 1; cnt <= RndCnt; cnt++)
  132. {
  133. ulong rnd1 = GenNormalD();
  134. ulong rnd2 = GenSubnormalD();
  135. yield return rnd1;
  136. yield return rnd2;
  137. }
  138. }
  139. #endregion
  140. private const int RndCnt = 2;
  141. private static readonly bool _noZeros = false;
  142. private static readonly bool _noInfs = false;
  143. private static readonly bool _noNaNs = false;
  144. [Explicit]
  145. [Test, Pairwise, Description("VCVT.<dt>.F32 <Sd>, <Sm>")]
  146. public void Vcvt_F32_I32([Values(0u, 1u, 2u, 3u)] uint rd,
  147. [Values(0u, 1u, 2u, 3u)] uint rm,
  148. [ValueSource(nameof(_1S_F_))] ulong s0,
  149. [ValueSource(nameof(_1S_F_))] ulong s1,
  150. [ValueSource(nameof(_1S_F_))] ulong s2,
  151. [ValueSource(nameof(_1S_F_))] ulong s3,
  152. [Values] bool unsigned) // <U32, S32>
  153. {
  154. uint opcode = 0xeebc0ac0u; // VCVT.U32.F32 S0, S0
  155. if (!unsigned)
  156. {
  157. opcode |= 1 << 16; // opc2<0>
  158. }
  159. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  160. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  161. V128 v0 = MakeVectorE0E1E2E3((uint)s0, (uint)s1, (uint)s2, (uint)s3);
  162. SingleOpcode(opcode, v0: v0);
  163. CompareAgainstUnicorn();
  164. }
  165. [Explicit]
  166. [Test, Pairwise, Description("VCVT.<dt>.F64 <Sd>, <Dm>")]
  167. public void Vcvt_F64_I32([Values(0u, 1u, 2u, 3u)] uint rd,
  168. [Values(0u, 1u)] uint rm,
  169. [ValueSource(nameof(_1D_F_))] ulong d0,
  170. [ValueSource(nameof(_1D_F_))] ulong d1,
  171. [Values] bool unsigned) // <U32, S32>
  172. {
  173. uint opcode = 0xeebc0bc0u; // VCVT.U32.F64 S0, D0
  174. if (!unsigned)
  175. {
  176. opcode |= 1 << 16; // opc2<0>
  177. }
  178. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  179. opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
  180. V128 v0 = MakeVectorE0E1(d0, d1);
  181. SingleOpcode(opcode, v0: v0);
  182. CompareAgainstUnicorn();
  183. }
  184. [Explicit]
  185. [Test, Pairwise, Description("VCVT.F32.<dt> <Sd>, <Sm>")]
  186. public void Vcvt_I32_F32([Values(0u, 1u, 2u, 3u)] uint rd,
  187. [Values(0u, 1u, 2u, 3u)] uint rm,
  188. [ValueSource(nameof(_1S_))] uint s0,
  189. [ValueSource(nameof(_1S_))] uint s1,
  190. [ValueSource(nameof(_1S_))] uint s2,
  191. [ValueSource(nameof(_1S_))] uint s3,
  192. [Values] bool unsigned, // <U32, S32>
  193. [Values(RMode.Rn)] RMode rMode)
  194. {
  195. uint opcode = 0xeeb80a40u; // VCVT.F32.U32 S0, S0
  196. if (!unsigned)
  197. {
  198. opcode |= 1 << 7; // op
  199. }
  200. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  201. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  202. V128 v0 = MakeVectorE0E1E2E3(s0, s1, s2, s3);
  203. int fpscr = (int)rMode << (int)Fpcr.RMode;
  204. SingleOpcode(opcode, v0: v0, fpscr: fpscr);
  205. CompareAgainstUnicorn();
  206. }
  207. [Explicit]
  208. [Test, Pairwise, Description("VCVT.F64.<dt> <Dd>, <Sm>")]
  209. public void Vcvt_I32_F64([Values(0u, 1u)] uint rd,
  210. [Values(0u, 1u, 2u, 3u)] uint rm,
  211. [ValueSource(nameof(_1S_))] uint s0,
  212. [ValueSource(nameof(_1S_))] uint s1,
  213. [ValueSource(nameof(_1S_))] uint s2,
  214. [ValueSource(nameof(_1S_))] uint s3,
  215. [Values] bool unsigned, // <U32, S32>
  216. [Values(RMode.Rn)] RMode rMode)
  217. {
  218. uint opcode = 0xeeb80b40u; // VCVT.F64.U32 D0, S0
  219. if (!unsigned)
  220. {
  221. opcode |= 1 << 7; // op
  222. }
  223. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  224. opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
  225. V128 v0 = MakeVectorE0E1E2E3(s0, s1, s2, s3);
  226. int fpscr = (int)rMode << (int)Fpcr.RMode;
  227. SingleOpcode(opcode, v0: v0, fpscr: fpscr);
  228. CompareAgainstUnicorn();
  229. }
  230. [Test, Pairwise]
  231. [Explicit]
  232. public void Vrint_AMNP_V_F32([ValueSource(nameof(_Vrint_AMNP_V_F32_))] uint opcode,
  233. [Values(0u, 1u, 2u, 3u)] uint rd,
  234. [Values(0u, 1u, 2u, 3u)] uint rm,
  235. [ValueSource(nameof(_2S_F_))] ulong d0,
  236. [ValueSource(nameof(_2S_F_))] ulong d1,
  237. [ValueSource(nameof(_2S_F_))] ulong d2,
  238. [ValueSource(nameof(_2S_F_))] ulong d3,
  239. [Values] bool q)
  240. {
  241. if (q)
  242. {
  243. opcode |= 1 << 6;
  244. rd >>= 1;
  245. rd <<= 1;
  246. rm >>= 1;
  247. rm <<= 1;
  248. }
  249. opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
  250. opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
  251. V128 v0 = MakeVectorE0E1(d0, d1);
  252. V128 v1 = MakeVectorE0E1(d2, d3);
  253. SingleOpcode(opcode, v0: v0, v1: v1);
  254. CompareAgainstUnicorn();
  255. }
  256. [Test, Pairwise, Description("VRINTX.F<size> <Sd>, <Sm>")]
  257. public void Vrintx_S([Values(0u, 1u)] uint rd,
  258. [Values(0u, 1u)] uint rm,
  259. [Values(2u, 3u)] uint size,
  260. [ValueSource(nameof(_1D_F_))] ulong s0,
  261. [ValueSource(nameof(_1D_F_))] ulong s1,
  262. [ValueSource(nameof(_1D_F_))] ulong s2,
  263. [Values(RMode.Rn, RMode.Rm, RMode.Rp)] RMode rMode)
  264. {
  265. uint opcode = 0xEB70A40;
  266. V128 v0, v1, v2;
  267. if (size == 2)
  268. {
  269. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  270. opcode |= ((rd & 0x1e) >> 11) | ((rm & 0x1) << 22);
  271. v0 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s0), (uint)BitConverter.SingleToInt32Bits(s0));
  272. v1 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s1), (uint)BitConverter.SingleToInt32Bits(s0));
  273. v2 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s2), (uint)BitConverter.SingleToInt32Bits(s1));
  274. }
  275. else
  276. {
  277. opcode |= ((rm & 0xf) << 0) | ((rd & 0x10) << 1);
  278. opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
  279. v0 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s0), (uint)BitConverter.DoubleToInt64Bits(s0));
  280. v1 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s1), (uint)BitConverter.DoubleToInt64Bits(s0));
  281. v2 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s2), (uint)BitConverter.DoubleToInt64Bits(s1));
  282. }
  283. opcode |= ((size & 3) << 8);
  284. int fpscr = (int)rMode << (int)Fpcr.RMode;
  285. SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, fpscr: fpscr);
  286. CompareAgainstUnicorn();
  287. }
  288. [Explicit]
  289. [Test, Pairwise, Description("VCVT<top>.F16.F32 <Sd>, <Dm>")]
  290. public void Vcvt_F32_F16([Values(0u, 1u, 2u, 3u)] uint rd,
  291. [Values(0u, 1u, 2u, 3u)] uint rm,
  292. [ValueSource(nameof(_1S_))] uint s0,
  293. [ValueSource(nameof(_1S_))] uint s1,
  294. [ValueSource(nameof(_1S_))] uint s2,
  295. [ValueSource(nameof(_1S_))] uint s3,
  296. [Values] bool top)
  297. {
  298. uint opcode = 0xeeb30a40; // VCVTB.F16.F32 S0, D0
  299. if (top)
  300. {
  301. opcode |= 1 << 7;
  302. }
  303. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  304. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  305. V128 v0 = MakeVectorE0E1E2E3(s0, s1, s2, s3);
  306. SingleOpcode(opcode, v0: v0);
  307. CompareAgainstUnicorn();
  308. }
  309. [Explicit]
  310. [Test, Pairwise, Description("VCVT<top>.F16.F64 <Sd>, <Dm>")]
  311. public void Vcvt_F64_F16([Values(0u, 1u, 2u, 3u)] uint rd,
  312. [Values(0u, 1u)] uint rm,
  313. [ValueSource(nameof(_1D_F_))] ulong d0,
  314. [ValueSource(nameof(_1D_F_))] ulong d1,
  315. [Values] bool top)
  316. {
  317. uint opcode = 0xeeb30b40; // VCVTB.F16.F64 S0, D0
  318. if (top)
  319. {
  320. opcode |= 1 << 7;
  321. }
  322. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  323. opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
  324. V128 v0 = MakeVectorE0E1(d0, d1);
  325. SingleOpcode(opcode, v0: v0);
  326. CompareAgainstUnicorn();
  327. }
  328. [Explicit]
  329. [Test, Pairwise, Description("VCVT<top>.F<size>.F16 <Vd>, <Sm>")]
  330. public void Vcvt_F16_Fx([Values(0u, 1u, 2u, 3u)] uint rd,
  331. [Values(0u, 1u, 2u, 3u)] uint rm,
  332. [ValueSource(nameof(_1D_F_))] ulong d0,
  333. [ValueSource(nameof(_1D_F_))] ulong d1,
  334. [Values] bool top,
  335. [Values] bool sz)
  336. {
  337. uint opcode = 0xeeb20a40; // VCVTB.F32.F16 S0, S0
  338. if (top)
  339. {
  340. opcode |= 1 << 7;
  341. }
  342. if (sz)
  343. {
  344. opcode |= 1 << 8;
  345. opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
  346. }
  347. else
  348. {
  349. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  350. }
  351. opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
  352. V128 v0 = MakeVectorE0E1(d0, d1);
  353. SingleOpcode(opcode, v0: v0);
  354. CompareAgainstUnicorn();
  355. }
  356. [Test, Pairwise, Description("VCVT.I32.F32 <Vd>, <Vm>, #<fbits>")]
  357. public void Vcvt_V_Fixed_F32_I32([Values(0u, 1u, 2u, 3u)] uint vd,
  358. [Values(0u, 1u, 2u, 3u)] uint vm,
  359. [ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s0,
  360. [ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s1,
  361. [ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s2,
  362. [ValueSource(nameof(_1S_F_))][Random(RndCnt)] ulong s3,
  363. [Random(32u, 63u, 1)] uint fixImm,
  364. [Values] bool unsigned,
  365. [Values] bool q)
  366. {
  367. uint opcode = 0xF2800F10u; // VCVT.U32.F32 D0, D0, #0
  368. if (q)
  369. {
  370. opcode |= 1 << 6;
  371. vm <<= 1;
  372. vd <<= 1;
  373. }
  374. if (unsigned)
  375. {
  376. opcode |= 1 << 24;
  377. }
  378. opcode |= ((vm & 0x10) << 1);
  379. opcode |= ((vm & 0xf) << 0);
  380. opcode |= ((vd & 0x10) << 18);
  381. opcode |= ((vd & 0xf) << 12);
  382. opcode |= (fixImm & 0x3f) << 16;
  383. V128 v0 = new((uint)s0, (uint)s1, (uint)s2, (uint)s3);
  384. SingleOpcode(opcode, v0: v0);
  385. CompareAgainstUnicorn();
  386. }
  387. [Test, Pairwise, Description("VCVT.F32.I32 <Vd>, <Vm>, #<fbits>")]
  388. public void Vcvt_V_Fixed_I32_F32([Values(0u, 1u, 2u, 3u)] uint vd,
  389. [Values(0u, 1u, 2u, 3u)] uint vm,
  390. [ValueSource(nameof(_1S_))][Random(RndCnt)] uint s0,
  391. [ValueSource(nameof(_1S_))][Random(RndCnt)] uint s1,
  392. [ValueSource(nameof(_1S_))][Random(RndCnt)] uint s2,
  393. [ValueSource(nameof(_1S_))][Random(RndCnt)] uint s3,
  394. [Range(32u, 63u, 1)] uint fixImm,
  395. [Values] bool unsigned,
  396. [Values] bool q)
  397. {
  398. uint opcode = 0xF2800E10u; // VCVT.F32.U32 D0, D0, #0
  399. if (q)
  400. {
  401. opcode |= 1 << 6;
  402. vm <<= 1;
  403. vd <<= 1;
  404. }
  405. if (unsigned)
  406. {
  407. opcode |= 1 << 24;
  408. }
  409. opcode |= ((vm & 0x10) << 1);
  410. opcode |= ((vm & 0xf) << 0);
  411. opcode |= ((vd & 0x10) << 18);
  412. opcode |= ((vd & 0xf) << 12);
  413. opcode |= (fixImm & 0x3f) << 16;
  414. V128 v0 = new(s0, s1, s2, s3);
  415. SingleOpcode(opcode, v0: v0);
  416. CompareAgainstUnicorn();
  417. }
  418. [Test, Pairwise, Description("VRINTR.F<size> <Sd>, <Sm>")]
  419. [Platform(Exclude = "Linux,MacOsX")] // Instruction isn't testable due to Unicorn.
  420. public void Vrintr([Values(0u, 1u)] uint rd,
  421. [Values(0u, 1u)] uint rm,
  422. [Values(2u, 3u)] uint size,
  423. [ValueSource(nameof(_1D_F_))] ulong s0,
  424. [ValueSource(nameof(_1D_F_))] ulong s1,
  425. [ValueSource(nameof(_1D_F_))] ulong s2,
  426. [Values(RMode.Rn, RMode.Rm, RMode.Rp)] RMode rMode)
  427. {
  428. uint opcode = 0xEEB60A40;
  429. V128 v0, v1, v2;
  430. if (size == 2)
  431. {
  432. opcode |= ((rm & 0x1e) >> 1) | ((rm & 0x1) << 5);
  433. opcode |= ((rd & 0x1e) << 11) | ((rd & 0x1) << 22);
  434. v0 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s0), (uint)BitConverter.SingleToInt32Bits(s0));
  435. v1 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s1), (uint)BitConverter.SingleToInt32Bits(s0));
  436. v2 = MakeVectorE0E1((uint)BitConverter.SingleToInt32Bits(s2), (uint)BitConverter.SingleToInt32Bits(s1));
  437. }
  438. else
  439. {
  440. opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
  441. opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
  442. v0 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s0), (uint)BitConverter.DoubleToInt64Bits(s0));
  443. v1 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s1), (uint)BitConverter.DoubleToInt64Bits(s0));
  444. v2 = MakeVectorE0E1((uint)BitConverter.DoubleToInt64Bits(s2), (uint)BitConverter.DoubleToInt64Bits(s1));
  445. }
  446. opcode |= ((size & 3) << 8);
  447. int fpscr = (int)rMode << (int)Fpcr.RMode;
  448. SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, fpscr: fpscr);
  449. CompareAgainstUnicorn();
  450. }
  451. #endif
  452. }
  453. }