InstEmitSimdMove32.cs 21 KB

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  1. using ARMeilleure.Decoders;
  2. using ARMeilleure.IntermediateRepresentation;
  3. using ARMeilleure.Translation;
  4. using System;
  5. using static ARMeilleure.Instructions.InstEmitHelper;
  6. using static ARMeilleure.Instructions.InstEmitSimdHelper;
  7. using static ARMeilleure.Instructions.InstEmitSimdHelper32;
  8. using static ARMeilleure.IntermediateRepresentation.OperandHelper;
  9. namespace ARMeilleure.Instructions
  10. {
  11. static partial class InstEmit32
  12. {
  13. #region "Masks"
  14. // Same as InstEmitSimdMove, as the instructions do the same thing.
  15. private static readonly long[] _masksE0_Uzp = new long[]
  16. {
  17. 13L << 56 | 09L << 48 | 05L << 40 | 01L << 32 | 12L << 24 | 08L << 16 | 04L << 8 | 00L << 0,
  18. 11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0
  19. };
  20. private static readonly long[] _masksE1_Uzp = new long[]
  21. {
  22. 15L << 56 | 11L << 48 | 07L << 40 | 03L << 32 | 14L << 24 | 10L << 16 | 06L << 8 | 02L << 0,
  23. 15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0
  24. };
  25. #endregion
  26. public static void Vmov_I(ArmEmitterContext context)
  27. {
  28. EmitVectorImmUnaryOp32(context, (op1) => op1);
  29. }
  30. public static void Vmvn_I(ArmEmitterContext context)
  31. {
  32. EmitVectorImmUnaryOp32(context, (op1) => context.BitwiseExclusiveOr(op1, op1));
  33. }
  34. public static void Vmov_GS(ArmEmitterContext context)
  35. {
  36. OpCode32SimdMovGp op = (OpCode32SimdMovGp)context.CurrOp;
  37. Operand vec = GetVecA32(op.Vn >> 2);
  38. if (op.Op == 1)
  39. {
  40. // To general purpose.
  41. Operand value = context.VectorExtract(OperandType.I32, vec, op.Vn & 0x3);
  42. SetIntA32(context, op.Rt, value);
  43. }
  44. else
  45. {
  46. // From general purpose.
  47. Operand value = GetIntA32(context, op.Rt);
  48. context.Copy(vec, context.VectorInsert(vec, value, op.Vn & 0x3));
  49. }
  50. }
  51. public static void Vmov_G1(ArmEmitterContext context)
  52. {
  53. OpCode32SimdMovGpElem op = (OpCode32SimdMovGpElem)context.CurrOp;
  54. int index = op.Index + ((op.Vd & 1) << (3 - op.Size));
  55. if (op.Op == 1)
  56. {
  57. // To general purpose.
  58. Operand value = EmitVectorExtract32(context, op.Vd >> 1, index, op.Size, !op.U);
  59. SetIntA32(context, op.Rt, value);
  60. }
  61. else
  62. {
  63. // From general purpose.
  64. Operand vec = GetVecA32(op.Vd >> 1);
  65. Operand value = GetIntA32(context, op.Rt);
  66. context.Copy(vec, EmitVectorInsert(context, vec, value, index, op.Size));
  67. }
  68. }
  69. public static void Vmov_G2(ArmEmitterContext context)
  70. {
  71. OpCode32SimdMovGpDouble op = (OpCode32SimdMovGpDouble)context.CurrOp;
  72. Operand vec = GetVecA32(op.Vm >> 2);
  73. int vm1 = op.Vm + 1;
  74. bool sameOwnerVec = (op.Vm >> 2) == (vm1 >> 2);
  75. Operand vec2 = sameOwnerVec ? vec : GetVecA32(vm1 >> 2);
  76. if (op.Op == 1)
  77. {
  78. // To general purpose.
  79. Operand lowValue = context.VectorExtract(OperandType.I32, vec, op.Vm & 3);
  80. SetIntA32(context, op.Rt, lowValue);
  81. Operand highValue = context.VectorExtract(OperandType.I32, vec2, vm1 & 3);
  82. SetIntA32(context, op.Rt2, highValue);
  83. }
  84. else
  85. {
  86. // From general purpose.
  87. Operand lowValue = GetIntA32(context, op.Rt);
  88. Operand resultVec = context.VectorInsert(vec, lowValue, op.Vm & 3);
  89. Operand highValue = GetIntA32(context, op.Rt2);
  90. if (sameOwnerVec)
  91. {
  92. context.Copy(vec, context.VectorInsert(resultVec, highValue, vm1 & 3));
  93. }
  94. else
  95. {
  96. context.Copy(vec, resultVec);
  97. context.Copy(vec2, context.VectorInsert(vec2, highValue, vm1 & 3));
  98. }
  99. }
  100. }
  101. public static void Vmov_GD(ArmEmitterContext context)
  102. {
  103. OpCode32SimdMovGpDouble op = (OpCode32SimdMovGpDouble)context.CurrOp;
  104. Operand vec = GetVecA32(op.Vm >> 1);
  105. if (op.Op == 1)
  106. {
  107. // To general purpose.
  108. Operand value = context.VectorExtract(OperandType.I64, vec, op.Vm & 1);
  109. SetIntA32(context, op.Rt, context.ConvertI64ToI32(value));
  110. SetIntA32(context, op.Rt2, context.ConvertI64ToI32(context.ShiftRightUI(value, Const(32))));
  111. }
  112. else
  113. {
  114. // From general purpose.
  115. Operand lowValue = GetIntA32(context, op.Rt);
  116. Operand highValue = GetIntA32(context, op.Rt2);
  117. Operand value = context.BitwiseOr(
  118. context.ZeroExtend32(OperandType.I64, lowValue),
  119. context.ShiftLeft(context.ZeroExtend32(OperandType.I64, highValue), Const(32)));
  120. context.Copy(vec, context.VectorInsert(vec, value, op.Vm & 1));
  121. }
  122. }
  123. public static void Vtbl(ArmEmitterContext context)
  124. {
  125. OpCode32SimdTbl op = (OpCode32SimdTbl)context.CurrOp;
  126. bool extension = op.Opc == 1;
  127. int length = op.Length + 1;
  128. if (Optimizations.UseSsse3)
  129. {
  130. Operand d = GetVecA32(op.Qd);
  131. Operand m = EmitMoveDoubleWordToSide(context, GetVecA32(op.Qm), op.Vm, 0);
  132. Operand res;
  133. Operand mask = X86GetAllElements(context, 0x0707070707070707L);
  134. // Fast path for single register table.
  135. {
  136. Operand n = EmitMoveDoubleWordToSide(context, GetVecA32(op.Qn), op.Vn, 0);
  137. Operand mMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, m, mask);
  138. mMask = context.AddIntrinsic(Intrinsic.X86Por, mMask, m);
  139. res = context.AddIntrinsic(Intrinsic.X86Pshufb, n, mMask);
  140. }
  141. for (int index = 1; index < length; index++)
  142. {
  143. int newVn = (op.Vn + index) & 0x1F;
  144. (int qn, int ind) = GetQuadwordAndSubindex(newVn, op.RegisterSize);
  145. Operand ni = EmitMoveDoubleWordToSide(context, GetVecA32(qn), newVn, 0);
  146. Operand idxMask = X86GetAllElements(context, 0x0808080808080808L * index);
  147. Operand mSubMask = context.AddIntrinsic(Intrinsic.X86Psubb, m, idxMask);
  148. Operand mMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, mSubMask, mask);
  149. mMask = context.AddIntrinsic(Intrinsic.X86Por, mMask, mSubMask);
  150. Operand res2 = context.AddIntrinsic(Intrinsic.X86Pshufb, ni, mMask);
  151. res = context.AddIntrinsic(Intrinsic.X86Por, res, res2);
  152. }
  153. if (extension)
  154. {
  155. Operand idxMask = X86GetAllElements(context, (0x0808080808080808L * length) - 0x0101010101010101L);
  156. Operand zeroMask = context.VectorZero();
  157. Operand mPosMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, m, idxMask);
  158. Operand mNegMask = context.AddIntrinsic(Intrinsic.X86Pcmpgtb, zeroMask, m);
  159. Operand mMask = context.AddIntrinsic(Intrinsic.X86Por, mPosMask, mNegMask);
  160. Operand dMask = context.AddIntrinsic(Intrinsic.X86Pand, EmitMoveDoubleWordToSide(context, d, op.Vd, 0), mMask);
  161. res = context.AddIntrinsic(Intrinsic.X86Por, res, dMask);
  162. }
  163. res = EmitMoveDoubleWordToSide(context, res, 0, op.Vd);
  164. context.Copy(d, EmitDoubleWordInsert(context, d, res, op.Vd));
  165. }
  166. else
  167. {
  168. int elems = op.GetBytesCount() >> op.Size;
  169. (int Qx, int Ix)[] tableTuples = new (int, int)[length];
  170. for (int i = 0; i < length; i++)
  171. {
  172. tableTuples[i] = GetQuadwordAndSubindex(op.Vn + i, op.RegisterSize);
  173. }
  174. int byteLength = length * 8;
  175. Operand res = GetVecA32(op.Qd);
  176. Operand m = GetVecA32(op.Qm);
  177. for (int index = 0; index < elems; index++)
  178. {
  179. Operand selectedIndex = context.ZeroExtend8(OperandType.I32, context.VectorExtract8(m, index + op.Im));
  180. Operand inRange = context.ICompareLess(selectedIndex, Const(byteLength));
  181. Operand elemRes = null; // Note: This is I64 for ease of calculation.
  182. // TODO: Branching rather than conditional select.
  183. // Get indexed byte.
  184. // To simplify (ha) the il, we get bytes from every vector and use a nested conditional select to choose the right result.
  185. // This does have to extract `length` times for every element but certainly not as bad as it could be.
  186. // Which vector number is the index on.
  187. Operand vecIndex = context.ShiftRightUI(selectedIndex, Const(3));
  188. // What should we shift by to extract it.
  189. Operand subVecIndexShift = context.ShiftLeft(context.BitwiseAnd(selectedIndex, Const(7)), Const(3));
  190. for (int i = 0; i < length; i++)
  191. {
  192. (int qx, int ix) = tableTuples[i];
  193. // Get the whole vector, we'll get a byte out of it.
  194. Operand lookupResult;
  195. if (qx == op.Qd)
  196. {
  197. // Result contains the current state of the vector.
  198. lookupResult = context.VectorExtract(OperandType.I64, res, ix);
  199. }
  200. else
  201. {
  202. lookupResult = EmitVectorExtract32(context, qx, ix, 3, false); // I64
  203. }
  204. lookupResult = context.ShiftRightUI(lookupResult, subVecIndexShift); // Get the relevant byte from this vector.
  205. if (i == 0)
  206. {
  207. elemRes = lookupResult; // First result is always default.
  208. }
  209. else
  210. {
  211. Operand isThisElem = context.ICompareEqual(vecIndex, Const(i));
  212. elemRes = context.ConditionalSelect(isThisElem, lookupResult, elemRes);
  213. }
  214. }
  215. Operand fallback = (extension) ? context.ZeroExtend32(OperandType.I64, EmitVectorExtract32(context, op.Qd, index + op.Id, 0, false)) : Const(0L);
  216. res = EmitVectorInsert(context, res, context.ConditionalSelect(inRange, elemRes, fallback), index + op.Id, 0);
  217. }
  218. context.Copy(GetVecA32(op.Qd), res);
  219. }
  220. }
  221. public static void Vtrn(ArmEmitterContext context)
  222. {
  223. OpCode32SimdCmpZ op = (OpCode32SimdCmpZ)context.CurrOp;
  224. if (Optimizations.UseSsse3)
  225. {
  226. EmitVectorShuffleOpSimd32(context, (m, d) =>
  227. {
  228. Operand mask = null;
  229. if (op.Size < 3)
  230. {
  231. long maskE0 = EvenMasks[op.Size];
  232. long maskE1 = OddMasks[op.Size];
  233. mask = X86GetScalar(context, maskE0);
  234. mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
  235. }
  236. if (op.Size < 3)
  237. {
  238. d = context.AddIntrinsic(Intrinsic.X86Pshufb, d, mask);
  239. m = context.AddIntrinsic(Intrinsic.X86Pshufb, m, mask);
  240. }
  241. Operand resD = context.AddIntrinsic(X86PunpcklInstruction[op.Size], d, m);
  242. Operand resM = context.AddIntrinsic(X86PunpckhInstruction[op.Size], d, m);
  243. return (resM, resD);
  244. });
  245. }
  246. else
  247. {
  248. int elems = op.GetBytesCount() >> op.Size;
  249. int pairs = elems >> 1;
  250. bool overlap = op.Qm == op.Qd;
  251. Operand resD = GetVecA32(op.Qd);
  252. Operand resM = GetVecA32(op.Qm);
  253. for (int index = 0; index < pairs; index++)
  254. {
  255. int pairIndex = index << 1;
  256. Operand d2 = EmitVectorExtract32(context, op.Qd, pairIndex + 1 + op.Id, op.Size, false);
  257. Operand m1 = EmitVectorExtract32(context, op.Qm, pairIndex + op.Im, op.Size, false);
  258. resD = EmitVectorInsert(context, resD, m1, pairIndex + 1 + op.Id, op.Size);
  259. if (overlap)
  260. {
  261. resM = resD;
  262. }
  263. resM = EmitVectorInsert(context, resM, d2, pairIndex + op.Im, op.Size);
  264. if (overlap)
  265. {
  266. resD = resM;
  267. }
  268. }
  269. context.Copy(GetVecA32(op.Qd), resD);
  270. if (!overlap)
  271. {
  272. context.Copy(GetVecA32(op.Qm), resM);
  273. }
  274. }
  275. }
  276. public static void Vzip(ArmEmitterContext context)
  277. {
  278. OpCode32SimdCmpZ op = (OpCode32SimdCmpZ)context.CurrOp;
  279. if (Optimizations.UseSse2)
  280. {
  281. EmitVectorShuffleOpSimd32(context, (m, d) =>
  282. {
  283. if (op.RegisterSize == RegisterSize.Simd128)
  284. {
  285. Operand resD = context.AddIntrinsic(X86PunpcklInstruction[op.Size], d, m);
  286. Operand resM = context.AddIntrinsic(X86PunpckhInstruction[op.Size], d, m);
  287. return (resM, resD);
  288. }
  289. else
  290. {
  291. Operand res = context.AddIntrinsic(X86PunpcklInstruction[op.Size], d, m);
  292. Operand resD = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, res, context.VectorZero());
  293. Operand resM = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, res, context.VectorZero());
  294. return (resM, resD);
  295. }
  296. });
  297. }
  298. else
  299. {
  300. int elems = op.GetBytesCount() >> op.Size;
  301. int pairs = elems >> 1;
  302. bool overlap = op.Qm == op.Qd;
  303. Operand resD = GetVecA32(op.Qd);
  304. Operand resM = GetVecA32(op.Qm);
  305. for (int index = 0; index < pairs; index++)
  306. {
  307. int pairIndex = index << 1;
  308. Operand dRowD = EmitVectorExtract32(context, op.Qd, index + op.Id, op.Size, false);
  309. Operand mRowD = EmitVectorExtract32(context, op.Qm, index + op.Im, op.Size, false);
  310. Operand dRowM = EmitVectorExtract32(context, op.Qd, index + op.Id + pairs, op.Size, false);
  311. Operand mRowM = EmitVectorExtract32(context, op.Qm, index + op.Im + pairs, op.Size, false);
  312. resD = EmitVectorInsert(context, resD, dRowD, pairIndex + op.Id, op.Size);
  313. resD = EmitVectorInsert(context, resD, mRowD, pairIndex + 1 + op.Id, op.Size);
  314. if (overlap)
  315. {
  316. resM = resD;
  317. }
  318. resM = EmitVectorInsert(context, resM, dRowM, pairIndex + op.Im, op.Size);
  319. resM = EmitVectorInsert(context, resM, mRowM, pairIndex + 1 + op.Im, op.Size);
  320. if (overlap)
  321. {
  322. resD = resM;
  323. }
  324. }
  325. context.Copy(GetVecA32(op.Qd), resD);
  326. if (!overlap)
  327. {
  328. context.Copy(GetVecA32(op.Qm), resM);
  329. }
  330. }
  331. }
  332. public static void Vuzp(ArmEmitterContext context)
  333. {
  334. OpCode32SimdCmpZ op = (OpCode32SimdCmpZ)context.CurrOp;
  335. if (Optimizations.UseSsse3)
  336. {
  337. EmitVectorShuffleOpSimd32(context, (m, d) =>
  338. {
  339. if (op.RegisterSize == RegisterSize.Simd128)
  340. {
  341. Operand mask = null;
  342. if (op.Size < 3)
  343. {
  344. long maskE0 = EvenMasks[op.Size];
  345. long maskE1 = OddMasks[op.Size];
  346. mask = X86GetScalar(context, maskE0);
  347. mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
  348. d = context.AddIntrinsic(Intrinsic.X86Pshufb, d, mask);
  349. m = context.AddIntrinsic(Intrinsic.X86Pshufb, m, mask);
  350. }
  351. Operand resD = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, d, m);
  352. Operand resM = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, d, m);
  353. return (resM, resD);
  354. }
  355. else
  356. {
  357. Intrinsic punpcklInst = X86PunpcklInstruction[op.Size];
  358. Operand res = context.AddIntrinsic(punpcklInst, d, m);
  359. if (op.Size < 2)
  360. {
  361. long maskE0 = _masksE0_Uzp[op.Size];
  362. long maskE1 = _masksE1_Uzp[op.Size];
  363. Operand mask = X86GetScalar(context, maskE0);
  364. mask = EmitVectorInsert(context, mask, Const(maskE1), 1, 3);
  365. res = context.AddIntrinsic(Intrinsic.X86Pshufb, res, mask);
  366. }
  367. Operand resD = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, res, context.VectorZero());
  368. Operand resM = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, res, context.VectorZero());
  369. return (resM, resD);
  370. }
  371. });
  372. }
  373. else
  374. {
  375. int elems = op.GetBytesCount() >> op.Size;
  376. int pairs = elems >> 1;
  377. bool overlap = op.Qm == op.Qd;
  378. Operand resD = GetVecA32(op.Qd);
  379. Operand resM = GetVecA32(op.Qm);
  380. for (int index = 0; index < elems; index++)
  381. {
  382. Operand dIns, mIns;
  383. if (index >= pairs)
  384. {
  385. int pairIndex = index - pairs;
  386. dIns = EmitVectorExtract32(context, op.Qm, (pairIndex << 1) + op.Im, op.Size, false);
  387. mIns = EmitVectorExtract32(context, op.Qm, ((pairIndex << 1) | 1) + op.Im, op.Size, false);
  388. }
  389. else
  390. {
  391. dIns = EmitVectorExtract32(context, op.Qd, (index << 1) + op.Id, op.Size, false);
  392. mIns = EmitVectorExtract32(context, op.Qd, ((index << 1) | 1) + op.Id, op.Size, false);
  393. }
  394. resD = EmitVectorInsert(context, resD, dIns, index + op.Id, op.Size);
  395. if (overlap)
  396. {
  397. resM = resD;
  398. }
  399. resM = EmitVectorInsert(context, resM, mIns, index + op.Im, op.Size);
  400. if (overlap)
  401. {
  402. resD = resM;
  403. }
  404. }
  405. context.Copy(GetVecA32(op.Qd), resD);
  406. if (!overlap)
  407. {
  408. context.Copy(GetVecA32(op.Qm), resM);
  409. }
  410. }
  411. }
  412. public static void EmitVectorShuffleOpSimd32(ArmEmitterContext context, Func<Operand, Operand, (Operand, Operand)> shuffleFunc)
  413. {
  414. OpCode32Simd op = (OpCode32Simd)context.CurrOp;
  415. Operand m = GetVecA32(op.Qm);
  416. Operand d = GetVecA32(op.Qd);
  417. Operand initialM = m;
  418. Operand initialD = d;
  419. if (!op.Q) // Register swap: move relevant doubleword to side 0, for consistency.
  420. {
  421. m = EmitMoveDoubleWordToSide(context, m, op.Vm, 0);
  422. d = EmitMoveDoubleWordToSide(context, d, op.Vd, 0);
  423. }
  424. (Operand resM, Operand resD) = shuffleFunc(m, d);
  425. bool overlap = op.Qm == op.Qd;
  426. if (!op.Q) // Register insert.
  427. {
  428. resM = EmitDoubleWordInsert(context, initialM, EmitMoveDoubleWordToSide(context, resM, 0, op.Vm), op.Vm);
  429. resD = EmitDoubleWordInsert(context, overlap ? resM : initialD, EmitMoveDoubleWordToSide(context, resD, 0, op.Vd), op.Vd);
  430. }
  431. if (!overlap)
  432. {
  433. context.Copy(initialM, resM);
  434. }
  435. context.Copy(initialD, resD);
  436. }
  437. }
  438. }