CpuTestSimd.cs 73 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660
  1. #define Simd
  2. using ChocolArm64.State;
  3. using NUnit.Framework;
  4. using System.Runtime.Intrinsics;
  5. namespace Ryujinx.Tests.Cpu
  6. {
  7. [Category("Simd")] // Tested: second half of 2018.
  8. public sealed class CpuTestSimd : CpuTest
  9. {
  10. #if Simd
  11. #region "ValueSource"
  12. private static ulong[] _1B1H1S1D_()
  13. {
  14. return new ulong[] { 0x0000000000000000ul, 0x000000000000007Ful,
  15. 0x0000000000000080ul, 0x00000000000000FFul,
  16. 0x0000000000007FFFul, 0x0000000000008000ul,
  17. 0x000000000000FFFFul, 0x000000007FFFFFFFul,
  18. 0x0000000080000000ul, 0x00000000FFFFFFFFul,
  19. 0x7FFFFFFFFFFFFFFFul, 0x8000000000000000ul,
  20. 0xFFFFFFFFFFFFFFFFul };
  21. }
  22. private static ulong[] _1D_()
  23. {
  24. return new ulong[] { 0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  25. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
  26. }
  27. private static ulong[] _1H1S1D_()
  28. {
  29. return new ulong[] { 0x0000000000000000ul, 0x0000000000007FFFul,
  30. 0x0000000000008000ul, 0x000000000000FFFFul,
  31. 0x000000007FFFFFFFul, 0x0000000080000000ul,
  32. 0x00000000FFFFFFFFul, 0x7FFFFFFFFFFFFFFFul,
  33. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
  34. }
  35. private static ulong[] _4H2S1D_()
  36. {
  37. return new ulong[] { 0x0000000000000000ul, 0x7FFF7FFF7FFF7FFFul,
  38. 0x8000800080008000ul, 0x7FFFFFFF7FFFFFFFul,
  39. 0x8000000080000000ul, 0x7FFFFFFFFFFFFFFFul,
  40. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
  41. }
  42. private static ulong[] _8B_()
  43. {
  44. return new ulong[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
  45. 0x8080808080808080ul, 0xFFFFFFFFFFFFFFFFul };
  46. }
  47. private static ulong[] _8B4H_()
  48. {
  49. return new ulong[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
  50. 0x8080808080808080ul, 0x7FFF7FFF7FFF7FFFul,
  51. 0x8000800080008000ul, 0xFFFFFFFFFFFFFFFFul };
  52. }
  53. private static ulong[] _8B4H2S_()
  54. {
  55. return new ulong[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
  56. 0x8080808080808080ul, 0x7FFF7FFF7FFF7FFFul,
  57. 0x8000800080008000ul, 0x7FFFFFFF7FFFFFFFul,
  58. 0x8000000080000000ul, 0xFFFFFFFFFFFFFFFFul };
  59. }
  60. private static ulong[] _8B4H2S1D_()
  61. {
  62. return new ulong[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
  63. 0x8080808080808080ul, 0x7FFF7FFF7FFF7FFFul,
  64. 0x8000800080008000ul, 0x7FFFFFFF7FFFFFFFul,
  65. 0x8000000080000000ul, 0x7FFFFFFFFFFFFFFFul,
  66. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
  67. }
  68. private static ulong[] _1S_F_()
  69. {
  70. return new ulong[]
  71. {
  72. 0x00000000FFFFFFFFul, // -QNaN (all ones payload)
  73. 0x00000000FFBFFFFFul, // -SNaN (all ones payload)
  74. 0x00000000FF800000ul, // -INF
  75. 0x00000000FF7FFFFFul, // -Max Normal, float.MinValue
  76. 0x0000000080800000ul, // -Min Normal
  77. 0x00000000807FFFFFul, // -Max SubNormal
  78. 0x0000000080000001ul, // -Min SubNormal
  79. 0x0000000080000000ul, // -0
  80. 0x0000000000000000ul, // +0
  81. 0x0000000000000001ul, // +Min SubNormal
  82. 0x00000000007FFFFFul, // +Max SubNormal
  83. 0x0000000000800000ul, // +Min Normal
  84. 0x000000007F7FFFFFul, // +Max Normal, float.MaxValue
  85. 0x000000007F800000ul, // +INF
  86. 0x000000007FBFFFFFul, // +SNaN (all ones payload)
  87. 0x000000007FFFFFFFul // +QNaN (all ones payload)
  88. };
  89. }
  90. private static ulong[] _2S_F_()
  91. {
  92. return new ulong[]
  93. {
  94. 0xFFFFFFFFFFFFFFFFul, // -QNaN (all ones payload)
  95. 0xFFBFFFFFFFBFFFFFul, // -SNaN (all ones payload)
  96. 0xFF800000FF800000ul, // -INF
  97. 0xFF7FFFFFFF7FFFFFul, // -Max Normal, float.MinValue
  98. 0x8080000080800000ul, // -Min Normal
  99. 0x807FFFFF807FFFFFul, // -Max SubNormal
  100. 0x8000000180000001ul, // -Min SubNormal
  101. 0x8000000080000000ul, // -0
  102. 0x0000000000000000ul, // +0
  103. 0x0000000100000001ul, // +Min SubNormal
  104. 0x007FFFFF007FFFFFul, // +Max SubNormal
  105. 0x0080000000800000ul, // +Min Normal
  106. 0x7F7FFFFF7F7FFFFFul, // +Max Normal, float.MaxValue
  107. 0x7F8000007F800000ul, // +INF
  108. 0x7FBFFFFF7FBFFFFFul, // +SNaN (all ones payload)
  109. 0x7FFFFFFF7FFFFFFFul // +QNaN (all ones payload)
  110. };
  111. }
  112. private static ulong[] _1D_F_()
  113. {
  114. return new ulong[]
  115. {
  116. 0xFFFFFFFFFFFFFFFFul, // -QNaN (all ones payload)
  117. 0xFFF7FFFFFFFFFFFFul, // -SNaN (all ones payload)
  118. 0xFFF0000000000000ul, // -INF
  119. 0xFFEFFFFFFFFFFFFFul, // -Max Normal, double.MinValue
  120. 0x8010000000000000ul, // -Min Normal
  121. 0x800FFFFFFFFFFFFFul, // -Max SubNormal
  122. 0x8000000000000001ul, // -Min SubNormal
  123. 0x8000000000000000ul, // -0
  124. 0x0000000000000000ul, // +0
  125. 0x0000000000000001ul, // +Min SubNormal
  126. 0x000FFFFFFFFFFFFFul, // +Max SubNormal
  127. 0x0010000000000000ul, // +Min Normal
  128. 0x7FEFFFFFFFFFFFFFul, // +Max Normal, double.MaxValue
  129. 0x7FF0000000000000ul, // +INF
  130. 0x7FF7FFFFFFFFFFFFul, // +SNaN (all ones payload)
  131. 0x7FFFFFFFFFFFFFFFul // +QNaN (all ones payload)
  132. };
  133. }
  134. #endregion
  135. private const int RndCnt = 2;
  136. [Test, Pairwise, Description("ABS <V><d>, <V><n>")]
  137. public void Abs_S_D([Values(0u)] uint Rd,
  138. [Values(1u, 0u)] uint Rn,
  139. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  140. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  141. {
  142. uint Opcode = 0x5EE0B800; // ABS D0, D0
  143. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  144. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  145. Vector128<float> V1 = MakeVectorE0(A);
  146. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  147. CompareAgainstUnicorn();
  148. }
  149. [Test, Pairwise, Description("ABS <Vd>.<T>, <Vn>.<T>")]
  150. public void Abs_V_8B_4H_2S([Values(0u)] uint Rd,
  151. [Values(1u, 0u)] uint Rn,
  152. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  153. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  154. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  155. {
  156. uint Opcode = 0x0E20B800; // ABS V0.8B, V0.8B
  157. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  158. Opcode |= ((size & 3) << 22);
  159. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  160. Vector128<float> V1 = MakeVectorE0(A);
  161. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  162. CompareAgainstUnicorn();
  163. }
  164. [Test, Pairwise, Description("ABS <Vd>.<T>, <Vn>.<T>")]
  165. public void Abs_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  166. [Values(1u, 0u)] uint Rn,
  167. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  168. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  169. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  170. {
  171. uint Opcode = 0x4E20B800; // ABS V0.16B, V0.16B
  172. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  173. Opcode |= ((size & 3) << 22);
  174. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  175. Vector128<float> V1 = MakeVectorE0E1(A, A);
  176. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  177. CompareAgainstUnicorn();
  178. }
  179. [Test, Pairwise, Description("ADDP <V><d>, <Vn>.<T>")]
  180. public void Addp_S_2DD([Values(0u)] uint Rd,
  181. [Values(1u, 0u)] uint Rn,
  182. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  183. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  184. {
  185. uint Opcode = 0x5EF1B800; // ADDP D0, V0.2D
  186. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  187. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  188. Vector128<float> V1 = MakeVectorE0E1(A, A);
  189. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  190. CompareAgainstUnicorn();
  191. }
  192. [Test, Pairwise, Description("ADDV <V><d>, <Vn>.<T>")]
  193. public void Addv_V_8BB_4HH([Values(0u)] uint Rd,
  194. [Values(1u, 0u)] uint Rn,
  195. [ValueSource("_8B4H_")] [Random(RndCnt)] ulong Z,
  196. [ValueSource("_8B4H_")] [Random(RndCnt)] ulong A,
  197. [Values(0b00u, 0b01u)] uint size) // <8BB, 4HH>
  198. {
  199. uint Opcode = 0x0E31B800; // ADDV B0, V0.8B
  200. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  201. Opcode |= ((size & 3) << 22);
  202. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  203. Vector128<float> V1 = MakeVectorE0(A);
  204. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  205. CompareAgainstUnicorn();
  206. }
  207. [Test, Pairwise, Description("ADDV <V><d>, <Vn>.<T>")]
  208. public void Addv_V_16BB_8HH_4SS([Values(0u)] uint Rd,
  209. [Values(1u, 0u)] uint Rn,
  210. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  211. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  212. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16BB, 8HH, 4SS>
  213. {
  214. uint Opcode = 0x4E31B800; // ADDV B0, V0.16B
  215. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  216. Opcode |= ((size & 3) << 22);
  217. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  218. Vector128<float> V1 = MakeVectorE0E1(A, A);
  219. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  220. CompareAgainstUnicorn();
  221. }
  222. [Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
  223. public void Cls_V_8B_4H_2S([Values(0u)] uint Rd,
  224. [Values(1u, 0u)] uint Rn,
  225. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  226. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  227. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  228. {
  229. uint Opcode = 0x0E204800; // CLS V0.8B, V0.8B
  230. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  231. Opcode |= ((size & 3) << 22);
  232. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  233. Vector128<float> V1 = MakeVectorE0(A);
  234. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  235. CompareAgainstUnicorn();
  236. }
  237. [Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
  238. public void Cls_V_16B_8H_4S([Values(0u)] uint Rd,
  239. [Values(1u, 0u)] uint Rn,
  240. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  241. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  242. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16B, 8H, 4S>
  243. {
  244. uint Opcode = 0x4E204800; // CLS V0.16B, V0.16B
  245. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  246. Opcode |= ((size & 3) << 22);
  247. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  248. Vector128<float> V1 = MakeVectorE0E1(A, A);
  249. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  250. CompareAgainstUnicorn();
  251. }
  252. [Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
  253. public void Clz_V_8B_4H_2S([Values(0u)] uint Rd,
  254. [Values(1u, 0u)] uint Rn,
  255. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  256. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  257. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  258. {
  259. uint Opcode = 0x2E204800; // CLZ V0.8B, V0.8B
  260. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  261. Opcode |= ((size & 3) << 22);
  262. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  263. Vector128<float> V1 = MakeVectorE0(A);
  264. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  265. CompareAgainstUnicorn();
  266. }
  267. [Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
  268. public void Clz_V_16B_8H_4S([Values(0u)] uint Rd,
  269. [Values(1u, 0u)] uint Rn,
  270. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  271. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  272. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16B, 8H, 4S>
  273. {
  274. uint Opcode = 0x6E204800; // CLZ V0.16B, V0.16B
  275. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  276. Opcode |= ((size & 3) << 22);
  277. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  278. Vector128<float> V1 = MakeVectorE0E1(A, A);
  279. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  280. CompareAgainstUnicorn();
  281. }
  282. [Test, Pairwise, Description("CMEQ <V><d>, <V><n>, #0")]
  283. public void Cmeq_S_D([Values(0u)] uint Rd,
  284. [Values(1u, 0u)] uint Rn,
  285. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  286. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  287. {
  288. uint Opcode = 0x5EE09800; // CMEQ D0, D0, #0
  289. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  290. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  291. Vector128<float> V1 = MakeVectorE0(A);
  292. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  293. CompareAgainstUnicorn();
  294. }
  295. [Test, Pairwise, Description("CMEQ <Vd>.<T>, <Vn>.<T>, #0")]
  296. public void Cmeq_V_8B_4H_2S([Values(0u)] uint Rd,
  297. [Values(1u, 0u)] uint Rn,
  298. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  299. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  300. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  301. {
  302. uint Opcode = 0x0E209800; // CMEQ V0.8B, V0.8B, #0
  303. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  304. Opcode |= ((size & 3) << 22);
  305. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  306. Vector128<float> V1 = MakeVectorE0(A);
  307. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  308. CompareAgainstUnicorn();
  309. }
  310. [Test, Pairwise, Description("CMEQ <Vd>.<T>, <Vn>.<T>, #0")]
  311. public void Cmeq_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  312. [Values(1u, 0u)] uint Rn,
  313. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  314. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  315. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  316. {
  317. uint Opcode = 0x4E209800; // CMEQ V0.16B, V0.16B, #0
  318. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  319. Opcode |= ((size & 3) << 22);
  320. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  321. Vector128<float> V1 = MakeVectorE0E1(A, A);
  322. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  323. CompareAgainstUnicorn();
  324. }
  325. [Test, Pairwise, Description("CMGE <V><d>, <V><n>, #0")]
  326. public void Cmge_S_D([Values(0u)] uint Rd,
  327. [Values(1u, 0u)] uint Rn,
  328. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  329. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  330. {
  331. uint Opcode = 0x7EE08800; // CMGE D0, D0, #0
  332. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  333. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  334. Vector128<float> V1 = MakeVectorE0(A);
  335. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  336. CompareAgainstUnicorn();
  337. }
  338. [Test, Pairwise, Description("CMGE <Vd>.<T>, <Vn>.<T>, #0")]
  339. public void Cmge_V_8B_4H_2S([Values(0u)] uint Rd,
  340. [Values(1u, 0u)] uint Rn,
  341. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  342. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  343. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  344. {
  345. uint Opcode = 0x2E208800; // CMGE V0.8B, V0.8B, #0
  346. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  347. Opcode |= ((size & 3) << 22);
  348. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  349. Vector128<float> V1 = MakeVectorE0(A);
  350. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  351. CompareAgainstUnicorn();
  352. }
  353. [Test, Pairwise, Description("CMGE <Vd>.<T>, <Vn>.<T>, #0")]
  354. public void Cmge_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  355. [Values(1u, 0u)] uint Rn,
  356. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  357. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  358. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  359. {
  360. uint Opcode = 0x6E208800; // CMGE V0.16B, V0.16B, #0
  361. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  362. Opcode |= ((size & 3) << 22);
  363. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  364. Vector128<float> V1 = MakeVectorE0E1(A, A);
  365. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  366. CompareAgainstUnicorn();
  367. }
  368. [Test, Pairwise, Description("CMGT <V><d>, <V><n>, #0")]
  369. public void Cmgt_S_D([Values(0u)] uint Rd,
  370. [Values(1u, 0u)] uint Rn,
  371. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  372. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  373. {
  374. uint Opcode = 0x5EE08800; // CMGT D0, D0, #0
  375. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  376. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  377. Vector128<float> V1 = MakeVectorE0(A);
  378. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  379. CompareAgainstUnicorn();
  380. }
  381. [Test, Pairwise, Description("CMGT <Vd>.<T>, <Vn>.<T>, #0")]
  382. public void Cmgt_V_8B_4H_2S([Values(0u)] uint Rd,
  383. [Values(1u, 0u)] uint Rn,
  384. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  385. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  386. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  387. {
  388. uint Opcode = 0x0E208800; // CMGT V0.8B, V0.8B, #0
  389. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  390. Opcode |= ((size & 3) << 22);
  391. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  392. Vector128<float> V1 = MakeVectorE0(A);
  393. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  394. CompareAgainstUnicorn();
  395. }
  396. [Test, Pairwise, Description("CMGT <Vd>.<T>, <Vn>.<T>, #0")]
  397. public void Cmgt_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  398. [Values(1u, 0u)] uint Rn,
  399. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  400. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  401. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  402. {
  403. uint Opcode = 0x4E208800; // CMGT V0.16B, V0.16B, #0
  404. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  405. Opcode |= ((size & 3) << 22);
  406. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  407. Vector128<float> V1 = MakeVectorE0E1(A, A);
  408. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  409. CompareAgainstUnicorn();
  410. }
  411. [Test, Pairwise, Description("CMLE <V><d>, <V><n>, #0")]
  412. public void Cmle_S_D([Values(0u)] uint Rd,
  413. [Values(1u, 0u)] uint Rn,
  414. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  415. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  416. {
  417. uint Opcode = 0x7EE09800; // CMLE D0, D0, #0
  418. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  419. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  420. Vector128<float> V1 = MakeVectorE0(A);
  421. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  422. CompareAgainstUnicorn();
  423. }
  424. [Test, Pairwise, Description("CMLE <Vd>.<T>, <Vn>.<T>, #0")]
  425. public void Cmle_V_8B_4H_2S([Values(0u)] uint Rd,
  426. [Values(1u, 0u)] uint Rn,
  427. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  428. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  429. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  430. {
  431. uint Opcode = 0x2E209800; // CMLE V0.8B, V0.8B, #0
  432. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  433. Opcode |= ((size & 3) << 22);
  434. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  435. Vector128<float> V1 = MakeVectorE0(A);
  436. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  437. CompareAgainstUnicorn();
  438. }
  439. [Test, Pairwise, Description("CMLE <Vd>.<T>, <Vn>.<T>, #0")]
  440. public void Cmle_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  441. [Values(1u, 0u)] uint Rn,
  442. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  443. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  444. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  445. {
  446. uint Opcode = 0x6E209800; // CMLE V0.16B, V0.16B, #0
  447. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  448. Opcode |= ((size & 3) << 22);
  449. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  450. Vector128<float> V1 = MakeVectorE0E1(A, A);
  451. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  452. CompareAgainstUnicorn();
  453. }
  454. [Test, Pairwise, Description("CMLT <V><d>, <V><n>, #0")]
  455. public void Cmlt_S_D([Values(0u)] uint Rd,
  456. [Values(1u, 0u)] uint Rn,
  457. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  458. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  459. {
  460. uint Opcode = 0x5EE0A800; // CMLT D0, D0, #0
  461. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  462. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  463. Vector128<float> V1 = MakeVectorE0(A);
  464. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  465. CompareAgainstUnicorn();
  466. }
  467. [Test, Pairwise, Description("CMLT <Vd>.<T>, <Vn>.<T>, #0")]
  468. public void Cmlt_V_8B_4H_2S([Values(0u)] uint Rd,
  469. [Values(1u, 0u)] uint Rn,
  470. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  471. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  472. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  473. {
  474. uint Opcode = 0x0E20A800; // CMLT V0.8B, V0.8B, #0
  475. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  476. Opcode |= ((size & 3) << 22);
  477. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  478. Vector128<float> V1 = MakeVectorE0(A);
  479. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  480. CompareAgainstUnicorn();
  481. }
  482. [Test, Pairwise, Description("CMLT <Vd>.<T>, <Vn>.<T>, #0")]
  483. public void Cmlt_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  484. [Values(1u, 0u)] uint Rn,
  485. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  486. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  487. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  488. {
  489. uint Opcode = 0x4E20A800; // CMLT V0.16B, V0.16B, #0
  490. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  491. Opcode |= ((size & 3) << 22);
  492. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  493. Vector128<float> V1 = MakeVectorE0E1(A, A);
  494. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  495. CompareAgainstUnicorn();
  496. }
  497. [Test, Pairwise, Description("CNT <Vd>.<T>, <Vn>.<T>")]
  498. public void Cnt_V_8B([Values(0u)] uint Rd,
  499. [Values(1u, 0u)] uint Rn,
  500. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  501. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  502. {
  503. uint Opcode = 0x0E205800; // CNT V0.8B, V0.8B
  504. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  505. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  506. Vector128<float> V1 = MakeVectorE0(A);
  507. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  508. CompareAgainstUnicorn();
  509. }
  510. [Test, Pairwise, Description("CNT <Vd>.<T>, <Vn>.<T>")]
  511. public void Cnt_V_16B([Values(0u)] uint Rd,
  512. [Values(1u, 0u)] uint Rn,
  513. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  514. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  515. {
  516. uint Opcode = 0x4E205800; // CNT V0.16B, V0.16B
  517. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  518. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  519. Vector128<float> V1 = MakeVectorE0E1(A, A);
  520. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  521. CompareAgainstUnicorn();
  522. }
  523. [Test, Pairwise, Description("FCVTNS <V><d>, <V><n>")]
  524. public void Fcvtns_S_S([Values(0u)] uint Rd,
  525. [Values(1u, 0u)] uint Rn,
  526. [ValueSource("_1S_F_")] [Random(RndCnt)] ulong Z,
  527. [ValueSource("_1S_F_")] [Random(RndCnt)] ulong A)
  528. {
  529. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  530. uint Opcode = 0x5E21A800; // FCVTNS S0, S0
  531. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  532. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  533. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  534. Vector128<float> V1 = MakeVectorE0(A);
  535. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  536. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  537. }
  538. [Test, Pairwise, Description("FCVTNS <V><d>, <V><n>")]
  539. public void Fcvtns_S_D([Values(0u)] uint Rd,
  540. [Values(1u, 0u)] uint Rn,
  541. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong Z,
  542. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong A)
  543. {
  544. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  545. uint Opcode = 0x5E61A800; // FCVTNS D0, D0
  546. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  547. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  548. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  549. Vector128<float> V1 = MakeVectorE0(A);
  550. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  551. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  552. }
  553. [Test, Pairwise, Description("FCVTNS <Vd>.<T>, <Vn>.<T>")]
  554. public void Fcvtns_V_2S_4S([Values(0u)] uint Rd,
  555. [Values(1u, 0u)] uint Rn,
  556. [ValueSource("_2S_F_")] [Random(RndCnt)] ulong Z,
  557. [ValueSource("_2S_F_")] [Random(RndCnt)] ulong A,
  558. [Values(0b0u, 0b1u)] uint Q) // <2S, 4S>
  559. {
  560. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  561. uint Opcode = 0x0E21A800; // FCVTNS V0.2S, V0.2S
  562. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  563. Opcode |= ((Q & 1) << 30);
  564. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  565. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  566. Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
  567. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  568. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  569. }
  570. [Test, Pairwise, Description("FCVTNS <Vd>.<T>, <Vn>.<T>")]
  571. public void Fcvtns_V_2D([Values(0u)] uint Rd,
  572. [Values(1u, 0u)] uint Rn,
  573. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong Z,
  574. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong A)
  575. {
  576. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  577. uint Opcode = 0x4E61A800; // FCVTNS V0.2D, V0.2D
  578. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  579. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  580. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  581. Vector128<float> V1 = MakeVectorE0E1(A, A);
  582. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  583. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  584. }
  585. [Test, Pairwise, Description("FCVTNU <V><d>, <V><n>")]
  586. public void Fcvtnu_S_S([Values(0u)] uint Rd,
  587. [Values(1u, 0u)] uint Rn,
  588. [ValueSource("_1S_F_")] [Random(RndCnt)] ulong Z,
  589. [ValueSource("_1S_F_")] [Random(RndCnt)] ulong A)
  590. {
  591. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  592. uint Opcode = 0x7E21A800; // FCVTNU S0, S0
  593. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  594. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  595. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  596. Vector128<float> V1 = MakeVectorE0(A);
  597. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  598. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  599. }
  600. [Test, Pairwise, Description("FCVTNU <V><d>, <V><n>")]
  601. public void Fcvtnu_S_D([Values(0u)] uint Rd,
  602. [Values(1u, 0u)] uint Rn,
  603. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong Z,
  604. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong A)
  605. {
  606. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  607. uint Opcode = 0x7E61A800; // FCVTNU D0, D0
  608. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  609. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  610. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  611. Vector128<float> V1 = MakeVectorE0(A);
  612. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  613. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  614. }
  615. [Test, Pairwise, Description("FCVTNU <Vd>.<T>, <Vn>.<T>")]
  616. public void Fcvtnu_V_2S_4S([Values(0u)] uint Rd,
  617. [Values(1u, 0u)] uint Rn,
  618. [ValueSource("_2S_F_")] [Random(RndCnt)] ulong Z,
  619. [ValueSource("_2S_F_")] [Random(RndCnt)] ulong A,
  620. [Values(0b0u, 0b1u)] uint Q) // <2S, 4S>
  621. {
  622. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  623. uint Opcode = 0x2E21A800; // FCVTNU V0.2S, V0.2S
  624. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  625. Opcode |= ((Q & 1) << 30);
  626. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  627. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  628. Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
  629. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  630. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  631. }
  632. [Test, Pairwise, Description("FCVTNU <Vd>.<T>, <Vn>.<T>")]
  633. public void Fcvtnu_V_2D([Values(0u)] uint Rd,
  634. [Values(1u, 0u)] uint Rn,
  635. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong Z,
  636. [ValueSource("_1D_F_")] [Random(RndCnt)] ulong A)
  637. {
  638. //const int FZFlagBit = 24; // Flush-to-zero mode control bit.
  639. uint Opcode = 0x6E61A800; // FCVTNU V0.2D, V0.2D
  640. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  641. //int Fpcr = 1 << FZFlagBit; // Flush-to-zero mode enabled.
  642. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  643. Vector128<float> V1 = MakeVectorE0E1(A, A);
  644. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1/*, Fpcr: Fpcr*/);
  645. CompareAgainstUnicorn(/*FpsrMask: FPSR.IDC | FPSR.IXC | FPSR.IOC*/);
  646. }
  647. [Test, Pairwise, Description("NEG <V><d>, <V><n>")]
  648. public void Neg_S_D([Values(0u)] uint Rd,
  649. [Values(1u, 0u)] uint Rn,
  650. [ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
  651. [ValueSource("_1D_")] [Random(RndCnt)] ulong A)
  652. {
  653. uint Opcode = 0x7EE0B800; // NEG D0, D0
  654. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  655. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  656. Vector128<float> V1 = MakeVectorE0(A);
  657. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  658. CompareAgainstUnicorn();
  659. }
  660. [Test, Pairwise, Description("NEG <Vd>.<T>, <Vn>.<T>")]
  661. public void Neg_V_8B_4H_2S([Values(0u)] uint Rd,
  662. [Values(1u, 0u)] uint Rn,
  663. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  664. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  665. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  666. {
  667. uint Opcode = 0x2E20B800; // NEG V0.8B, V0.8B
  668. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  669. Opcode |= ((size & 3) << 22);
  670. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  671. Vector128<float> V1 = MakeVectorE0(A);
  672. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  673. CompareAgainstUnicorn();
  674. }
  675. [Test, Pairwise, Description("NEG <Vd>.<T>, <Vn>.<T>")]
  676. public void Neg_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  677. [Values(1u, 0u)] uint Rn,
  678. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  679. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  680. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  681. {
  682. uint Opcode = 0x6E20B800; // NEG V0.16B, V0.16B
  683. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  684. Opcode |= ((size & 3) << 22);
  685. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  686. Vector128<float> V1 = MakeVectorE0E1(A, A);
  687. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  688. CompareAgainstUnicorn();
  689. }
  690. [Test, Pairwise, Description("NOT <Vd>.<T>, <Vn>.<T>")]
  691. public void Not_V_8B([Values(0u)] uint Rd,
  692. [Values(1u, 0u)] uint Rn,
  693. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  694. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  695. {
  696. uint Opcode = 0x2E205800; // NOT V0.8B, V0.8B
  697. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  698. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  699. Vector128<float> V1 = MakeVectorE0(A);
  700. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  701. CompareAgainstUnicorn();
  702. }
  703. [Test, Pairwise, Description("NOT <Vd>.<T>, <Vn>.<T>")]
  704. public void Not_V_16B([Values(0u)] uint Rd,
  705. [Values(1u, 0u)] uint Rn,
  706. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  707. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  708. {
  709. uint Opcode = 0x6E205800; // NOT V0.16B, V0.16B
  710. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  711. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  712. Vector128<float> V1 = MakeVectorE0E1(A, A);
  713. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  714. CompareAgainstUnicorn();
  715. }
  716. [Test, Pairwise, Description("RBIT <Vd>.<T>, <Vn>.<T>")]
  717. public void Rbit_V_8B([Values(0u)] uint Rd,
  718. [Values(1u, 0u)] uint Rn,
  719. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  720. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  721. {
  722. uint Opcode = 0x2E605800; // RBIT V0.8B, V0.8B
  723. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  724. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  725. Vector128<float> V1 = MakeVectorE0(A);
  726. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  727. CompareAgainstUnicorn();
  728. }
  729. [Test, Pairwise, Description("RBIT <Vd>.<T>, <Vn>.<T>")]
  730. public void Rbit_V_16B([Values(0u)] uint Rd,
  731. [Values(1u, 0u)] uint Rn,
  732. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  733. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  734. {
  735. uint Opcode = 0x6E605800; // RBIT V0.16B, V0.16B
  736. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  737. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  738. Vector128<float> V1 = MakeVectorE0E1(A, A);
  739. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  740. CompareAgainstUnicorn();
  741. }
  742. [Test, Pairwise, Description("REV16 <Vd>.<T>, <Vn>.<T>")]
  743. public void Rev16_V_8B([Values(0u)] uint Rd,
  744. [Values(1u, 0u)] uint Rn,
  745. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  746. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  747. {
  748. uint Opcode = 0x0E201800; // REV16 V0.8B, V0.8B
  749. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  750. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  751. Vector128<float> V1 = MakeVectorE0(A);
  752. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  753. CompareAgainstUnicorn();
  754. }
  755. [Test, Pairwise, Description("REV16 <Vd>.<T>, <Vn>.<T>")]
  756. public void Rev16_V_16B([Values(0u)] uint Rd,
  757. [Values(1u, 0u)] uint Rn,
  758. [ValueSource("_8B_")] [Random(RndCnt)] ulong Z,
  759. [ValueSource("_8B_")] [Random(RndCnt)] ulong A)
  760. {
  761. uint Opcode = 0x4E201800; // REV16 V0.16B, V0.16B
  762. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  763. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  764. Vector128<float> V1 = MakeVectorE0E1(A, A);
  765. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  766. CompareAgainstUnicorn();
  767. }
  768. [Test, Pairwise, Description("REV32 <Vd>.<T>, <Vn>.<T>")]
  769. public void Rev32_V_8B_4H([Values(0u)] uint Rd,
  770. [Values(1u, 0u)] uint Rn,
  771. [ValueSource("_8B4H_")] [Random(RndCnt)] ulong Z,
  772. [ValueSource("_8B4H_")] [Random(RndCnt)] ulong A,
  773. [Values(0b00u, 0b01u)] uint size) // <8B, 4H>
  774. {
  775. uint Opcode = 0x2E200800; // REV32 V0.8B, V0.8B
  776. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  777. Opcode |= ((size & 3) << 22);
  778. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  779. Vector128<float> V1 = MakeVectorE0(A);
  780. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  781. CompareAgainstUnicorn();
  782. }
  783. [Test, Pairwise, Description("REV32 <Vd>.<T>, <Vn>.<T>")]
  784. public void Rev32_V_16B_8H([Values(0u)] uint Rd,
  785. [Values(1u, 0u)] uint Rn,
  786. [ValueSource("_8B4H_")] [Random(RndCnt)] ulong Z,
  787. [ValueSource("_8B4H_")] [Random(RndCnt)] ulong A,
  788. [Values(0b00u, 0b01u)] uint size) // <16B, 8H>
  789. {
  790. uint Opcode = 0x6E200800; // REV32 V0.16B, V0.16B
  791. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  792. Opcode |= ((size & 3) << 22);
  793. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  794. Vector128<float> V1 = MakeVectorE0E1(A, A);
  795. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  796. CompareAgainstUnicorn();
  797. }
  798. [Test, Pairwise, Description("REV64 <Vd>.<T>, <Vn>.<T>")]
  799. public void Rev64_V_8B_4H_2S([Values(0u)] uint Rd,
  800. [Values(1u, 0u)] uint Rn,
  801. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  802. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  803. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  804. {
  805. uint Opcode = 0x0E200800; // REV64 V0.8B, V0.8B
  806. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  807. Opcode |= ((size & 3) << 22);
  808. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  809. Vector128<float> V1 = MakeVectorE0(A);
  810. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  811. CompareAgainstUnicorn();
  812. }
  813. [Test, Pairwise, Description("REV64 <Vd>.<T>, <Vn>.<T>")]
  814. public void Rev64_V_16B_8H_4S([Values(0u)] uint Rd,
  815. [Values(1u, 0u)] uint Rn,
  816. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  817. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  818. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16B, 8H, 4S>
  819. {
  820. uint Opcode = 0x4E200800; // REV64 V0.16B, V0.16B
  821. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  822. Opcode |= ((size & 3) << 22);
  823. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  824. Vector128<float> V1 = MakeVectorE0E1(A, A);
  825. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  826. CompareAgainstUnicorn();
  827. }
  828. [Test, Pairwise, Description("SADALP <Vd>.<Ta>, <Vn>.<Tb>")]
  829. public void Sadalp_V_8B4H_4H2S_2S1D([Values(0u)] uint Rd,
  830. [Values(1u, 0u)] uint Rn,
  831. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  832. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  833. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B4H, 4H2S, 2S1D>
  834. {
  835. uint Opcode = 0x0E206800; // SADALP V0.4H, V0.8B
  836. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  837. Opcode |= ((size & 3) << 22);
  838. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  839. Vector128<float> V1 = MakeVectorE0(A);
  840. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  841. CompareAgainstUnicorn();
  842. }
  843. [Test, Pairwise, Description("SADALP <Vd>.<Ta>, <Vn>.<Tb>")]
  844. public void Sadalp_V_16B8H_8H4S_4S2D([Values(0u)] uint Rd,
  845. [Values(1u, 0u)] uint Rn,
  846. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  847. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  848. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16B8H, 8H4S, 4S2D>
  849. {
  850. uint Opcode = 0x4E206800; // SADALP V0.8H, V0.16B
  851. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  852. Opcode |= ((size & 3) << 22);
  853. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  854. Vector128<float> V1 = MakeVectorE0E1(A, A);
  855. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  856. CompareAgainstUnicorn();
  857. }
  858. [Test, Pairwise, Description("SADDLP <Vd>.<Ta>, <Vn>.<Tb>")]
  859. public void Saddlp_V_8B4H_4H2S_2S1D([Values(0u)] uint Rd,
  860. [Values(1u, 0u)] uint Rn,
  861. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  862. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  863. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B4H, 4H2S, 2S1D>
  864. {
  865. uint Opcode = 0x0E202800; // SADDLP V0.4H, V0.8B
  866. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  867. Opcode |= ((size & 3) << 22);
  868. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  869. Vector128<float> V1 = MakeVectorE0(A);
  870. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  871. CompareAgainstUnicorn();
  872. }
  873. [Test, Pairwise, Description("SADDLP <Vd>.<Ta>, <Vn>.<Tb>")]
  874. public void Saddlp_V_16B8H_8H4S_4S2D([Values(0u)] uint Rd,
  875. [Values(1u, 0u)] uint Rn,
  876. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  877. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  878. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16B8H, 8H4S, 4S2D>
  879. {
  880. uint Opcode = 0x4E202800; // SADDLP V0.8H, V0.16B
  881. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  882. Opcode |= ((size & 3) << 22);
  883. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  884. Vector128<float> V1 = MakeVectorE0E1(A, A);
  885. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  886. CompareAgainstUnicorn();
  887. }
  888. [Test, Pairwise, Description("SHA256SU0 <Vd>.4S, <Vn>.4S")]
  889. public void Sha256su0_V([Values(0u)] uint Rd,
  890. [Values(1u, 0u)] uint Rn,
  891. [Random(RndCnt / 2)] ulong Z0, [Random(RndCnt / 2)] ulong Z1,
  892. [Random(RndCnt / 2)] ulong A0, [Random(RndCnt / 2)] ulong A1)
  893. {
  894. uint Opcode = 0x5E282800; // SHA256SU0 V0.4S, V0.4S
  895. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  896. Vector128<float> V0 = MakeVectorE0E1(Z0, Z1);
  897. Vector128<float> V1 = MakeVectorE0E1(A0, A1);
  898. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  899. CompareAgainstUnicorn();
  900. }
  901. [Test, Pairwise, Description("SQABS <V><d>, <V><n>")]
  902. public void Sqabs_S_B_H_S_D([Values(0u)] uint Rd,
  903. [Values(1u, 0u)] uint Rn,
  904. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong Z,
  905. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong A,
  906. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <B, H, S, D>
  907. {
  908. uint Opcode = 0x5E207800; // SQABS B0, B0
  909. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  910. Opcode |= ((size & 3) << 22);
  911. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  912. Vector128<float> V1 = MakeVectorE0(A);
  913. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  914. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  915. }
  916. [Test, Pairwise, Description("SQABS <Vd>.<T>, <Vn>.<T>")]
  917. public void Sqabs_V_8B_4H_2S([Values(0u)] uint Rd,
  918. [Values(1u, 0u)] uint Rn,
  919. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  920. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  921. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  922. {
  923. uint Opcode = 0x0E207800; // SQABS V0.8B, V0.8B
  924. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  925. Opcode |= ((size & 3) << 22);
  926. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  927. Vector128<float> V1 = MakeVectorE0(A);
  928. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  929. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  930. }
  931. [Test, Pairwise, Description("SQABS <Vd>.<T>, <Vn>.<T>")]
  932. public void Sqabs_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  933. [Values(1u, 0u)] uint Rn,
  934. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  935. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  936. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  937. {
  938. uint Opcode = 0x4E207800; // SQABS V0.16B, V0.16B
  939. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  940. Opcode |= ((size & 3) << 22);
  941. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  942. Vector128<float> V1 = MakeVectorE0E1(A, A);
  943. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  944. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  945. }
  946. [Test, Pairwise, Description("SQNEG <V><d>, <V><n>")]
  947. public void Sqneg_S_B_H_S_D([Values(0u)] uint Rd,
  948. [Values(1u, 0u)] uint Rn,
  949. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong Z,
  950. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong A,
  951. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <B, H, S, D>
  952. {
  953. uint Opcode = 0x7E207800; // SQNEG B0, B0
  954. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  955. Opcode |= ((size & 3) << 22);
  956. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  957. Vector128<float> V1 = MakeVectorE0(A);
  958. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  959. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  960. }
  961. [Test, Pairwise, Description("SQNEG <Vd>.<T>, <Vn>.<T>")]
  962. public void Sqneg_V_8B_4H_2S([Values(0u)] uint Rd,
  963. [Values(1u, 0u)] uint Rn,
  964. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  965. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  966. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  967. {
  968. uint Opcode = 0x2E207800; // SQNEG V0.8B, V0.8B
  969. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  970. Opcode |= ((size & 3) << 22);
  971. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  972. Vector128<float> V1 = MakeVectorE0(A);
  973. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  974. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  975. }
  976. [Test, Pairwise, Description("SQNEG <Vd>.<T>, <Vn>.<T>")]
  977. public void Sqneg_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  978. [Values(1u, 0u)] uint Rn,
  979. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  980. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  981. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  982. {
  983. uint Opcode = 0x6E207800; // SQNEG V0.16B, V0.16B
  984. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  985. Opcode |= ((size & 3) << 22);
  986. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  987. Vector128<float> V1 = MakeVectorE0E1(A, A);
  988. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  989. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  990. }
  991. [Test, Pairwise, Description("SQXTN <Vb><d>, <Va><n>")]
  992. public void Sqxtn_S_HB_SH_DS([Values(0u)] uint Rd,
  993. [Values(1u, 0u)] uint Rn,
  994. [ValueSource("_1H1S1D_")] [Random(RndCnt)] ulong Z,
  995. [ValueSource("_1H1S1D_")] [Random(RndCnt)] ulong A,
  996. [Values(0b00u, 0b01u, 0b10u)] uint size) // <HB, SH, DS>
  997. {
  998. uint Opcode = 0x5E214800; // SQXTN B0, H0
  999. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1000. Opcode |= ((size & 3) << 22);
  1001. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1002. Vector128<float> V1 = MakeVectorE0(A);
  1003. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1004. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1005. }
  1006. [Test, Pairwise, Description("SQXTN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1007. public void Sqxtn_V_8H8B_4S4H_2D2S([Values(0u)] uint Rd,
  1008. [Values(1u, 0u)] uint Rn,
  1009. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1010. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1011. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H8B, 4S4H, 2D2S>
  1012. {
  1013. uint Opcode = 0x0E214800; // SQXTN V0.8B, V0.8H
  1014. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1015. Opcode |= ((size & 3) << 22);
  1016. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1017. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1018. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1019. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1020. }
  1021. [Test, Pairwise, Description("SQXTN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1022. public void Sqxtn_V_8H16B_4S8H_2D4S([Values(0u)] uint Rd,
  1023. [Values(1u, 0u)] uint Rn,
  1024. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1025. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1026. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H16B, 4S8H, 2D4S>
  1027. {
  1028. uint Opcode = 0x4E214800; // SQXTN2 V0.16B, V0.8H
  1029. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1030. Opcode |= ((size & 3) << 22);
  1031. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1032. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1033. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1034. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1035. }
  1036. [Test, Pairwise, Description("SQXTUN <Vb><d>, <Va><n>")]
  1037. public void Sqxtun_S_HB_SH_DS([Values(0u)] uint Rd,
  1038. [Values(1u, 0u)] uint Rn,
  1039. [ValueSource("_1H1S1D_")] [Random(RndCnt)] ulong Z,
  1040. [ValueSource("_1H1S1D_")] [Random(RndCnt)] ulong A,
  1041. [Values(0b00u, 0b01u, 0b10u)] uint size) // <HB, SH, DS>
  1042. {
  1043. uint Opcode = 0x7E212800; // SQXTUN B0, H0
  1044. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1045. Opcode |= ((size & 3) << 22);
  1046. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1047. Vector128<float> V1 = MakeVectorE0(A);
  1048. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1049. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1050. }
  1051. [Test, Pairwise, Description("SQXTUN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1052. public void Sqxtun_V_8H8B_4S4H_2D2S([Values(0u)] uint Rd,
  1053. [Values(1u, 0u)] uint Rn,
  1054. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1055. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1056. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H8B, 4S4H, 2D2S>
  1057. {
  1058. uint Opcode = 0x2E212800; // SQXTUN V0.8B, V0.8H
  1059. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1060. Opcode |= ((size & 3) << 22);
  1061. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1062. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1063. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1064. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1065. }
  1066. [Test, Pairwise, Description("SQXTUN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1067. public void Sqxtun_V_8H16B_4S8H_2D4S([Values(0u)] uint Rd,
  1068. [Values(1u, 0u)] uint Rn,
  1069. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1070. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1071. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H16B, 4S8H, 2D4S>
  1072. {
  1073. uint Opcode = 0x6E212800; // SQXTUN2 V0.16B, V0.8H
  1074. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1075. Opcode |= ((size & 3) << 22);
  1076. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1077. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1078. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1079. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1080. }
  1081. [Test, Pairwise, Description("SUQADD <V><d>, <V><n>")]
  1082. public void Suqadd_S_B_H_S_D([Values(0u)] uint Rd,
  1083. [Values(1u, 0u)] uint Rn,
  1084. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong Z,
  1085. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong A,
  1086. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <B, H, S, D>
  1087. {
  1088. uint Opcode = 0x5E203800; // SUQADD B0, B0
  1089. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1090. Opcode |= ((size & 3) << 22);
  1091. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1092. Vector128<float> V1 = MakeVectorE0(A);
  1093. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1094. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1095. }
  1096. [Test, Pairwise, Description("SUQADD <Vd>.<T>, <Vn>.<T>")]
  1097. public void Suqadd_V_8B_4H_2S([Values(0u)] uint Rd,
  1098. [Values(1u, 0u)] uint Rn,
  1099. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  1100. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  1101. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  1102. {
  1103. uint Opcode = 0x0E203800; // SUQADD V0.8B, V0.8B
  1104. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1105. Opcode |= ((size & 3) << 22);
  1106. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1107. Vector128<float> V1 = MakeVectorE0(A);
  1108. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1109. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1110. }
  1111. [Test, Pairwise, Description("SUQADD <Vd>.<T>, <Vn>.<T>")]
  1112. public void Suqadd_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  1113. [Values(1u, 0u)] uint Rn,
  1114. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  1115. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  1116. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  1117. {
  1118. uint Opcode = 0x4E203800; // SUQADD V0.16B, V0.16B
  1119. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1120. Opcode |= ((size & 3) << 22);
  1121. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1122. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1123. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1124. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1125. }
  1126. [Test, Pairwise, Description("UADALP <Vd>.<Ta>, <Vn>.<Tb>")]
  1127. public void Uadalp_V_8B4H_4H2S_2S1D([Values(0u)] uint Rd,
  1128. [Values(1u, 0u)] uint Rn,
  1129. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  1130. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  1131. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B4H, 4H2S, 2S1D>
  1132. {
  1133. uint Opcode = 0x2E206800; // UADALP V0.4H, V0.8B
  1134. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1135. Opcode |= ((size & 3) << 22);
  1136. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1137. Vector128<float> V1 = MakeVectorE0(A);
  1138. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1139. CompareAgainstUnicorn();
  1140. }
  1141. [Test, Pairwise, Description("UADALP <Vd>.<Ta>, <Vn>.<Tb>")]
  1142. public void Uadalp_V_16B8H_8H4S_4S2D([Values(0u)] uint Rd,
  1143. [Values(1u, 0u)] uint Rn,
  1144. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  1145. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  1146. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16B8H, 8H4S, 4S2D>
  1147. {
  1148. uint Opcode = 0x6E206800; // UADALP V0.8H, V0.16B
  1149. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1150. Opcode |= ((size & 3) << 22);
  1151. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1152. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1153. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1154. CompareAgainstUnicorn();
  1155. }
  1156. [Test, Pairwise, Description("UADDLP <Vd>.<Ta>, <Vn>.<Tb>")]
  1157. public void Uaddlp_V_8B4H_4H2S_2S1D([Values(0u)] uint Rd,
  1158. [Values(1u, 0u)] uint Rn,
  1159. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  1160. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  1161. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B4H, 4H2S, 2S1D>
  1162. {
  1163. uint Opcode = 0x2E202800; // UADDLP V0.4H, V0.8B
  1164. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1165. Opcode |= ((size & 3) << 22);
  1166. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1167. Vector128<float> V1 = MakeVectorE0(A);
  1168. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1169. CompareAgainstUnicorn();
  1170. }
  1171. [Test, Pairwise, Description("UADDLP <Vd>.<Ta>, <Vn>.<Tb>")]
  1172. public void Uaddlp_V_16B8H_8H4S_4S2D([Values(0u)] uint Rd,
  1173. [Values(1u, 0u)] uint Rn,
  1174. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  1175. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  1176. [Values(0b00u, 0b01u, 0b10u)] uint size) // <16B8H, 8H4S, 4S2D>
  1177. {
  1178. uint Opcode = 0x6E202800; // UADDLP V0.8H, V0.16B
  1179. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1180. Opcode |= ((size & 3) << 22);
  1181. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1182. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1183. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1184. CompareAgainstUnicorn();
  1185. }
  1186. [Test, Pairwise, Description("UQXTN <Vb><d>, <Va><n>")]
  1187. public void Uqxtn_S_HB_SH_DS([Values(0u)] uint Rd,
  1188. [Values(1u, 0u)] uint Rn,
  1189. [ValueSource("_1H1S1D_")] [Random(RndCnt)] ulong Z,
  1190. [ValueSource("_1H1S1D_")] [Random(RndCnt)] ulong A,
  1191. [Values(0b00u, 0b01u, 0b10u)] uint size) // <HB, SH, DS>
  1192. {
  1193. uint Opcode = 0x7E214800; // UQXTN B0, H0
  1194. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1195. Opcode |= ((size & 3) << 22);
  1196. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1197. Vector128<float> V1 = MakeVectorE0(A);
  1198. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1199. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1200. }
  1201. [Test, Pairwise, Description("UQXTN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1202. public void Uqxtn_V_8H8B_4S4H_2D2S([Values(0u)] uint Rd,
  1203. [Values(1u, 0u)] uint Rn,
  1204. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1205. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1206. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H8B, 4S4H, 2D2S>
  1207. {
  1208. uint Opcode = 0x2E214800; // UQXTN V0.8B, V0.8H
  1209. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1210. Opcode |= ((size & 3) << 22);
  1211. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1212. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1213. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1214. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1215. }
  1216. [Test, Pairwise, Description("UQXTN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1217. public void Uqxtn_V_8H16B_4S8H_2D4S([Values(0u)] uint Rd,
  1218. [Values(1u, 0u)] uint Rn,
  1219. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1220. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1221. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H16B, 4S8H, 2D4S>
  1222. {
  1223. uint Opcode = 0x6E214800; // UQXTN2 V0.16B, V0.8H
  1224. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1225. Opcode |= ((size & 3) << 22);
  1226. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1227. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1228. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1229. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1230. }
  1231. [Test, Pairwise, Description("USQADD <V><d>, <V><n>")]
  1232. public void Usqadd_S_B_H_S_D([Values(0u)] uint Rd,
  1233. [Values(1u, 0u)] uint Rn,
  1234. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong Z,
  1235. [ValueSource("_1B1H1S1D_")] [Random(RndCnt)] ulong A,
  1236. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <B, H, S, D>
  1237. {
  1238. uint Opcode = 0x7E203800; // USQADD B0, B0
  1239. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1240. Opcode |= ((size & 3) << 22);
  1241. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1242. Vector128<float> V1 = MakeVectorE0(A);
  1243. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1244. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1245. }
  1246. [Test, Pairwise, Description("USQADD <Vd>.<T>, <Vn>.<T>")]
  1247. public void Usqadd_V_8B_4H_2S([Values(0u)] uint Rd,
  1248. [Values(1u, 0u)] uint Rn,
  1249. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong Z,
  1250. [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
  1251. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
  1252. {
  1253. uint Opcode = 0x2E203800; // USQADD V0.8B, V0.8B
  1254. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1255. Opcode |= ((size & 3) << 22);
  1256. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1257. Vector128<float> V1 = MakeVectorE0(A);
  1258. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1259. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1260. }
  1261. [Test, Pairwise, Description("USQADD <Vd>.<T>, <Vn>.<T>")]
  1262. public void Usqadd_V_16B_8H_4S_2D([Values(0u)] uint Rd,
  1263. [Values(1u, 0u)] uint Rn,
  1264. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong Z,
  1265. [ValueSource("_8B4H2S1D_")] [Random(RndCnt)] ulong A,
  1266. [Values(0b00u, 0b01u, 0b10u, 0b11u)] uint size) // <16B, 8H, 4S, 2D>
  1267. {
  1268. uint Opcode = 0x6E203800; // USQADD V0.16B, V0.16B
  1269. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1270. Opcode |= ((size & 3) << 22);
  1271. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1272. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1273. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1274. CompareAgainstUnicorn(FpsrMask: FPSR.QC);
  1275. }
  1276. [Test, Pairwise, Description("XTN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1277. public void Xtn_V_8H8B_4S4H_2D2S([Values(0u)] uint Rd,
  1278. [Values(1u, 0u)] uint Rn,
  1279. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1280. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1281. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H8B, 4S4H, 2D2S>
  1282. {
  1283. uint Opcode = 0x0E212800; // XTN V0.8B, V0.8H
  1284. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1285. Opcode |= ((size & 3) << 22);
  1286. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1287. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1288. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1289. CompareAgainstUnicorn();
  1290. }
  1291. [Test, Pairwise, Description("XTN{2} <Vd>.<Tb>, <Vn>.<Ta>")]
  1292. public void Xtn_V_8H16B_4S8H_2D4S([Values(0u)] uint Rd,
  1293. [Values(1u, 0u)] uint Rn,
  1294. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong Z,
  1295. [ValueSource("_4H2S1D_")] [Random(RndCnt)] ulong A,
  1296. [Values(0b00u, 0b01u, 0b10u)] uint size) // <8H16B, 4S8H, 2D4S>
  1297. {
  1298. uint Opcode = 0x4E212800; // XTN2 V0.16B, V0.8H
  1299. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  1300. Opcode |= ((size & 3) << 22);
  1301. Vector128<float> V0 = MakeVectorE0E1(Z, Z);
  1302. Vector128<float> V1 = MakeVectorE0E1(A, A);
  1303. AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
  1304. CompareAgainstUnicorn();
  1305. }
  1306. #endif
  1307. }
  1308. }