MacroInterpreter.cs 15 KB

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  1. using Ryujinx.Common.Logging;
  2. using Ryujinx.Graphics.Gpu.State;
  3. using System;
  4. using System.Collections.Generic;
  5. namespace Ryujinx.Graphics.Gpu
  6. {
  7. /// <summary>
  8. /// Macro code interpreter.
  9. /// </summary>
  10. class MacroInterpreter
  11. {
  12. private enum AssignmentOperation
  13. {
  14. IgnoreAndFetch = 0,
  15. Move = 1,
  16. MoveAndSetMaddr = 2,
  17. FetchAndSend = 3,
  18. MoveAndSend = 4,
  19. FetchAndSetMaddr = 5,
  20. MoveAndSetMaddrThenFetchAndSend = 6,
  21. MoveAndSetMaddrThenSendHigh = 7
  22. }
  23. private enum AluOperation
  24. {
  25. AluReg = 0,
  26. AddImmediate = 1,
  27. BitfieldReplace = 2,
  28. BitfieldExtractLslImm = 3,
  29. BitfieldExtractLslReg = 4,
  30. ReadImmediate = 5
  31. }
  32. private enum AluRegOperation
  33. {
  34. Add = 0,
  35. AddWithCarry = 1,
  36. Subtract = 2,
  37. SubtractWithBorrow = 3,
  38. BitwiseExclusiveOr = 8,
  39. BitwiseOr = 9,
  40. BitwiseAnd = 10,
  41. BitwiseAndNot = 11,
  42. BitwiseNotAnd = 12
  43. }
  44. public Queue<int> Fifo { get; }
  45. private int[] _gprs;
  46. private int _methAddr;
  47. private int _methIncr;
  48. private bool _carry;
  49. private int _opCode;
  50. private int _pipeOp;
  51. private bool _ignoreExitFlag;
  52. private int _pc;
  53. private ShadowRamControl _shadowCtrl;
  54. /// <summary>
  55. /// Creates a new instance of the macro code interpreter.
  56. /// </summary>
  57. public MacroInterpreter()
  58. {
  59. Fifo = new Queue<int>();
  60. _gprs = new int[8];
  61. }
  62. /// <summary>
  63. /// Executes a macro program until it exits.
  64. /// </summary>
  65. /// <param name="mme">Code of the program to execute</param>
  66. /// <param name="position">Start position to execute</param>
  67. /// <param name="param">Optional argument passed to the program, 0 if not used</param>
  68. /// <param name="shadowCtrl">Shadow RAM control register value</param>
  69. /// <param name="state">Current GPU state</param>
  70. public void Execute(int[] mme, int position, int param, ShadowRamControl shadowCtrl, GpuState state)
  71. {
  72. Reset();
  73. _gprs[1] = param;
  74. _pc = position;
  75. _shadowCtrl = shadowCtrl;
  76. FetchOpCode(mme);
  77. while (Step(mme, state));
  78. // Due to the delay slot, we still need to execute
  79. // one more instruction before we actually exit.
  80. Step(mme, state);
  81. }
  82. /// <summary>
  83. /// Resets the internal interpreter state.
  84. /// Call each time you run a new program.
  85. /// </summary>
  86. private void Reset()
  87. {
  88. for (int index = 0; index < _gprs.Length; index++)
  89. {
  90. _gprs[index] = 0;
  91. }
  92. _methAddr = 0;
  93. _methIncr = 0;
  94. _carry = false;
  95. }
  96. /// <summary>
  97. /// Executes a single instruction of the program.
  98. /// </summary>
  99. /// <param name="mme">Program code to execute</param>
  100. /// <param name="state">Current GPU state</param>
  101. /// <returns>True to continue execution, false if the program exited</returns>
  102. private bool Step(int[] mme, GpuState state)
  103. {
  104. int baseAddr = _pc - 1;
  105. FetchOpCode(mme);
  106. if ((_opCode & 7) < 7)
  107. {
  108. // Operation produces a value.
  109. AssignmentOperation asgOp = (AssignmentOperation)((_opCode >> 4) & 7);
  110. int result = GetAluResult(state);
  111. switch (asgOp)
  112. {
  113. // Fetch parameter and ignore result.
  114. case AssignmentOperation.IgnoreAndFetch:
  115. {
  116. SetDstGpr(FetchParam());
  117. break;
  118. }
  119. // Move result.
  120. case AssignmentOperation.Move:
  121. {
  122. SetDstGpr(result);
  123. break;
  124. }
  125. // Move result and use as Method Address.
  126. case AssignmentOperation.MoveAndSetMaddr:
  127. {
  128. SetDstGpr(result);
  129. SetMethAddr(result);
  130. break;
  131. }
  132. // Fetch parameter and send result.
  133. case AssignmentOperation.FetchAndSend:
  134. {
  135. SetDstGpr(FetchParam());
  136. Send(state, result);
  137. break;
  138. }
  139. // Move and send result.
  140. case AssignmentOperation.MoveAndSend:
  141. {
  142. SetDstGpr(result);
  143. Send(state, result);
  144. break;
  145. }
  146. // Fetch parameter and use result as Method Address.
  147. case AssignmentOperation.FetchAndSetMaddr:
  148. {
  149. SetDstGpr(FetchParam());
  150. SetMethAddr(result);
  151. break;
  152. }
  153. // Move result and use as Method Address, then fetch and send parameter.
  154. case AssignmentOperation.MoveAndSetMaddrThenFetchAndSend:
  155. {
  156. SetDstGpr(result);
  157. SetMethAddr(result);
  158. Send(state, FetchParam());
  159. break;
  160. }
  161. // Move result and use as Method Address, then send bits 17:12 of result.
  162. case AssignmentOperation.MoveAndSetMaddrThenSendHigh:
  163. {
  164. SetDstGpr(result);
  165. SetMethAddr(result);
  166. Send(state, (result >> 12) & 0x3f);
  167. break;
  168. }
  169. }
  170. }
  171. else
  172. {
  173. // Branch.
  174. bool onNotZero = ((_opCode >> 4) & 1) != 0;
  175. bool taken = onNotZero
  176. ? GetGprA() != 0
  177. : GetGprA() == 0;
  178. if (taken)
  179. {
  180. _pc = baseAddr + GetImm();
  181. bool noDelays = (_opCode & 0x20) != 0;
  182. if (noDelays)
  183. {
  184. FetchOpCode(mme);
  185. }
  186. else
  187. {
  188. // The delay slot instruction exit flag should be ignored.
  189. _ignoreExitFlag = true;
  190. }
  191. return true;
  192. }
  193. }
  194. bool exit = (_opCode & 0x80) != 0 && !_ignoreExitFlag;
  195. _ignoreExitFlag = false;
  196. return !exit;
  197. }
  198. /// <summary>
  199. /// Fetches a single operation code from the program code.
  200. /// </summary>
  201. /// <param name="mme">Program code</param>
  202. private void FetchOpCode(int[] mme)
  203. {
  204. _opCode = _pipeOp;
  205. _pipeOp = mme[_pc++];
  206. }
  207. /// <summary>
  208. /// Gets the result of the current Arithmetic and Logic unit operation.
  209. /// </summary>
  210. /// <param name="state">Current GPU state</param>
  211. /// <returns>Operation result</returns>
  212. private int GetAluResult(GpuState state)
  213. {
  214. AluOperation op = (AluOperation)(_opCode & 7);
  215. switch (op)
  216. {
  217. case AluOperation.AluReg:
  218. {
  219. AluRegOperation aluOp = (AluRegOperation)((_opCode >> 17) & 0x1f);
  220. return GetAluResult(aluOp, GetGprA(), GetGprB());
  221. }
  222. case AluOperation.AddImmediate:
  223. {
  224. return GetGprA() + GetImm();
  225. }
  226. case AluOperation.BitfieldReplace:
  227. case AluOperation.BitfieldExtractLslImm:
  228. case AluOperation.BitfieldExtractLslReg:
  229. {
  230. int bfSrcBit = (_opCode >> 17) & 0x1f;
  231. int bfSize = (_opCode >> 22) & 0x1f;
  232. int bfDstBit = (_opCode >> 27) & 0x1f;
  233. int bfMask = (1 << bfSize) - 1;
  234. int dst = GetGprA();
  235. int src = GetGprB();
  236. switch (op)
  237. {
  238. case AluOperation.BitfieldReplace:
  239. {
  240. src = (int)((uint)src >> bfSrcBit) & bfMask;
  241. dst &= ~(bfMask << bfDstBit);
  242. dst |= src << bfDstBit;
  243. return dst;
  244. }
  245. case AluOperation.BitfieldExtractLslImm:
  246. {
  247. src = (int)((uint)src >> dst) & bfMask;
  248. return src << bfDstBit;
  249. }
  250. case AluOperation.BitfieldExtractLslReg:
  251. {
  252. src = (int)((uint)src >> bfSrcBit) & bfMask;
  253. return src << dst;
  254. }
  255. }
  256. break;
  257. }
  258. case AluOperation.ReadImmediate:
  259. {
  260. return Read(state, GetGprA() + GetImm());
  261. }
  262. }
  263. throw new ArgumentException(nameof(_opCode));
  264. }
  265. /// <summary>
  266. /// Gets the result of an Arithmetic and Logic operation using registers.
  267. /// </summary>
  268. /// <param name="aluOp">Arithmetic and Logic unit operation with registers</param>
  269. /// <param name="a">First operand value</param>
  270. /// <param name="b">Second operand value</param>
  271. /// <returns>Operation result</returns>
  272. private int GetAluResult(AluRegOperation aluOp, int a, int b)
  273. {
  274. switch (aluOp)
  275. {
  276. case AluRegOperation.Add:
  277. {
  278. ulong result = (ulong)a + (ulong)b;
  279. _carry = result > 0xffffffff;
  280. return (int)result;
  281. }
  282. case AluRegOperation.AddWithCarry:
  283. {
  284. ulong result = (ulong)a + (ulong)b + (_carry ? 1UL : 0UL);
  285. _carry = result > 0xffffffff;
  286. return (int)result;
  287. }
  288. case AluRegOperation.Subtract:
  289. {
  290. ulong result = (ulong)a - (ulong)b;
  291. _carry = result < 0x100000000;
  292. return (int)result;
  293. }
  294. case AluRegOperation.SubtractWithBorrow:
  295. {
  296. ulong result = (ulong)a - (ulong)b - (_carry ? 0UL : 1UL);
  297. _carry = result < 0x100000000;
  298. return (int)result;
  299. }
  300. case AluRegOperation.BitwiseExclusiveOr: return a ^ b;
  301. case AluRegOperation.BitwiseOr: return a | b;
  302. case AluRegOperation.BitwiseAnd: return a & b;
  303. case AluRegOperation.BitwiseAndNot: return a & ~b;
  304. case AluRegOperation.BitwiseNotAnd: return ~(a & b);
  305. }
  306. throw new ArgumentOutOfRangeException(nameof(aluOp));
  307. }
  308. /// <summary>
  309. /// Extracts a 32-bits signed integer constant from the current operation code.
  310. /// </summary>
  311. /// <returns>The 32-bits immediate value encoded at the current operation code</returns>
  312. private int GetImm()
  313. {
  314. // Note: The immediate is signed, the sign-extension is intended here.
  315. return _opCode >> 14;
  316. }
  317. /// <summary>
  318. /// Sets the current method address, for method calls.
  319. /// </summary>
  320. /// <param name="value">Packed address and increment value</param>
  321. private void SetMethAddr(int value)
  322. {
  323. _methAddr = (value >> 0) & 0xfff;
  324. _methIncr = (value >> 12) & 0x3f;
  325. }
  326. /// <summary>
  327. /// Sets the destination register value.
  328. /// </summary>
  329. /// <param name="value">Value to set (usually the operation result)</param>
  330. private void SetDstGpr(int value)
  331. {
  332. _gprs[(_opCode >> 8) & 7] = value;
  333. }
  334. /// <summary>
  335. /// Gets first operand value from the respective register.
  336. /// </summary>
  337. /// <returns>Operand value</returns>
  338. private int GetGprA()
  339. {
  340. return GetGprValue((_opCode >> 11) & 7);
  341. }
  342. /// <summary>
  343. /// Gets second operand value from the respective register.
  344. /// </summary>
  345. /// <returns>Operand value</returns>
  346. private int GetGprB()
  347. {
  348. return GetGprValue((_opCode >> 14) & 7);
  349. }
  350. /// <summary>
  351. /// Gets the value from a register, or 0 if the R0 register is specified.
  352. /// </summary>
  353. /// <param name="index">Index of the register</param>
  354. /// <returns>Register value</returns>
  355. private int GetGprValue(int index)
  356. {
  357. return index != 0 ? _gprs[index] : 0;
  358. }
  359. /// <summary>
  360. /// Fetches a call argument from the call argument FIFO.
  361. /// </summary>
  362. /// <returns>The call argument, or 0 if the FIFO is empty</returns>
  363. private int FetchParam()
  364. {
  365. if (!Fifo.TryDequeue(out int value))
  366. {
  367. Logger.PrintWarning(LogClass.Gpu, "Macro attempted to fetch an inexistent argument.");
  368. return 0;
  369. }
  370. return value;
  371. }
  372. /// <summary>
  373. /// Reads data from a GPU register.
  374. /// </summary>
  375. /// <param name="state">Current GPU state</param>
  376. /// <param name="reg">Register offset to read</param>
  377. /// <returns>GPU register value</returns>
  378. private int Read(GpuState state, int reg)
  379. {
  380. return state.Read(reg);
  381. }
  382. /// <summary>
  383. /// Performs a GPU method call.
  384. /// </summary>
  385. /// <param name="state">Current GPU state</param>
  386. /// <param name="value">Call argument</param>
  387. private void Send(GpuState state, int value)
  388. {
  389. MethodParams meth = new MethodParams(_methAddr, value);
  390. state.CallMethod(meth, _shadowCtrl);
  391. _methAddr += _methIncr;
  392. }
  393. }
  394. }