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Decoder
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f43dd08064
Added support for more shader instructions and texture formats, fix swapped channels in RGB565 and RGBA5551? texture formats, allow zero values on blending registers, initial work to build CFG on the shader decoder, update the BRA instruction to work with it (WIP)
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8 lat temu |
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Decoder32
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9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
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8 lat temu |
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Events
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65105c2a3b
Implement SvcGetThreadContext3
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7 lat temu |
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Exceptions
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62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
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8 lat temu |
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Instruction
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741773910d
Add SMAXP, SMINP, UMAX, UMAXP, UMIN and UMINP cpu instructions (#200)
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7 lat temu |
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Instruction32
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9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
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8 lat temu |
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Memory
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3e6afeb513
Fix some thread sync issues (#172)
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7 lat temu |
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State
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65105c2a3b
Implement SvcGetThreadContext3
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7 lat temu |
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Translation
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741773910d
Add SMAXP, SMINP, UMAX, UMAXP, UMIN and UMINP cpu instructions (#200)
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7 lat temu |
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ABitUtils.cs
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62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
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8 lat temu |
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AOpCodeTable.cs
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741773910d
Add SMAXP, SMINP, UMAX, UMAXP, UMIN and UMINP cpu instructions (#200)
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7 lat temu |
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AOptimizations.cs
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8f6387128a
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
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7 lat temu |
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AThread.cs
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3e6afeb513
Fix some thread sync issues (#172)
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7 lat temu |
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ATranslatedSub.cs
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9227b0ea59
[CPU] Speed up translation a little bit
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8 lat temu |
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ATranslatedSubType.cs
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9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
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8 lat temu |
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ATranslator.cs
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9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
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8 lat temu |
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ChocolArm64.csproj
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2f25b34941
Add linux-x64 to RID property to make tests works on linux (#205)
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7 lat temu |
gdkchan
741773910d
Add SMAXP, SMINP, UMAX, UMAXP, UMIN and UMINP cpu instructions (#200)