| .. |
|
CryptoHelper.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitAlu.cs
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
|
il y a 6 ans |
|
InstEmitAlu32.cs
|
8a33e884f8
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)
|
il y a 5 ans |
|
InstEmitAluHelper.cs
|
61634dd415
Clear JIT cache on exit (#1518)
|
il y a 5 ans |
|
InstEmitBfm.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitCcmp.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitCsel.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitDiv.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitException.cs
|
6c9565693f
IPC refactor part 1: Use explicit separate threads to process requests (#1447)
|
il y a 5 ans |
|
InstEmitException32.cs
|
6c9565693f
IPC refactor part 1: Use explicit separate threads to process requests (#1447)
|
il y a 5 ans |
|
InstEmitFlow.cs
|
2421186d97
Generalize tail continues (#1298)
|
il y a 5 ans |
|
InstEmitFlow32.cs
|
2421186d97
Generalize tail continues (#1298)
|
il y a 5 ans |
|
InstEmitFlowHelper.cs
|
98ed81e4cd
Improve `StoreToContext` emission (#2155)
|
il y a 5 ans |
|
InstEmitHash.cs
|
d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
|
il y a 5 ans |
|
InstEmitHash32.cs
|
d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
|
il y a 5 ans |
|
InstEmitHashHelper.cs
|
d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
|
il y a 5 ans |
|
InstEmitHelper.cs
|
61634dd415
Clear JIT cache on exit (#1518)
|
il y a 5 ans |
|
InstEmitMemory.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitMemory32.cs
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
|
il y a 6 ans |
|
InstEmitMemoryEx.cs
|
c19cfca183
Implement PRFM (register variant) as NOP (#1956)
|
il y a 5 ans |
|
InstEmitMemoryEx32.cs
|
9878fc2d3c
Implement inline memory load/store exclusive and ordered (#1413)
|
il y a 5 ans |
|
InstEmitMemoryExHelper.cs
|
715b605e95
Validate CPU virtual addresses on access (#1987)
|
il y a 5 ans |
|
InstEmitMemoryHelper.cs
|
9d82d27df2
Fix memory tracking performance regression (#2026)
|
il y a 5 ans |
|
InstEmitMove.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitMul.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitMul32.cs
|
8a33e884f8
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)
|
il y a 5 ans |
|
InstEmitSimdArithmetic.cs
|
4bd1ad16f9
Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)
|
il y a 5 ans |
|
InstEmitSimdArithmetic32.cs
|
9bda7b4699
Implement VCNT instruction (#1963)
|
il y a 5 ans |
|
InstEmitSimdCmp.cs
|
e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
|
il y a 5 ans |
|
InstEmitSimdCmp32.cs
|
e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
|
il y a 5 ans |
|
InstEmitSimdCrypto.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
|
InstEmitSimdCrypto32.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
|
InstEmitSimdCvt.cs
|
0679084f11
CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)
|
il y a 5 ans |
|
InstEmitSimdCvt32.cs
|
e901b7850c
CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776)
|
il y a 5 ans |
|
InstEmitSimdHash.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
|
InstEmitSimdHelper.cs
|
4bd1ad16f9
Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)
|
il y a 5 ans |
|
InstEmitSimdHelper32.cs
|
430ba6da65
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)
|
il y a 5 ans |
|
InstEmitSimdLogical.cs
|
0915731a9d
Implemented fast paths for: (#846)
|
il y a 6 ans |
|
InstEmitSimdLogical32.cs
|
3af2ce74ec
Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)
|
il y a 5 ans |
|
InstEmitSimdMemory.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
InstEmitSimdMemory32.cs
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
|
il y a 6 ans |
|
InstEmitSimdMove.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
|
InstEmitSimdMove32.cs
|
6938988427
Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471)
|
il y a 5 ans |
|
InstEmitSimdShift.cs
|
a804db6eed
Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)
|
il y a 5 ans |
|
InstEmitSimdShift32.cs
|
04e330cc00
Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577)
|
il y a 5 ans |
|
InstEmitSystem.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
|
InstEmitSystem32.cs
|
e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
|
il y a 5 ans |
|
InstName.cs
|
4bd1ad16f9
Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)
|
il y a 5 ans |
|
NativeInterface.cs
|
b5c215111d
PPTC Follow-up. (#1712)
|
il y a 5 ans |
|
SoftFallback.cs
|
9bda7b4699
Implement VCNT instruction (#1963)
|
il y a 5 ans |
|
SoftFloat.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
FICTURE7