OpCode32SimdImm.cs 1.1 KB

1234567891011121314151617181920212223242526272829303132333435
  1. namespace ARMeilleure.Decoders
  2. {
  3. class OpCode32SimdImm : OpCode32SimdBase, IOpCode32SimdImm
  4. {
  5. public bool Q { get; private set; }
  6. public long Immediate { get; private set; }
  7. public int Elems => GetBytesCount() >> Size;
  8. public OpCode32SimdImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
  9. {
  10. Vd = (opCode >> 12) & 0xf;
  11. Vd |= (opCode >> 18) & 0x10;
  12. Q = ((opCode >> 6) & 0x1) > 0;
  13. int cMode = (opCode >> 8) & 0xf;
  14. int op = (opCode >> 5) & 0x1;
  15. long imm;
  16. imm = ((uint)opCode >> 0) & 0xf;
  17. imm |= ((uint)opCode >> 12) & 0x70;
  18. imm |= ((uint)opCode >> 17) & 0x80;
  19. (Immediate, Size) = OpCodeSimdHelper.GetSimdImmediateAndSize(cMode, op, imm);
  20. RegisterSize = Q ? RegisterSize.Simd128 : RegisterSize.Simd64;
  21. if (DecoderHelper.VectorArgumentsInvalid(Q, Vd))
  22. {
  23. Instruction = InstDescriptor.Undefined;
  24. }
  25. }
  26. }
  27. }