InstEmitSimdHelper.cs 48 KB

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  1. using ChocolArm64.Decoders;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection;
  6. using System.Reflection.Emit;
  7. using System.Runtime.Intrinsics;
  8. using System.Runtime.Intrinsics.X86;
  9. namespace ChocolArm64.Instructions
  10. {
  11. static class InstEmitSimdHelper
  12. {
  13. public static readonly Type[] IntTypesPerSizeLog2 = new Type[]
  14. {
  15. typeof(sbyte),
  16. typeof(short),
  17. typeof(int),
  18. typeof(long)
  19. };
  20. public static readonly Type[] UIntTypesPerSizeLog2 = new Type[]
  21. {
  22. typeof(byte),
  23. typeof(ushort),
  24. typeof(uint),
  25. typeof(ulong)
  26. };
  27. public static readonly Type[] VectorIntTypesPerSizeLog2 = new Type[]
  28. {
  29. typeof(Vector128<sbyte>),
  30. typeof(Vector128<short>),
  31. typeof(Vector128<int>),
  32. typeof(Vector128<long>)
  33. };
  34. public static readonly Type[] VectorUIntTypesPerSizeLog2 = new Type[]
  35. {
  36. typeof(Vector128<byte>),
  37. typeof(Vector128<ushort>),
  38. typeof(Vector128<uint>),
  39. typeof(Vector128<ulong>)
  40. };
  41. [Flags]
  42. public enum OperFlags
  43. {
  44. Rd = 1 << 0,
  45. Rn = 1 << 1,
  46. Rm = 1 << 2,
  47. Ra = 1 << 3,
  48. RnRm = Rn | Rm,
  49. RdRn = Rd | Rn,
  50. RaRnRm = Ra | Rn | Rm,
  51. RdRnRm = Rd | Rn | Rm
  52. }
  53. public static int GetImmShl(OpCodeSimdShImm64 op)
  54. {
  55. return op.Imm - (8 << op.Size);
  56. }
  57. public static int GetImmShr(OpCodeSimdShImm64 op)
  58. {
  59. return (8 << (op.Size + 1)) - op.Imm;
  60. }
  61. public static void EmitSse2Op(ILEmitterCtx context, string name)
  62. {
  63. EmitSseOp(context, name, typeof(Sse2));
  64. }
  65. public static void EmitSse41Op(ILEmitterCtx context, string name)
  66. {
  67. EmitSseOp(context, name, typeof(Sse41));
  68. }
  69. public static void EmitSse42Op(ILEmitterCtx context, string name)
  70. {
  71. EmitSseOp(context, name, typeof(Sse42));
  72. }
  73. private static void EmitSseOp(ILEmitterCtx context, string name, Type type)
  74. {
  75. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  76. context.EmitLdvec(op.Rn);
  77. Type baseType = VectorIntTypesPerSizeLog2[op.Size];
  78. if (op is OpCodeSimdReg64 binOp)
  79. {
  80. context.EmitLdvec(binOp.Rm);
  81. context.EmitCall(type.GetMethod(name, new Type[] { baseType, baseType }));
  82. }
  83. else
  84. {
  85. context.EmitCall(type.GetMethod(name, new Type[] { baseType }));
  86. }
  87. context.EmitStvec(op.Rd);
  88. if (op.RegisterSize == RegisterSize.Simd64)
  89. {
  90. EmitVectorZeroUpper(context, op.Rd);
  91. }
  92. }
  93. public static void EmitScalarSseOrSse2OpF(ILEmitterCtx context, string name)
  94. {
  95. EmitSseOrSse2OpF(context, name, true);
  96. }
  97. public static void EmitVectorSseOrSse2OpF(ILEmitterCtx context, string name)
  98. {
  99. EmitSseOrSse2OpF(context, name, false);
  100. }
  101. public static void EmitSseOrSse2OpF(ILEmitterCtx context, string name, bool scalar)
  102. {
  103. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  104. int sizeF = op.Size & 1;
  105. context.EmitLdvec(op.Rn);
  106. Type type;
  107. Type baseType;
  108. if (sizeF == 0)
  109. {
  110. type = typeof(Sse);
  111. baseType = typeof(Vector128<float>);
  112. }
  113. else /* if (sizeF == 1) */
  114. {
  115. type = typeof(Sse2);
  116. baseType = typeof(Vector128<double>);
  117. }
  118. if (op is OpCodeSimdReg64 binOp)
  119. {
  120. context.EmitLdvec(binOp.Rm);
  121. context.EmitCall(type.GetMethod(name, new Type[] { baseType, baseType }));
  122. }
  123. else
  124. {
  125. context.EmitCall(type.GetMethod(name, new Type[] { baseType }));
  126. }
  127. context.EmitStvec(op.Rd);
  128. if (scalar)
  129. {
  130. if (sizeF == 0)
  131. {
  132. EmitVectorZero32_128(context, op.Rd);
  133. }
  134. else /* if (sizeF == 1) */
  135. {
  136. EmitVectorZeroUpper(context, op.Rd);
  137. }
  138. }
  139. else if (op.RegisterSize == RegisterSize.Simd64)
  140. {
  141. EmitVectorZeroUpper(context, op.Rd);
  142. }
  143. }
  144. public static void EmitUnaryMathCall(ILEmitterCtx context, string name)
  145. {
  146. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  147. int sizeF = op.Size & 1;
  148. MethodInfo mthdInfo;
  149. if (sizeF == 0)
  150. {
  151. mthdInfo = typeof(MathF).GetMethod(name, new Type[] { typeof(float) });
  152. }
  153. else /* if (sizeF == 1) */
  154. {
  155. mthdInfo = typeof(Math).GetMethod(name, new Type[] { typeof(double) });
  156. }
  157. context.EmitCall(mthdInfo);
  158. }
  159. public static void EmitBinaryMathCall(ILEmitterCtx context, string name)
  160. {
  161. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  162. int sizeF = op.Size & 1;
  163. MethodInfo mthdInfo;
  164. if (sizeF == 0)
  165. {
  166. mthdInfo = typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(float) });
  167. }
  168. else /* if (sizeF == 1) */
  169. {
  170. mthdInfo = typeof(Math).GetMethod(name, new Type[] { typeof(double), typeof(double) });
  171. }
  172. context.EmitCall(mthdInfo);
  173. }
  174. public static void EmitRoundMathCall(ILEmitterCtx context, MidpointRounding roundMode)
  175. {
  176. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  177. int sizeF = op.Size & 1;
  178. MethodInfo mthdInfo;
  179. if (sizeF == 0)
  180. {
  181. mthdInfo = typeof(MathF).GetMethod(nameof(MathF.Round), new Type[] { typeof(float), typeof(MidpointRounding) });
  182. }
  183. else /* if (sizeF == 1) */
  184. {
  185. mthdInfo = typeof(Math).GetMethod(nameof(Math.Round), new Type[] { typeof(double), typeof(MidpointRounding) });
  186. }
  187. context.EmitLdc_I4((int)roundMode);
  188. context.EmitCall(mthdInfo);
  189. }
  190. public static void EmitSoftFloatCall(ILEmitterCtx context, string name)
  191. {
  192. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  193. Type type = (op.Size & 1) == 0
  194. ? typeof(SoftFloat32)
  195. : typeof(SoftFloat64);
  196. context.EmitLdarg(TranslatedSub.StateArgIdx);
  197. context.EmitCall(type, name);
  198. }
  199. public static void EmitScalarBinaryOpByElemF(ILEmitterCtx context, Action emit)
  200. {
  201. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  202. EmitScalarOpByElemF(context, emit, op.Index, ternary: false);
  203. }
  204. public static void EmitScalarTernaryOpByElemF(ILEmitterCtx context, Action emit)
  205. {
  206. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  207. EmitScalarOpByElemF(context, emit, op.Index, ternary: true);
  208. }
  209. public static void EmitScalarOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
  210. {
  211. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  212. int sizeF = op.Size & 1;
  213. if (ternary)
  214. {
  215. EmitVectorExtractF(context, op.Rd, 0, sizeF);
  216. }
  217. EmitVectorExtractF(context, op.Rn, 0, sizeF);
  218. EmitVectorExtractF(context, op.Rm, elem, sizeF);
  219. emit();
  220. EmitScalarSetF(context, op.Rd, sizeF);
  221. }
  222. public static void EmitScalarUnaryOpSx(ILEmitterCtx context, Action emit)
  223. {
  224. EmitScalarOp(context, emit, OperFlags.Rn, true);
  225. }
  226. public static void EmitScalarBinaryOpSx(ILEmitterCtx context, Action emit)
  227. {
  228. EmitScalarOp(context, emit, OperFlags.RnRm, true);
  229. }
  230. public static void EmitScalarUnaryOpZx(ILEmitterCtx context, Action emit)
  231. {
  232. EmitScalarOp(context, emit, OperFlags.Rn, false);
  233. }
  234. public static void EmitScalarBinaryOpZx(ILEmitterCtx context, Action emit)
  235. {
  236. EmitScalarOp(context, emit, OperFlags.RnRm, false);
  237. }
  238. public static void EmitScalarTernaryOpZx(ILEmitterCtx context, Action emit)
  239. {
  240. EmitScalarOp(context, emit, OperFlags.RdRnRm, false);
  241. }
  242. public static void EmitScalarOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
  243. {
  244. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  245. bool rd = (opers & OperFlags.Rd) != 0;
  246. bool rn = (opers & OperFlags.Rn) != 0;
  247. bool rm = (opers & OperFlags.Rm) != 0;
  248. if (rd)
  249. {
  250. EmitVectorExtract(context, op.Rd, 0, op.Size, signed);
  251. }
  252. if (rn)
  253. {
  254. EmitVectorExtract(context, op.Rn, 0, op.Size, signed);
  255. }
  256. if (rm)
  257. {
  258. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, 0, op.Size, signed);
  259. }
  260. emit();
  261. EmitScalarSet(context, op.Rd, op.Size);
  262. }
  263. public static void EmitScalarUnaryOpF(ILEmitterCtx context, Action emit)
  264. {
  265. EmitScalarOpF(context, emit, OperFlags.Rn);
  266. }
  267. public static void EmitScalarBinaryOpF(ILEmitterCtx context, Action emit)
  268. {
  269. EmitScalarOpF(context, emit, OperFlags.RnRm);
  270. }
  271. public static void EmitScalarTernaryRaOpF(ILEmitterCtx context, Action emit)
  272. {
  273. EmitScalarOpF(context, emit, OperFlags.RaRnRm);
  274. }
  275. public static void EmitScalarOpF(ILEmitterCtx context, Action emit, OperFlags opers)
  276. {
  277. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  278. int sizeF = op.Size & 1;
  279. bool ra = (opers & OperFlags.Ra) != 0;
  280. bool rn = (opers & OperFlags.Rn) != 0;
  281. bool rm = (opers & OperFlags.Rm) != 0;
  282. if (ra)
  283. {
  284. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Ra, 0, sizeF);
  285. }
  286. if (rn)
  287. {
  288. EmitVectorExtractF(context, op.Rn, 0, sizeF);
  289. }
  290. if (rm)
  291. {
  292. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, 0, sizeF);
  293. }
  294. emit();
  295. EmitScalarSetF(context, op.Rd, sizeF);
  296. }
  297. public static void EmitVectorUnaryOpF(ILEmitterCtx context, Action emit)
  298. {
  299. EmitVectorOpF(context, emit, OperFlags.Rn);
  300. }
  301. public static void EmitVectorBinaryOpF(ILEmitterCtx context, Action emit)
  302. {
  303. EmitVectorOpF(context, emit, OperFlags.RnRm);
  304. }
  305. public static void EmitVectorTernaryOpF(ILEmitterCtx context, Action emit)
  306. {
  307. EmitVectorOpF(context, emit, OperFlags.RdRnRm);
  308. }
  309. public static void EmitVectorOpF(ILEmitterCtx context, Action emit, OperFlags opers)
  310. {
  311. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  312. int sizeF = op.Size & 1;
  313. int bytes = op.GetBitsCount() >> 3;
  314. int elems = bytes >> sizeF + 2;
  315. bool rd = (opers & OperFlags.Rd) != 0;
  316. bool rn = (opers & OperFlags.Rn) != 0;
  317. bool rm = (opers & OperFlags.Rm) != 0;
  318. for (int index = 0; index < elems; index++)
  319. {
  320. if (rd)
  321. {
  322. EmitVectorExtractF(context, op.Rd, index, sizeF);
  323. }
  324. if (rn)
  325. {
  326. EmitVectorExtractF(context, op.Rn, index, sizeF);
  327. }
  328. if (rm)
  329. {
  330. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, index, sizeF);
  331. }
  332. emit();
  333. EmitVectorInsertF(context, op.Rd, index, sizeF);
  334. }
  335. if (op.RegisterSize == RegisterSize.Simd64)
  336. {
  337. EmitVectorZeroUpper(context, op.Rd);
  338. }
  339. }
  340. public static void EmitVectorBinaryOpByElemF(ILEmitterCtx context, Action emit)
  341. {
  342. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  343. EmitVectorOpByElemF(context, emit, op.Index, ternary: false);
  344. }
  345. public static void EmitVectorTernaryOpByElemF(ILEmitterCtx context, Action emit)
  346. {
  347. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  348. EmitVectorOpByElemF(context, emit, op.Index, ternary: true);
  349. }
  350. public static void EmitVectorOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
  351. {
  352. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  353. int sizeF = op.Size & 1;
  354. int bytes = op.GetBitsCount() >> 3;
  355. int elems = bytes >> sizeF + 2;
  356. for (int index = 0; index < elems; index++)
  357. {
  358. if (ternary)
  359. {
  360. EmitVectorExtractF(context, op.Rd, index, sizeF);
  361. }
  362. EmitVectorExtractF(context, op.Rn, index, sizeF);
  363. EmitVectorExtractF(context, op.Rm, elem, sizeF);
  364. emit();
  365. EmitVectorInsertTmpF(context, index, sizeF);
  366. }
  367. context.EmitLdvectmp();
  368. context.EmitStvec(op.Rd);
  369. if (op.RegisterSize == RegisterSize.Simd64)
  370. {
  371. EmitVectorZeroUpper(context, op.Rd);
  372. }
  373. }
  374. public static void EmitVectorUnaryOpSx(ILEmitterCtx context, Action emit)
  375. {
  376. EmitVectorOp(context, emit, OperFlags.Rn, true);
  377. }
  378. public static void EmitVectorBinaryOpSx(ILEmitterCtx context, Action emit)
  379. {
  380. EmitVectorOp(context, emit, OperFlags.RnRm, true);
  381. }
  382. public static void EmitVectorTernaryOpSx(ILEmitterCtx context, Action emit)
  383. {
  384. EmitVectorOp(context, emit, OperFlags.RdRnRm, true);
  385. }
  386. public static void EmitVectorUnaryOpZx(ILEmitterCtx context, Action emit)
  387. {
  388. EmitVectorOp(context, emit, OperFlags.Rn, false);
  389. }
  390. public static void EmitVectorBinaryOpZx(ILEmitterCtx context, Action emit)
  391. {
  392. EmitVectorOp(context, emit, OperFlags.RnRm, false);
  393. }
  394. public static void EmitVectorTernaryOpZx(ILEmitterCtx context, Action emit)
  395. {
  396. EmitVectorOp(context, emit, OperFlags.RdRnRm, false);
  397. }
  398. public static void EmitVectorOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
  399. {
  400. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  401. int bytes = op.GetBitsCount() >> 3;
  402. int elems = bytes >> op.Size;
  403. bool rd = (opers & OperFlags.Rd) != 0;
  404. bool rn = (opers & OperFlags.Rn) != 0;
  405. bool rm = (opers & OperFlags.Rm) != 0;
  406. for (int index = 0; index < elems; index++)
  407. {
  408. if (rd)
  409. {
  410. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  411. }
  412. if (rn)
  413. {
  414. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  415. }
  416. if (rm)
  417. {
  418. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  419. }
  420. emit();
  421. EmitVectorInsert(context, op.Rd, index, op.Size);
  422. }
  423. if (op.RegisterSize == RegisterSize.Simd64)
  424. {
  425. EmitVectorZeroUpper(context, op.Rd);
  426. }
  427. }
  428. public static void EmitVectorBinaryOpByElemSx(ILEmitterCtx context, Action emit)
  429. {
  430. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  431. EmitVectorOpByElem(context, emit, op.Index, ternary: false, signed: true);
  432. }
  433. public static void EmitVectorBinaryOpByElemZx(ILEmitterCtx context, Action emit)
  434. {
  435. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  436. EmitVectorOpByElem(context, emit, op.Index, ternary: false, signed: false);
  437. }
  438. public static void EmitVectorTernaryOpByElemZx(ILEmitterCtx context, Action emit)
  439. {
  440. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  441. EmitVectorOpByElem(context, emit, op.Index, ternary: true, signed: false);
  442. }
  443. public static void EmitVectorOpByElem(ILEmitterCtx context, Action emit, int elem, bool ternary, bool signed)
  444. {
  445. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  446. int bytes = op.GetBitsCount() >> 3;
  447. int elems = bytes >> op.Size;
  448. EmitVectorExtract(context, op.Rm, elem, op.Size, signed);
  449. context.EmitSttmp();
  450. for (int index = 0; index < elems; index++)
  451. {
  452. if (ternary)
  453. {
  454. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  455. }
  456. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  457. context.EmitLdtmp();
  458. emit();
  459. EmitVectorInsert(context, op.Rd, index, op.Size);
  460. }
  461. if (op.RegisterSize == RegisterSize.Simd64)
  462. {
  463. EmitVectorZeroUpper(context, op.Rd);
  464. }
  465. }
  466. public static void EmitVectorImmUnaryOp(ILEmitterCtx context, Action emit)
  467. {
  468. EmitVectorImmOp(context, emit, false);
  469. }
  470. public static void EmitVectorImmBinaryOp(ILEmitterCtx context, Action emit)
  471. {
  472. EmitVectorImmOp(context, emit, true);
  473. }
  474. public static void EmitVectorImmOp(ILEmitterCtx context, Action emit, bool binary)
  475. {
  476. OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp;
  477. int bytes = op.GetBitsCount() >> 3;
  478. int elems = bytes >> op.Size;
  479. for (int index = 0; index < elems; index++)
  480. {
  481. if (binary)
  482. {
  483. EmitVectorExtractZx(context, op.Rd, index, op.Size);
  484. }
  485. context.EmitLdc_I8(op.Imm);
  486. emit();
  487. EmitVectorInsert(context, op.Rd, index, op.Size);
  488. }
  489. if (op.RegisterSize == RegisterSize.Simd64)
  490. {
  491. EmitVectorZeroUpper(context, op.Rd);
  492. }
  493. }
  494. public static void EmitVectorWidenRmBinaryOpSx(ILEmitterCtx context, Action emit)
  495. {
  496. EmitVectorWidenRmBinaryOp(context, emit, true);
  497. }
  498. public static void EmitVectorWidenRmBinaryOpZx(ILEmitterCtx context, Action emit)
  499. {
  500. EmitVectorWidenRmBinaryOp(context, emit, false);
  501. }
  502. public static void EmitVectorWidenRmBinaryOp(ILEmitterCtx context, Action emit, bool signed)
  503. {
  504. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  505. int elems = 8 >> op.Size;
  506. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  507. for (int index = 0; index < elems; index++)
  508. {
  509. EmitVectorExtract(context, op.Rn, index, op.Size + 1, signed);
  510. EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  511. emit();
  512. EmitVectorInsertTmp(context, index, op.Size + 1);
  513. }
  514. context.EmitLdvectmp();
  515. context.EmitStvec(op.Rd);
  516. }
  517. public static void EmitVectorWidenRnRmBinaryOpSx(ILEmitterCtx context, Action emit)
  518. {
  519. EmitVectorWidenRnRmOp(context, emit, false, true);
  520. }
  521. public static void EmitVectorWidenRnRmBinaryOpZx(ILEmitterCtx context, Action emit)
  522. {
  523. EmitVectorWidenRnRmOp(context, emit, false, false);
  524. }
  525. public static void EmitVectorWidenRnRmTernaryOpSx(ILEmitterCtx context, Action emit)
  526. {
  527. EmitVectorWidenRnRmOp(context, emit, true, true);
  528. }
  529. public static void EmitVectorWidenRnRmTernaryOpZx(ILEmitterCtx context, Action emit)
  530. {
  531. EmitVectorWidenRnRmOp(context, emit, true, false);
  532. }
  533. public static void EmitVectorWidenRnRmOp(ILEmitterCtx context, Action emit, bool ternary, bool signed)
  534. {
  535. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  536. int elems = 8 >> op.Size;
  537. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  538. for (int index = 0; index < elems; index++)
  539. {
  540. if (ternary)
  541. {
  542. EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  543. }
  544. EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  545. EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  546. emit();
  547. EmitVectorInsertTmp(context, index, op.Size + 1);
  548. }
  549. context.EmitLdvectmp();
  550. context.EmitStvec(op.Rd);
  551. }
  552. public static void EmitVectorWidenBinaryOpByElemSx(ILEmitterCtx context, Action emit)
  553. {
  554. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  555. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: false, signed: true);
  556. }
  557. public static void EmitVectorWidenBinaryOpByElemZx(ILEmitterCtx context, Action emit)
  558. {
  559. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  560. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: false, signed: false);
  561. }
  562. public static void EmitVectorWidenTernaryOpByElemSx(ILEmitterCtx context, Action emit)
  563. {
  564. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  565. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: true, signed: true);
  566. }
  567. public static void EmitVectorWidenTernaryOpByElemZx(ILEmitterCtx context, Action emit)
  568. {
  569. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  570. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: true, signed: false);
  571. }
  572. public static void EmitVectorWidenOpByElem(ILEmitterCtx context, Action emit, int elem, bool ternary, bool signed)
  573. {
  574. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  575. int elems = 8 >> op.Size;
  576. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  577. EmitVectorExtract(context, op.Rm, elem, op.Size, signed);
  578. context.EmitSttmp();
  579. for (int index = 0; index < elems; index++)
  580. {
  581. if (ternary)
  582. {
  583. EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  584. }
  585. EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  586. context.EmitLdtmp();
  587. emit();
  588. EmitVectorInsertTmp(context, index, op.Size + 1);
  589. }
  590. context.EmitLdvectmp();
  591. context.EmitStvec(op.Rd);
  592. }
  593. public static void EmitVectorPairwiseOpSx(ILEmitterCtx context, Action emit)
  594. {
  595. EmitVectorPairwiseOp(context, emit, true);
  596. }
  597. public static void EmitVectorPairwiseOpZx(ILEmitterCtx context, Action emit)
  598. {
  599. EmitVectorPairwiseOp(context, emit, false);
  600. }
  601. public static void EmitVectorPairwiseOp(ILEmitterCtx context, Action emit, bool signed)
  602. {
  603. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  604. int words = op.GetBitsCount() >> 4;
  605. int pairs = words >> op.Size;
  606. for (int index = 0; index < pairs; index++)
  607. {
  608. int idx = index << 1;
  609. EmitVectorExtract(context, op.Rn, idx, op.Size, signed);
  610. EmitVectorExtract(context, op.Rn, idx + 1, op.Size, signed);
  611. emit();
  612. EmitVectorExtract(context, op.Rm, idx, op.Size, signed);
  613. EmitVectorExtract(context, op.Rm, idx + 1, op.Size, signed);
  614. emit();
  615. EmitVectorInsertTmp(context, pairs + index, op.Size);
  616. EmitVectorInsertTmp(context, index, op.Size);
  617. }
  618. context.EmitLdvectmp();
  619. context.EmitStvec(op.Rd);
  620. if (op.RegisterSize == RegisterSize.Simd64)
  621. {
  622. EmitVectorZeroUpper(context, op.Rd);
  623. }
  624. }
  625. public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
  626. {
  627. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  628. int sizeF = op.Size & 1;
  629. int words = op.GetBitsCount() >> 4;
  630. int pairs = words >> sizeF + 2;
  631. for (int index = 0; index < pairs; index++)
  632. {
  633. int idx = index << 1;
  634. EmitVectorExtractF(context, op.Rn, idx, sizeF);
  635. EmitVectorExtractF(context, op.Rn, idx + 1, sizeF);
  636. emit();
  637. EmitVectorExtractF(context, op.Rm, idx, sizeF);
  638. EmitVectorExtractF(context, op.Rm, idx + 1, sizeF);
  639. emit();
  640. EmitVectorInsertTmpF(context, pairs + index, sizeF);
  641. EmitVectorInsertTmpF(context, index, sizeF);
  642. }
  643. context.EmitLdvectmp();
  644. context.EmitStvec(op.Rd);
  645. if (op.RegisterSize == RegisterSize.Simd64)
  646. {
  647. EmitVectorZeroUpper(context, op.Rd);
  648. }
  649. }
  650. public static void EmitVectorPairwiseSseOrSse2OpF(ILEmitterCtx context, string name)
  651. {
  652. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  653. int sizeF = op.Size & 1;
  654. if (sizeF == 0)
  655. {
  656. if (op.RegisterSize == RegisterSize.Simd64)
  657. {
  658. Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
  659. context.EmitLdvec(op.Rn);
  660. context.EmitLdvec(op.Rm);
  661. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.UnpackLow), types));
  662. context.EmitStvectmp();
  663. context.EmitLdvectmp();
  664. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  665. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh), types));
  666. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  667. context.EmitLdvectmp();
  668. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveHighToLow), types));
  669. context.EmitCall(typeof(Sse).GetMethod(name, types));
  670. context.EmitStvec(op.Rd);
  671. }
  672. else /* if (op.RegisterSize == RegisterSize.Simd128) */
  673. {
  674. Type[] typesSfl = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>), typeof(byte) };
  675. Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
  676. context.EmitLdvec(op.Rn);
  677. context.EmitLdvec(op.Rm);
  678. context.EmitLdc_I4(2 << 6 | 0 << 4 | 2 << 2 | 0 << 0);
  679. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Shuffle), typesSfl));
  680. context.EmitLdvec(op.Rn);
  681. context.EmitLdvec(op.Rm);
  682. context.EmitLdc_I4(3 << 6 | 1 << 4 | 3 << 2 | 1 << 0);
  683. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Shuffle), typesSfl));
  684. context.EmitCall(typeof(Sse).GetMethod(name, types));
  685. context.EmitStvec(op.Rd);
  686. }
  687. }
  688. else /* if (sizeF == 1) */
  689. {
  690. Type[] types = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
  691. context.EmitLdvec(op.Rn);
  692. context.EmitLdvec(op.Rm);
  693. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), types));
  694. context.EmitLdvec(op.Rn);
  695. context.EmitLdvec(op.Rm);
  696. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), types));
  697. context.EmitCall(typeof(Sse2).GetMethod(name, types));
  698. context.EmitStvec(op.Rd);
  699. }
  700. }
  701. [Flags]
  702. public enum SaturatingFlags
  703. {
  704. Scalar = 1 << 0,
  705. Signed = 1 << 1,
  706. Add = 1 << 2,
  707. Sub = 1 << 3,
  708. Accumulate = 1 << 4,
  709. ScalarSx = Scalar | Signed,
  710. ScalarZx = Scalar,
  711. VectorSx = Signed,
  712. VectorZx = 0
  713. }
  714. public static void EmitScalarSaturatingUnaryOpSx(ILEmitterCtx context, Action emit)
  715. {
  716. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.ScalarSx);
  717. }
  718. public static void EmitVectorSaturatingUnaryOpSx(ILEmitterCtx context, Action emit)
  719. {
  720. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.VectorSx);
  721. }
  722. public static void EmitSaturatingUnaryOpSx(ILEmitterCtx context, Action emit, SaturatingFlags flags)
  723. {
  724. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  725. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  726. int bytes = op.GetBitsCount() >> 3;
  727. int elems = !scalar ? bytes >> op.Size : 1;
  728. for (int index = 0; index < elems; index++)
  729. {
  730. EmitVectorExtractSx(context, op.Rn, index, op.Size);
  731. emit();
  732. if (op.Size <= 2)
  733. {
  734. EmitSatQ(context, op.Size, true, true);
  735. }
  736. else /* if (op.Size == 3) */
  737. {
  738. EmitUnarySignedSatQAbsOrNeg(context);
  739. }
  740. if (scalar)
  741. {
  742. EmitVectorZeroAll(context, op.Rd);
  743. }
  744. EmitVectorInsert(context, op.Rd, index, op.Size);
  745. }
  746. if (op.RegisterSize == RegisterSize.Simd64)
  747. {
  748. EmitVectorZeroUpper(context, op.Rd);
  749. }
  750. }
  751. public static void EmitScalarSaturatingBinaryOpSx(ILEmitterCtx context, SaturatingFlags flags)
  752. {
  753. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.ScalarSx | flags);
  754. }
  755. public static void EmitScalarSaturatingBinaryOpZx(ILEmitterCtx context, SaturatingFlags flags)
  756. {
  757. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.ScalarZx | flags);
  758. }
  759. public static void EmitVectorSaturatingBinaryOpSx(ILEmitterCtx context, SaturatingFlags flags)
  760. {
  761. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.VectorSx | flags);
  762. }
  763. public static void EmitVectorSaturatingBinaryOpZx(ILEmitterCtx context, SaturatingFlags flags)
  764. {
  765. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.VectorZx | flags);
  766. }
  767. public static void EmitSaturatingBinaryOp(ILEmitterCtx context, Action emit, SaturatingFlags flags)
  768. {
  769. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  770. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  771. bool signed = (flags & SaturatingFlags.Signed) != 0;
  772. bool add = (flags & SaturatingFlags.Add) != 0;
  773. bool sub = (flags & SaturatingFlags.Sub) != 0;
  774. bool accumulate = (flags & SaturatingFlags.Accumulate) != 0;
  775. int bytes = op.GetBitsCount() >> 3;
  776. int elems = !scalar ? bytes >> op.Size : 1;
  777. if (add || sub)
  778. {
  779. for (int index = 0; index < elems; index++)
  780. {
  781. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  782. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  783. if (op.Size <= 2)
  784. {
  785. context.Emit(add ? OpCodes.Add : OpCodes.Sub);
  786. EmitSatQ(context, op.Size, true, signed);
  787. }
  788. else /* if (op.Size == 3) */
  789. {
  790. if (add)
  791. {
  792. EmitBinarySatQAdd(context, signed);
  793. }
  794. else /* if (sub) */
  795. {
  796. EmitBinarySatQSub(context, signed);
  797. }
  798. }
  799. if (scalar)
  800. {
  801. EmitVectorZeroAll(context, op.Rd);
  802. }
  803. EmitVectorInsert(context, op.Rd, index, op.Size);
  804. }
  805. }
  806. else if (accumulate)
  807. {
  808. for (int index = 0; index < elems; index++)
  809. {
  810. EmitVectorExtract(context, op.Rn, index, op.Size, !signed);
  811. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  812. if (op.Size <= 2)
  813. {
  814. context.Emit(OpCodes.Add);
  815. EmitSatQ(context, op.Size, true, signed);
  816. }
  817. else /* if (op.Size == 3) */
  818. {
  819. EmitBinarySatQAccumulate(context, signed);
  820. }
  821. if (scalar)
  822. {
  823. EmitVectorZeroAll(context, op.Rd);
  824. }
  825. EmitVectorInsert(context, op.Rd, index, op.Size);
  826. }
  827. }
  828. else
  829. {
  830. for (int index = 0; index < elems; index++)
  831. {
  832. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  833. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  834. emit();
  835. EmitSatQ(context, op.Size, true, signed);
  836. if (scalar)
  837. {
  838. EmitVectorZeroAll(context, op.Rd);
  839. }
  840. EmitVectorInsert(context, op.Rd, index, op.Size);
  841. }
  842. }
  843. if (op.RegisterSize == RegisterSize.Simd64)
  844. {
  845. EmitVectorZeroUpper(context, op.Rd);
  846. }
  847. }
  848. [Flags]
  849. public enum SaturatingNarrowFlags
  850. {
  851. Scalar = 1 << 0,
  852. SignedSrc = 1 << 1,
  853. SignedDst = 1 << 2,
  854. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  855. ScalarSxZx = Scalar | SignedSrc,
  856. ScalarZxZx = Scalar,
  857. VectorSxSx = SignedSrc | SignedDst,
  858. VectorSxZx = SignedSrc,
  859. VectorZxZx = 0
  860. }
  861. public static void EmitSaturatingNarrowOp(ILEmitterCtx context, SaturatingNarrowFlags flags)
  862. {
  863. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  864. bool scalar = (flags & SaturatingNarrowFlags.Scalar) != 0;
  865. bool signedSrc = (flags & SaturatingNarrowFlags.SignedSrc) != 0;
  866. bool signedDst = (flags & SaturatingNarrowFlags.SignedDst) != 0;
  867. int elems = !scalar ? 8 >> op.Size : 1;
  868. int part = !scalar && (op.RegisterSize == RegisterSize.Simd128) ? elems : 0;
  869. if (scalar)
  870. {
  871. EmitVectorZeroLowerTmp(context);
  872. }
  873. if (part != 0)
  874. {
  875. context.EmitLdvec(op.Rd);
  876. context.EmitStvectmp();
  877. }
  878. for (int index = 0; index < elems; index++)
  879. {
  880. EmitVectorExtract(context, op.Rn, index, op.Size + 1, signedSrc);
  881. EmitSatQ(context, op.Size, signedSrc, signedDst);
  882. EmitVectorInsertTmp(context, part + index, op.Size);
  883. }
  884. context.EmitLdvectmp();
  885. context.EmitStvec(op.Rd);
  886. if (part == 0)
  887. {
  888. EmitVectorZeroUpper(context, op.Rd);
  889. }
  890. }
  891. // TSrc (16bit, 32bit, 64bit; signed, unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  892. public static void EmitSatQ(ILEmitterCtx context, int sizeDst, bool signedSrc, bool signedDst)
  893. {
  894. if ((uint)sizeDst > 2u)
  895. {
  896. throw new ArgumentOutOfRangeException(nameof(sizeDst));
  897. }
  898. context.EmitLdc_I4(sizeDst);
  899. context.EmitLdarg(TranslatedSub.StateArgIdx);
  900. if (signedSrc)
  901. {
  902. SoftFallback.EmitCall(context, signedDst
  903. ? nameof(SoftFallback.SignedSrcSignedDstSatQ)
  904. : nameof(SoftFallback.SignedSrcUnsignedDstSatQ));
  905. }
  906. else
  907. {
  908. SoftFallback.EmitCall(context, signedDst
  909. ? nameof(SoftFallback.UnsignedSrcSignedDstSatQ)
  910. : nameof(SoftFallback.UnsignedSrcUnsignedDstSatQ));
  911. }
  912. }
  913. // TSrc (64bit) == TDst (64bit); signed.
  914. public static void EmitUnarySignedSatQAbsOrNeg(ILEmitterCtx context)
  915. {
  916. if (((OpCodeSimd64)context.CurrOp).Size < 3)
  917. {
  918. throw new InvalidOperationException();
  919. }
  920. context.EmitLdarg(TranslatedSub.StateArgIdx);
  921. SoftFallback.EmitCall(context, nameof(SoftFallback.UnarySignedSatQAbsOrNeg));
  922. }
  923. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  924. public static void EmitBinarySatQAdd(ILEmitterCtx context, bool signed)
  925. {
  926. if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
  927. {
  928. throw new InvalidOperationException();
  929. }
  930. context.EmitLdarg(TranslatedSub.StateArgIdx);
  931. SoftFallback.EmitCall(context, signed
  932. ? nameof(SoftFallback.BinarySignedSatQAdd)
  933. : nameof(SoftFallback.BinaryUnsignedSatQAdd));
  934. }
  935. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  936. public static void EmitBinarySatQSub(ILEmitterCtx context, bool signed)
  937. {
  938. if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
  939. {
  940. throw new InvalidOperationException();
  941. }
  942. context.EmitLdarg(TranslatedSub.StateArgIdx);
  943. SoftFallback.EmitCall(context, signed
  944. ? nameof(SoftFallback.BinarySignedSatQSub)
  945. : nameof(SoftFallback.BinaryUnsignedSatQSub));
  946. }
  947. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  948. public static void EmitBinarySatQAccumulate(ILEmitterCtx context, bool signed)
  949. {
  950. if (((OpCodeSimd64)context.CurrOp).Size < 3)
  951. {
  952. throw new InvalidOperationException();
  953. }
  954. context.EmitLdarg(TranslatedSub.StateArgIdx);
  955. SoftFallback.EmitCall(context, signed
  956. ? nameof(SoftFallback.BinarySignedSatQAcc)
  957. : nameof(SoftFallback.BinaryUnsignedSatQAcc));
  958. }
  959. public static void EmitScalarSet(ILEmitterCtx context, int reg, int size)
  960. {
  961. EmitVectorZeroAll(context, reg);
  962. EmitVectorInsert(context, reg, 0, size);
  963. }
  964. public static void EmitScalarSetF(ILEmitterCtx context, int reg, int size)
  965. {
  966. if (Optimizations.UseSse41 && size == 0)
  967. {
  968. //If the type is float, we can perform insertion and
  969. //zero the upper bits with a single instruction (INSERTPS);
  970. context.EmitLdvec(reg);
  971. VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41VectorInsertScalarSingle));
  972. context.EmitStvec(reg);
  973. }
  974. else
  975. {
  976. EmitVectorZeroAll(context, reg);
  977. EmitVectorInsertF(context, reg, 0, size);
  978. }
  979. }
  980. public static void EmitVectorExtractSx(ILEmitterCtx context, int reg, int index, int size)
  981. {
  982. EmitVectorExtract(context, reg, index, size, true);
  983. }
  984. public static void EmitVectorExtractZx(ILEmitterCtx context, int reg, int index, int size)
  985. {
  986. EmitVectorExtract(context, reg, index, size, false);
  987. }
  988. public static void EmitVectorExtract(ILEmitterCtx context, int reg, int index, int size, bool signed)
  989. {
  990. ThrowIfInvalid(index, size);
  991. context.EmitLdvec(reg);
  992. context.EmitLdc_I4(index);
  993. context.EmitLdc_I4(size);
  994. VectorHelper.EmitCall(context, signed
  995. ? nameof(VectorHelper.VectorExtractIntSx)
  996. : nameof(VectorHelper.VectorExtractIntZx));
  997. }
  998. public static void EmitVectorExtractF(ILEmitterCtx context, int reg, int index, int size)
  999. {
  1000. ThrowIfInvalidF(index, size);
  1001. context.EmitLdvec(reg);
  1002. context.EmitLdc_I4(index);
  1003. if (size == 0)
  1004. {
  1005. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorExtractSingle));
  1006. }
  1007. else if (size == 1)
  1008. {
  1009. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorExtractDouble));
  1010. }
  1011. else
  1012. {
  1013. throw new ArgumentOutOfRangeException(nameof(size));
  1014. }
  1015. }
  1016. public static void EmitVectorZeroAll(ILEmitterCtx context, int reg)
  1017. {
  1018. if (Optimizations.UseSse)
  1019. {
  1020. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1021. context.EmitStvec(reg);
  1022. }
  1023. else
  1024. {
  1025. EmitVectorZeroLower(context, reg);
  1026. EmitVectorZeroUpper(context, reg);
  1027. }
  1028. }
  1029. public static void EmitVectorZeroLower(ILEmitterCtx context, int reg)
  1030. {
  1031. EmitVectorInsert(context, reg, 0, 3, 0);
  1032. }
  1033. public static void EmitVectorZeroLowerTmp(ILEmitterCtx context)
  1034. {
  1035. if (Optimizations.UseSse)
  1036. {
  1037. context.EmitLdvectmp();
  1038. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1039. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveHighToLow)));
  1040. context.EmitStvectmp();
  1041. }
  1042. else
  1043. {
  1044. EmitVectorInsertTmp(context, 0, 3, 0);
  1045. }
  1046. }
  1047. public static void EmitVectorZeroUpper(ILEmitterCtx context, int reg)
  1048. {
  1049. if (Optimizations.UseSse)
  1050. {
  1051. // TODO: Use Sse2.MoveScalar once it is fixed (in .NET Core 3.0),
  1052. // as of the time of writing it just crashes the JIT.
  1053. /*Type[] typesMov = new Type[] { typeof(Vector128<ulong>) };
  1054. context.EmitLdvec(reg);
  1055. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.MoveScalar), typesMov));
  1056. context.EmitStvec(reg);*/
  1057. context.EmitLdvec(reg);
  1058. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1059. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh)));
  1060. context.EmitStvec(reg);
  1061. }
  1062. else
  1063. {
  1064. EmitVectorInsert(context, reg, 1, 3, 0);
  1065. }
  1066. }
  1067. public static void EmitVectorZero32_128(ILEmitterCtx context, int reg)
  1068. {
  1069. if (!Sse.IsSupported)
  1070. {
  1071. throw new PlatformNotSupportedException();
  1072. }
  1073. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1074. context.EmitLdvec(reg);
  1075. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveScalar)));
  1076. context.EmitStvec(reg);
  1077. }
  1078. public static void EmitVectorInsert(ILEmitterCtx context, int reg, int index, int size)
  1079. {
  1080. ThrowIfInvalid(index, size);
  1081. context.EmitLdvec(reg);
  1082. context.EmitLdc_I4(index);
  1083. context.EmitLdc_I4(size);
  1084. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1085. context.EmitStvec(reg);
  1086. }
  1087. public static void EmitVectorInsertTmp(ILEmitterCtx context, int index, int size)
  1088. {
  1089. ThrowIfInvalid(index, size);
  1090. context.EmitLdvectmp();
  1091. context.EmitLdc_I4(index);
  1092. context.EmitLdc_I4(size);
  1093. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1094. context.EmitStvectmp();
  1095. }
  1096. public static void EmitVectorInsert(ILEmitterCtx context, int reg, int index, int size, long value)
  1097. {
  1098. ThrowIfInvalid(index, size);
  1099. context.EmitLdc_I8(value);
  1100. context.EmitLdvec(reg);
  1101. context.EmitLdc_I4(index);
  1102. context.EmitLdc_I4(size);
  1103. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1104. context.EmitStvec(reg);
  1105. }
  1106. public static void EmitVectorInsertTmp(ILEmitterCtx context, int index, int size, long value)
  1107. {
  1108. ThrowIfInvalid(index, size);
  1109. context.EmitLdc_I8(value);
  1110. context.EmitLdvectmp();
  1111. context.EmitLdc_I4(index);
  1112. context.EmitLdc_I4(size);
  1113. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1114. context.EmitStvectmp();
  1115. }
  1116. public static void EmitVectorInsertF(ILEmitterCtx context, int reg, int index, int size)
  1117. {
  1118. ThrowIfInvalidF(index, size);
  1119. context.EmitLdvec(reg);
  1120. context.EmitLdc_I4(index);
  1121. if (size == 0)
  1122. {
  1123. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertSingle));
  1124. }
  1125. else if (size == 1)
  1126. {
  1127. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertDouble));
  1128. }
  1129. else
  1130. {
  1131. throw new ArgumentOutOfRangeException(nameof(size));
  1132. }
  1133. context.EmitStvec(reg);
  1134. }
  1135. public static void EmitVectorInsertTmpF(ILEmitterCtx context, int index, int size)
  1136. {
  1137. ThrowIfInvalidF(index, size);
  1138. context.EmitLdvectmp();
  1139. context.EmitLdc_I4(index);
  1140. if (size == 0)
  1141. {
  1142. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertSingle));
  1143. }
  1144. else if (size == 1)
  1145. {
  1146. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertDouble));
  1147. }
  1148. else
  1149. {
  1150. throw new ArgumentOutOfRangeException(nameof(size));
  1151. }
  1152. context.EmitStvectmp();
  1153. }
  1154. private static void ThrowIfInvalid(int index, int size)
  1155. {
  1156. if ((uint)size > 3u)
  1157. {
  1158. throw new ArgumentOutOfRangeException(nameof(size));
  1159. }
  1160. if ((uint)index >= 16u >> size)
  1161. {
  1162. throw new ArgumentOutOfRangeException(nameof(index));
  1163. }
  1164. }
  1165. private static void ThrowIfInvalidF(int index, int size)
  1166. {
  1167. if ((uint)size > 1u)
  1168. {
  1169. throw new ArgumentOutOfRangeException(nameof(size));
  1170. }
  1171. if ((uint)index >= 4u >> size)
  1172. {
  1173. throw new ArgumentOutOfRangeException(nameof(index));
  1174. }
  1175. }
  1176. }
  1177. }