AInstEmitSimdHelper.cs 43 KB

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  1. using ChocolArm64.Decoder;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection;
  6. using System.Reflection.Emit;
  7. using System.Runtime.CompilerServices;
  8. using System.Runtime.Intrinsics;
  9. using System.Runtime.Intrinsics.X86;
  10. namespace ChocolArm64.Instruction
  11. {
  12. static class AInstEmitSimdHelper
  13. {
  14. [Flags]
  15. public enum OperFlags
  16. {
  17. Rd = 1 << 0,
  18. Rn = 1 << 1,
  19. Rm = 1 << 2,
  20. Ra = 1 << 3,
  21. RnRm = Rn | Rm,
  22. RdRn = Rd | Rn,
  23. RaRnRm = Ra | Rn | Rm,
  24. RdRnRm = Rd | Rn | Rm
  25. }
  26. public static int GetImmShl(AOpCodeSimdShImm Op)
  27. {
  28. return Op.Imm - (8 << Op.Size);
  29. }
  30. public static int GetImmShr(AOpCodeSimdShImm Op)
  31. {
  32. return (8 << (Op.Size + 1)) - Op.Imm;
  33. }
  34. [MethodImpl(MethodImplOptions.AggressiveInlining)]
  35. public static void EmitSse2Call(AILEmitterCtx Context, string Name)
  36. {
  37. EmitSseCall(Context, Name, typeof(Sse2));
  38. }
  39. [MethodImpl(MethodImplOptions.AggressiveInlining)]
  40. public static void EmitSse41Call(AILEmitterCtx Context, string Name)
  41. {
  42. EmitSseCall(Context, Name, typeof(Sse41));
  43. }
  44. [MethodImpl(MethodImplOptions.AggressiveInlining)]
  45. public static void EmitSse42Call(AILEmitterCtx Context, string Name)
  46. {
  47. EmitSseCall(Context, Name, typeof(Sse42));
  48. }
  49. private static void EmitSseCall(AILEmitterCtx Context, string Name, Type Type)
  50. {
  51. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  52. void Ldvec(int Reg)
  53. {
  54. Context.EmitLdvec(Reg);
  55. switch (Op.Size)
  56. {
  57. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToSByte)); break;
  58. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt16)); break;
  59. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt32)); break;
  60. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToInt64)); break;
  61. }
  62. }
  63. Ldvec(Op.Rn);
  64. Type BaseType = null;
  65. switch (Op.Size)
  66. {
  67. case 0: BaseType = typeof(Vector128<sbyte>); break;
  68. case 1: BaseType = typeof(Vector128<short>); break;
  69. case 2: BaseType = typeof(Vector128<int>); break;
  70. case 3: BaseType = typeof(Vector128<long>); break;
  71. }
  72. if (Op is AOpCodeSimdReg BinOp)
  73. {
  74. Ldvec(BinOp.Rm);
  75. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType, BaseType }));
  76. }
  77. else
  78. {
  79. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType }));
  80. }
  81. switch (Op.Size)
  82. {
  83. case 0: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSByteToSingle)); break;
  84. case 1: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt16ToSingle)); break;
  85. case 2: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt32ToSingle)); break;
  86. case 3: AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInt64ToSingle)); break;
  87. }
  88. Context.EmitStvec(Op.Rd);
  89. if (Op.RegisterSize == ARegisterSize.SIMD64)
  90. {
  91. EmitVectorZeroUpper(Context, Op.Rd);
  92. }
  93. }
  94. public static void EmitSseOrSse2CallF(AILEmitterCtx Context, string Name)
  95. {
  96. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  97. int SizeF = Op.Size & 1;
  98. void Ldvec(int Reg)
  99. {
  100. Context.EmitLdvec(Reg);
  101. if (SizeF == 1)
  102. {
  103. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorSingleToDouble));
  104. }
  105. }
  106. Ldvec(Op.Rn);
  107. Type Type;
  108. Type BaseType;
  109. if (SizeF == 0)
  110. {
  111. Type = typeof(Sse);
  112. BaseType = typeof(Vector128<float>);
  113. }
  114. else /* if (SizeF == 1) */
  115. {
  116. Type = typeof(Sse2);
  117. BaseType = typeof(Vector128<double>);
  118. }
  119. if (Op is AOpCodeSimdReg BinOp)
  120. {
  121. Ldvec(BinOp.Rm);
  122. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType, BaseType }));
  123. }
  124. else
  125. {
  126. Context.EmitCall(Type.GetMethod(Name, new Type[] { BaseType }));
  127. }
  128. if (SizeF == 1)
  129. {
  130. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorDoubleToSingle));
  131. }
  132. Context.EmitStvec(Op.Rd);
  133. if (Op.RegisterSize == ARegisterSize.SIMD64)
  134. {
  135. EmitVectorZeroUpper(Context, Op.Rd);
  136. }
  137. }
  138. public static void EmitUnaryMathCall(AILEmitterCtx Context, string Name)
  139. {
  140. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  141. int SizeF = Op.Size & 1;
  142. MethodInfo MthdInfo;
  143. if (SizeF == 0)
  144. {
  145. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float) });
  146. }
  147. else /* if (SizeF == 1) */
  148. {
  149. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double) });
  150. }
  151. Context.EmitCall(MthdInfo);
  152. }
  153. public static void EmitBinaryMathCall(AILEmitterCtx Context, string Name)
  154. {
  155. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  156. int SizeF = Op.Size & 1;
  157. MethodInfo MthdInfo;
  158. if (SizeF == 0)
  159. {
  160. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float), typeof(float) });
  161. }
  162. else /* if (SizeF == 1) */
  163. {
  164. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double), typeof(double) });
  165. }
  166. Context.EmitCall(MthdInfo);
  167. }
  168. public static void EmitRoundMathCall(AILEmitterCtx Context, MidpointRounding RoundMode)
  169. {
  170. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  171. int SizeF = Op.Size & 1;
  172. Context.EmitLdc_I4((int)RoundMode);
  173. MethodInfo MthdInfo;
  174. Type[] Types = new Type[] { null, typeof(MidpointRounding) };
  175. Types[0] = SizeF == 0
  176. ? typeof(float)
  177. : typeof(double);
  178. if (SizeF == 0)
  179. {
  180. MthdInfo = typeof(MathF).GetMethod(nameof(MathF.Round), Types);
  181. }
  182. else /* if (SizeF == 1) */
  183. {
  184. MthdInfo = typeof(Math).GetMethod(nameof(Math.Round), Types);
  185. }
  186. Context.EmitCall(MthdInfo);
  187. }
  188. public static void EmitUnarySoftFloatCall(AILEmitterCtx Context, string Name)
  189. {
  190. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  191. int SizeF = Op.Size & 1;
  192. MethodInfo MthdInfo;
  193. if (SizeF == 0)
  194. {
  195. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(float) });
  196. }
  197. else /* if (SizeF == 1) */
  198. {
  199. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(double) });
  200. }
  201. Context.EmitCall(MthdInfo);
  202. }
  203. public static void EmitBinarySoftFloatCall(AILEmitterCtx Context, string Name)
  204. {
  205. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  206. int SizeF = Op.Size & 1;
  207. MethodInfo MthdInfo;
  208. if (SizeF == 0)
  209. {
  210. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(float), typeof(float) });
  211. }
  212. else /* if (SizeF == 1) */
  213. {
  214. MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(double), typeof(double) });
  215. }
  216. Context.EmitCall(MthdInfo);
  217. }
  218. public static void EmitScalarBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
  219. {
  220. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  221. EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: false);
  222. }
  223. public static void EmitScalarTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
  224. {
  225. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  226. EmitScalarOpByElemF(Context, Emit, Op.Index, Ternary: true);
  227. }
  228. public static void EmitScalarOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
  229. {
  230. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  231. int SizeF = Op.Size & 1;
  232. if (Ternary)
  233. {
  234. EmitVectorExtractF(Context, Op.Rd, 0, SizeF);
  235. }
  236. EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
  237. EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
  238. Emit();
  239. EmitScalarSetF(Context, Op.Rd, SizeF);
  240. }
  241. public static void EmitScalarUnaryOpSx(AILEmitterCtx Context, Action Emit)
  242. {
  243. EmitScalarOp(Context, Emit, OperFlags.Rn, true);
  244. }
  245. public static void EmitScalarBinaryOpSx(AILEmitterCtx Context, Action Emit)
  246. {
  247. EmitScalarOp(Context, Emit, OperFlags.RnRm, true);
  248. }
  249. public static void EmitScalarUnaryOpZx(AILEmitterCtx Context, Action Emit)
  250. {
  251. EmitScalarOp(Context, Emit, OperFlags.Rn, false);
  252. }
  253. public static void EmitScalarBinaryOpZx(AILEmitterCtx Context, Action Emit)
  254. {
  255. EmitScalarOp(Context, Emit, OperFlags.RnRm, false);
  256. }
  257. public static void EmitScalarTernaryOpZx(AILEmitterCtx Context, Action Emit)
  258. {
  259. EmitScalarOp(Context, Emit, OperFlags.RdRnRm, false);
  260. }
  261. public static void EmitScalarOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  262. {
  263. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  264. bool Rd = (Opers & OperFlags.Rd) != 0;
  265. bool Rn = (Opers & OperFlags.Rn) != 0;
  266. bool Rm = (Opers & OperFlags.Rm) != 0;
  267. if (Rd)
  268. {
  269. EmitVectorExtract(Context, Op.Rd, 0, Op.Size, Signed);
  270. }
  271. if (Rn)
  272. {
  273. EmitVectorExtract(Context, Op.Rn, 0, Op.Size, Signed);
  274. }
  275. if (Rm)
  276. {
  277. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, 0, Op.Size, Signed);
  278. }
  279. Emit();
  280. EmitScalarSet(Context, Op.Rd, Op.Size);
  281. }
  282. public static void EmitScalarUnaryOpF(AILEmitterCtx Context, Action Emit)
  283. {
  284. EmitScalarOpF(Context, Emit, OperFlags.Rn);
  285. }
  286. public static void EmitScalarBinaryOpF(AILEmitterCtx Context, Action Emit)
  287. {
  288. EmitScalarOpF(Context, Emit, OperFlags.RnRm);
  289. }
  290. public static void EmitScalarTernaryRaOpF(AILEmitterCtx Context, Action Emit)
  291. {
  292. EmitScalarOpF(Context, Emit, OperFlags.RaRnRm);
  293. }
  294. public static void EmitScalarOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  295. {
  296. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  297. int SizeF = Op.Size & 1;
  298. bool Ra = (Opers & OperFlags.Ra) != 0;
  299. bool Rn = (Opers & OperFlags.Rn) != 0;
  300. bool Rm = (Opers & OperFlags.Rm) != 0;
  301. if (Ra)
  302. {
  303. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Ra, 0, SizeF);
  304. }
  305. if (Rn)
  306. {
  307. EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
  308. }
  309. if (Rm)
  310. {
  311. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Rm, 0, SizeF);
  312. }
  313. Emit();
  314. EmitScalarSetF(Context, Op.Rd, SizeF);
  315. }
  316. public static void EmitVectorUnaryOpF(AILEmitterCtx Context, Action Emit)
  317. {
  318. EmitVectorOpF(Context, Emit, OperFlags.Rn);
  319. }
  320. public static void EmitVectorBinaryOpF(AILEmitterCtx Context, Action Emit)
  321. {
  322. EmitVectorOpF(Context, Emit, OperFlags.RnRm);
  323. }
  324. public static void EmitVectorTernaryOpF(AILEmitterCtx Context, Action Emit)
  325. {
  326. EmitVectorOpF(Context, Emit, OperFlags.RdRnRm);
  327. }
  328. public static void EmitVectorOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  329. {
  330. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  331. int SizeF = Op.Size & 1;
  332. int Bytes = Op.GetBitsCount() >> 3;
  333. int Elems = Bytes >> SizeF + 2;
  334. bool Rd = (Opers & OperFlags.Rd) != 0;
  335. bool Rn = (Opers & OperFlags.Rn) != 0;
  336. bool Rm = (Opers & OperFlags.Rm) != 0;
  337. for (int Index = 0; Index < Elems; Index++)
  338. {
  339. if (Rd)
  340. {
  341. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  342. }
  343. if (Rn)
  344. {
  345. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  346. }
  347. if (Rm)
  348. {
  349. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Rm, Index, SizeF);
  350. }
  351. Emit();
  352. EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
  353. }
  354. if (Op.RegisterSize == ARegisterSize.SIMD64)
  355. {
  356. EmitVectorZeroUpper(Context, Op.Rd);
  357. }
  358. }
  359. public static void EmitVectorBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
  360. {
  361. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  362. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: false);
  363. }
  364. public static void EmitVectorTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
  365. {
  366. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  367. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: true);
  368. }
  369. public static void EmitVectorOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
  370. {
  371. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  372. int SizeF = Op.Size & 1;
  373. int Bytes = Op.GetBitsCount() >> 3;
  374. int Elems = Bytes >> SizeF + 2;
  375. for (int Index = 0; Index < Elems; Index++)
  376. {
  377. if (Ternary)
  378. {
  379. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  380. }
  381. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  382. EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
  383. Emit();
  384. EmitVectorInsertTmpF(Context, Index, SizeF);
  385. }
  386. Context.EmitLdvectmp();
  387. Context.EmitStvec(Op.Rd);
  388. if (Op.RegisterSize == ARegisterSize.SIMD64)
  389. {
  390. EmitVectorZeroUpper(Context, Op.Rd);
  391. }
  392. }
  393. public static void EmitVectorUnaryOpSx(AILEmitterCtx Context, Action Emit)
  394. {
  395. EmitVectorOp(Context, Emit, OperFlags.Rn, true);
  396. }
  397. public static void EmitVectorBinaryOpSx(AILEmitterCtx Context, Action Emit)
  398. {
  399. EmitVectorOp(Context, Emit, OperFlags.RnRm, true);
  400. }
  401. public static void EmitVectorTernaryOpSx(AILEmitterCtx Context, Action Emit)
  402. {
  403. EmitVectorOp(Context, Emit, OperFlags.RdRnRm, true);
  404. }
  405. public static void EmitVectorUnaryOpZx(AILEmitterCtx Context, Action Emit)
  406. {
  407. EmitVectorOp(Context, Emit, OperFlags.Rn, false);
  408. }
  409. public static void EmitVectorBinaryOpZx(AILEmitterCtx Context, Action Emit)
  410. {
  411. EmitVectorOp(Context, Emit, OperFlags.RnRm, false);
  412. }
  413. public static void EmitVectorTernaryOpZx(AILEmitterCtx Context, Action Emit)
  414. {
  415. EmitVectorOp(Context, Emit, OperFlags.RdRnRm, false);
  416. }
  417. public static void EmitVectorOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  418. {
  419. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  420. int Bytes = Op.GetBitsCount() >> 3;
  421. int Elems = Bytes >> Op.Size;
  422. bool Rd = (Opers & OperFlags.Rd) != 0;
  423. bool Rn = (Opers & OperFlags.Rn) != 0;
  424. bool Rm = (Opers & OperFlags.Rm) != 0;
  425. for (int Index = 0; Index < Elems; Index++)
  426. {
  427. if (Rd)
  428. {
  429. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  430. }
  431. if (Rn)
  432. {
  433. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  434. }
  435. if (Rm)
  436. {
  437. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  438. }
  439. Emit();
  440. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  441. }
  442. if (Op.RegisterSize == ARegisterSize.SIMD64)
  443. {
  444. EmitVectorZeroUpper(Context, Op.Rd);
  445. }
  446. }
  447. public static void EmitVectorBinaryOpByElemSx(AILEmitterCtx Context, Action Emit)
  448. {
  449. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  450. EmitVectorOpByElem(Context, Emit, Op.Index, false, true);
  451. }
  452. public static void EmitVectorBinaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  453. {
  454. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  455. EmitVectorOpByElem(Context, Emit, Op.Index, false, false);
  456. }
  457. public static void EmitVectorTernaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  458. {
  459. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  460. EmitVectorOpByElem(Context, Emit, Op.Index, true, false);
  461. }
  462. public static void EmitVectorOpByElem(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary, bool Signed)
  463. {
  464. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  465. int Bytes = Op.GetBitsCount() >> 3;
  466. int Elems = Bytes >> Op.Size;
  467. for (int Index = 0; Index < Elems; Index++)
  468. {
  469. if (Ternary)
  470. {
  471. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  472. }
  473. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  474. EmitVectorExtract(Context, Op.Rm, Elem, Op.Size, Signed);
  475. Emit();
  476. EmitVectorInsertTmp(Context, Index, Op.Size);
  477. }
  478. Context.EmitLdvectmp();
  479. Context.EmitStvec(Op.Rd);
  480. if (Op.RegisterSize == ARegisterSize.SIMD64)
  481. {
  482. EmitVectorZeroUpper(Context, Op.Rd);
  483. }
  484. }
  485. public static void EmitVectorImmUnaryOp(AILEmitterCtx Context, Action Emit)
  486. {
  487. EmitVectorImmOp(Context, Emit, false);
  488. }
  489. public static void EmitVectorImmBinaryOp(AILEmitterCtx Context, Action Emit)
  490. {
  491. EmitVectorImmOp(Context, Emit, true);
  492. }
  493. public static void EmitVectorImmOp(AILEmitterCtx Context, Action Emit, bool Binary)
  494. {
  495. AOpCodeSimdImm Op = (AOpCodeSimdImm)Context.CurrOp;
  496. int Bytes = Op.GetBitsCount() >> 3;
  497. int Elems = Bytes >> Op.Size;
  498. for (int Index = 0; Index < Elems; Index++)
  499. {
  500. if (Binary)
  501. {
  502. EmitVectorExtractZx(Context, Op.Rd, Index, Op.Size);
  503. }
  504. Context.EmitLdc_I8(Op.Imm);
  505. Emit();
  506. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  507. }
  508. if (Op.RegisterSize == ARegisterSize.SIMD64)
  509. {
  510. EmitVectorZeroUpper(Context, Op.Rd);
  511. }
  512. }
  513. public static void EmitVectorWidenRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  514. {
  515. EmitVectorWidenRmBinaryOp(Context, Emit, true);
  516. }
  517. public static void EmitVectorWidenRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  518. {
  519. EmitVectorWidenRmBinaryOp(Context, Emit, false);
  520. }
  521. public static void EmitVectorWidenRmBinaryOp(AILEmitterCtx Context, Action Emit, bool Signed)
  522. {
  523. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  524. int Elems = 8 >> Op.Size;
  525. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  526. for (int Index = 0; Index < Elems; Index++)
  527. {
  528. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, Signed);
  529. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  530. Emit();
  531. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  532. }
  533. Context.EmitLdvectmp();
  534. Context.EmitStvec(Op.Rd);
  535. }
  536. public static void EmitVectorWidenRnRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  537. {
  538. EmitVectorWidenRnRmOp(Context, Emit, false, true);
  539. }
  540. public static void EmitVectorWidenRnRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  541. {
  542. EmitVectorWidenRnRmOp(Context, Emit, false, false);
  543. }
  544. public static void EmitVectorWidenRnRmTernaryOpSx(AILEmitterCtx Context, Action Emit)
  545. {
  546. EmitVectorWidenRnRmOp(Context, Emit, true, true);
  547. }
  548. public static void EmitVectorWidenRnRmTernaryOpZx(AILEmitterCtx Context, Action Emit)
  549. {
  550. EmitVectorWidenRnRmOp(Context, Emit, true, false);
  551. }
  552. public static void EmitVectorWidenRnRmOp(AILEmitterCtx Context, Action Emit, bool Ternary, bool Signed)
  553. {
  554. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  555. int Elems = 8 >> Op.Size;
  556. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  557. for (int Index = 0; Index < Elems; Index++)
  558. {
  559. if (Ternary)
  560. {
  561. EmitVectorExtract(Context, Op.Rd, Index, Op.Size + 1, Signed);
  562. }
  563. EmitVectorExtract(Context, Op.Rn, Part + Index, Op.Size, Signed);
  564. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  565. Emit();
  566. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  567. }
  568. Context.EmitLdvectmp();
  569. Context.EmitStvec(Op.Rd);
  570. }
  571. public static void EmitVectorPairwiseOpSx(AILEmitterCtx Context, Action Emit)
  572. {
  573. EmitVectorPairwiseOp(Context, Emit, true);
  574. }
  575. public static void EmitVectorPairwiseOpZx(AILEmitterCtx Context, Action Emit)
  576. {
  577. EmitVectorPairwiseOp(Context, Emit, false);
  578. }
  579. public static void EmitVectorPairwiseOp(AILEmitterCtx Context, Action Emit, bool Signed)
  580. {
  581. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  582. int Words = Op.GetBitsCount() >> 4;
  583. int Pairs = Words >> Op.Size;
  584. for (int Index = 0; Index < Pairs; Index++)
  585. {
  586. int Idx = Index << 1;
  587. EmitVectorExtract(Context, Op.Rn, Idx, Op.Size, Signed);
  588. EmitVectorExtract(Context, Op.Rn, Idx + 1, Op.Size, Signed);
  589. Emit();
  590. EmitVectorExtract(Context, Op.Rm, Idx, Op.Size, Signed);
  591. EmitVectorExtract(Context, Op.Rm, Idx + 1, Op.Size, Signed);
  592. Emit();
  593. EmitVectorInsertTmp(Context, Pairs + Index, Op.Size);
  594. EmitVectorInsertTmp(Context, Index, Op.Size);
  595. }
  596. Context.EmitLdvectmp();
  597. Context.EmitStvec(Op.Rd);
  598. if (Op.RegisterSize == ARegisterSize.SIMD64)
  599. {
  600. EmitVectorZeroUpper(Context, Op.Rd);
  601. }
  602. }
  603. [Flags]
  604. public enum SaturatingFlags
  605. {
  606. Scalar = 1 << 0,
  607. Signed = 1 << 1,
  608. Add = 1 << 2,
  609. Sub = 1 << 3,
  610. Accumulate = 1 << 4,
  611. ScalarSx = Scalar | Signed,
  612. ScalarZx = Scalar,
  613. VectorSx = Signed,
  614. VectorZx = 0,
  615. }
  616. public static void EmitScalarSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit)
  617. {
  618. EmitSaturatingUnaryOpSx(Context, Emit, SaturatingFlags.ScalarSx);
  619. }
  620. public static void EmitVectorSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit)
  621. {
  622. EmitSaturatingUnaryOpSx(Context, Emit, SaturatingFlags.VectorSx);
  623. }
  624. public static void EmitSaturatingUnaryOpSx(AILEmitterCtx Context, Action Emit, SaturatingFlags Flags)
  625. {
  626. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  627. bool Scalar = (Flags & SaturatingFlags.Scalar) != 0;
  628. int Bytes = Op.GetBitsCount() >> 3;
  629. int Elems = !Scalar ? Bytes >> Op.Size : 1;
  630. if (Scalar)
  631. {
  632. EmitVectorZeroLowerTmp(Context);
  633. }
  634. for (int Index = 0; Index < Elems; Index++)
  635. {
  636. EmitVectorExtractSx(Context, Op.Rn, Index, Op.Size);
  637. Emit();
  638. EmitUnarySignedSatQAbsOrNeg(Context, Op.Size);
  639. EmitVectorInsertTmp(Context, Index, Op.Size);
  640. }
  641. Context.EmitLdvectmp();
  642. Context.EmitStvec(Op.Rd);
  643. if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
  644. {
  645. EmitVectorZeroUpper(Context, Op.Rd);
  646. }
  647. }
  648. public static void EmitScalarSaturatingBinaryOpSx(AILEmitterCtx Context, SaturatingFlags Flags)
  649. {
  650. EmitSaturatingBinaryOp(Context, SaturatingFlags.ScalarSx | Flags);
  651. }
  652. public static void EmitScalarSaturatingBinaryOpZx(AILEmitterCtx Context, SaturatingFlags Flags)
  653. {
  654. EmitSaturatingBinaryOp(Context, SaturatingFlags.ScalarZx | Flags);
  655. }
  656. public static void EmitVectorSaturatingBinaryOpSx(AILEmitterCtx Context, SaturatingFlags Flags)
  657. {
  658. EmitSaturatingBinaryOp(Context, SaturatingFlags.VectorSx | Flags);
  659. }
  660. public static void EmitVectorSaturatingBinaryOpZx(AILEmitterCtx Context, SaturatingFlags Flags)
  661. {
  662. EmitSaturatingBinaryOp(Context, SaturatingFlags.VectorZx | Flags);
  663. }
  664. public static void EmitSaturatingBinaryOp(AILEmitterCtx Context, SaturatingFlags Flags)
  665. {
  666. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  667. bool Scalar = (Flags & SaturatingFlags.Scalar) != 0;
  668. bool Signed = (Flags & SaturatingFlags.Signed) != 0;
  669. bool Add = (Flags & SaturatingFlags.Add) != 0;
  670. bool Sub = (Flags & SaturatingFlags.Sub) != 0;
  671. bool Accumulate = (Flags & SaturatingFlags.Accumulate) != 0;
  672. int Bytes = Op.GetBitsCount() >> 3;
  673. int Elems = !Scalar ? Bytes >> Op.Size : 1;
  674. if (Scalar)
  675. {
  676. EmitVectorZeroLowerTmp(Context);
  677. }
  678. if (Add || Sub)
  679. {
  680. for (int Index = 0; Index < Elems; Index++)
  681. {
  682. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  683. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  684. if (Op.Size <= 2)
  685. {
  686. Context.Emit(Add ? OpCodes.Add : OpCodes.Sub);
  687. EmitSatQ(Context, Op.Size, true, Signed);
  688. }
  689. else /* if (Op.Size == 3) */
  690. {
  691. if (Add)
  692. {
  693. EmitBinarySatQAdd(Context, Signed);
  694. }
  695. else /* if (Sub) */
  696. {
  697. EmitBinarySatQSub(Context, Signed);
  698. }
  699. }
  700. EmitVectorInsertTmp(Context, Index, Op.Size);
  701. }
  702. }
  703. else if (Accumulate)
  704. {
  705. for (int Index = 0; Index < Elems; Index++)
  706. {
  707. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, !Signed);
  708. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  709. if (Op.Size <= 2)
  710. {
  711. Context.Emit(OpCodes.Add);
  712. EmitSatQ(Context, Op.Size, true, Signed);
  713. }
  714. else /* if (Op.Size == 3) */
  715. {
  716. EmitBinarySatQAccumulate(Context, Signed);
  717. }
  718. EmitVectorInsertTmp(Context, Index, Op.Size);
  719. }
  720. }
  721. Context.EmitLdvectmp();
  722. Context.EmitStvec(Op.Rd);
  723. if ((Op.RegisterSize == ARegisterSize.SIMD64) || Scalar)
  724. {
  725. EmitVectorZeroUpper(Context, Op.Rd);
  726. }
  727. }
  728. [Flags]
  729. public enum SaturatingNarrowFlags
  730. {
  731. Scalar = 1 << 0,
  732. SignedSrc = 1 << 1,
  733. SignedDst = 1 << 2,
  734. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  735. ScalarSxZx = Scalar | SignedSrc,
  736. ScalarZxSx = Scalar | SignedDst,
  737. ScalarZxZx = Scalar,
  738. VectorSxSx = SignedSrc | SignedDst,
  739. VectorSxZx = SignedSrc,
  740. VectorZxSx = SignedDst,
  741. VectorZxZx = 0
  742. }
  743. public static void EmitScalarSaturatingNarrowOpSxSx(AILEmitterCtx Context, Action Emit)
  744. {
  745. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.ScalarSxSx);
  746. }
  747. public static void EmitScalarSaturatingNarrowOpSxZx(AILEmitterCtx Context, Action Emit)
  748. {
  749. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.ScalarSxZx);
  750. }
  751. public static void EmitScalarSaturatingNarrowOpZxSx(AILEmitterCtx Context, Action Emit)
  752. {
  753. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.ScalarZxSx);
  754. }
  755. public static void EmitScalarSaturatingNarrowOpZxZx(AILEmitterCtx Context, Action Emit)
  756. {
  757. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.ScalarZxZx);
  758. }
  759. public static void EmitVectorSaturatingNarrowOpSxSx(AILEmitterCtx Context, Action Emit)
  760. {
  761. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.VectorSxSx);
  762. }
  763. public static void EmitVectorSaturatingNarrowOpSxZx(AILEmitterCtx Context, Action Emit)
  764. {
  765. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.VectorSxZx);
  766. }
  767. public static void EmitVectorSaturatingNarrowOpZxSx(AILEmitterCtx Context, Action Emit)
  768. {
  769. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.VectorZxSx);
  770. }
  771. public static void EmitVectorSaturatingNarrowOpZxZx(AILEmitterCtx Context, Action Emit)
  772. {
  773. EmitSaturatingNarrowOp(Context, Emit, SaturatingNarrowFlags.VectorZxZx);
  774. }
  775. public static void EmitSaturatingNarrowOp(AILEmitterCtx Context, Action Emit, SaturatingNarrowFlags Flags)
  776. {
  777. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  778. bool Scalar = (Flags & SaturatingNarrowFlags.Scalar) != 0;
  779. bool SignedSrc = (Flags & SaturatingNarrowFlags.SignedSrc) != 0;
  780. bool SignedDst = (Flags & SaturatingNarrowFlags.SignedDst) != 0;
  781. int Elems = !Scalar ? 8 >> Op.Size : 1;
  782. int Part = !Scalar && (Op.RegisterSize == ARegisterSize.SIMD128) ? Elems : 0;
  783. if (Scalar)
  784. {
  785. EmitVectorZeroLowerTmp(Context);
  786. }
  787. if (Part != 0)
  788. {
  789. Context.EmitLdvec(Op.Rd);
  790. Context.EmitStvectmp();
  791. }
  792. for (int Index = 0; Index < Elems; Index++)
  793. {
  794. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, SignedSrc);
  795. Emit();
  796. EmitSatQ(Context, Op.Size, SignedSrc, SignedDst);
  797. EmitVectorInsertTmp(Context, Part + Index, Op.Size);
  798. }
  799. Context.EmitLdvectmp();
  800. Context.EmitStvec(Op.Rd);
  801. if (Part == 0)
  802. {
  803. EmitVectorZeroUpper(Context, Op.Rd);
  804. }
  805. }
  806. // TSrc (16bit, 32bit, 64bit; signed, unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  807. public static void EmitSatQ(
  808. AILEmitterCtx Context,
  809. int SizeDst,
  810. bool SignedSrc,
  811. bool SignedDst)
  812. {
  813. if (SizeDst > 2)
  814. {
  815. throw new ArgumentOutOfRangeException(nameof(SizeDst));
  816. }
  817. Context.EmitLdc_I4(SizeDst);
  818. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  819. if (SignedSrc)
  820. {
  821. ASoftFallback.EmitCall(Context, SignedDst
  822. ? nameof(ASoftFallback.SignedSrcSignedDstSatQ)
  823. : nameof(ASoftFallback.SignedSrcUnsignedDstSatQ));
  824. }
  825. else
  826. {
  827. ASoftFallback.EmitCall(Context, SignedDst
  828. ? nameof(ASoftFallback.UnsignedSrcSignedDstSatQ)
  829. : nameof(ASoftFallback.UnsignedSrcUnsignedDstSatQ));
  830. }
  831. }
  832. // TSrc (8bit, 16bit, 32bit, 64bit) == TDst (8bit, 16bit, 32bit, 64bit); signed.
  833. public static void EmitUnarySignedSatQAbsOrNeg(AILEmitterCtx Context, int Size)
  834. {
  835. int ESize = 8 << Size;
  836. long TMaxValue = (1L << (ESize - 1)) - 1L;
  837. long TMinValue = -(1L << (ESize - 1));
  838. AILLabel LblFalse = new AILLabel();
  839. Context.Emit(OpCodes.Dup);
  840. Context.Emit(OpCodes.Neg);
  841. Context.EmitLdc_I8(TMinValue);
  842. Context.Emit(OpCodes.Ceq);
  843. Context.Emit(OpCodes.Brfalse_S, LblFalse);
  844. Context.Emit(OpCodes.Pop);
  845. EmitSetFpsrQCFlag(Context);
  846. Context.EmitLdc_I8(TMaxValue);
  847. Context.MarkLabel(LblFalse);
  848. }
  849. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  850. public static void EmitBinarySatQAdd(AILEmitterCtx Context, bool Signed)
  851. {
  852. if (((AOpCodeSimdReg)Context.CurrOp).Size < 3)
  853. {
  854. throw new InvalidOperationException();
  855. }
  856. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  857. ASoftFallback.EmitCall(Context, Signed
  858. ? nameof(ASoftFallback.BinarySignedSatQAdd)
  859. : nameof(ASoftFallback.BinaryUnsignedSatQAdd));
  860. }
  861. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  862. public static void EmitBinarySatQSub(AILEmitterCtx Context, bool Signed)
  863. {
  864. if (((AOpCodeSimdReg)Context.CurrOp).Size < 3)
  865. {
  866. throw new InvalidOperationException();
  867. }
  868. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  869. ASoftFallback.EmitCall(Context, Signed
  870. ? nameof(ASoftFallback.BinarySignedSatQSub)
  871. : nameof(ASoftFallback.BinaryUnsignedSatQSub));
  872. }
  873. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  874. public static void EmitBinarySatQAccumulate(AILEmitterCtx Context, bool Signed)
  875. {
  876. if (((AOpCodeSimd)Context.CurrOp).Size < 3)
  877. {
  878. throw new InvalidOperationException();
  879. }
  880. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  881. ASoftFallback.EmitCall(Context, Signed
  882. ? nameof(ASoftFallback.BinarySignedSatQAcc)
  883. : nameof(ASoftFallback.BinaryUnsignedSatQAcc));
  884. }
  885. public static void EmitSetFpsrQCFlag(AILEmitterCtx Context)
  886. {
  887. const int QCFlagBit = 27;
  888. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  889. Context.EmitLdarg(ATranslatedSub.StateArgIdx);
  890. Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpsr));
  891. Context.EmitLdc_I4(1 << QCFlagBit);
  892. Context.Emit(OpCodes.Or);
  893. Context.EmitCallPropSet(typeof(AThreadState), nameof(AThreadState.Fpsr));
  894. }
  895. public static void EmitScalarSet(AILEmitterCtx Context, int Reg, int Size)
  896. {
  897. EmitVectorZeroAll(Context, Reg);
  898. EmitVectorInsert(Context, Reg, 0, Size);
  899. }
  900. public static void EmitScalarSetF(AILEmitterCtx Context, int Reg, int Size)
  901. {
  902. EmitVectorZeroAll(Context, Reg);
  903. EmitVectorInsertF(Context, Reg, 0, Size);
  904. }
  905. public static void EmitVectorExtractSx(AILEmitterCtx Context, int Reg, int Index, int Size)
  906. {
  907. EmitVectorExtract(Context, Reg, Index, Size, true);
  908. }
  909. public static void EmitVectorExtractZx(AILEmitterCtx Context, int Reg, int Index, int Size)
  910. {
  911. EmitVectorExtract(Context, Reg, Index, Size, false);
  912. }
  913. public static void EmitVectorExtract(AILEmitterCtx Context, int Reg, int Index, int Size, bool Signed)
  914. {
  915. ThrowIfInvalid(Index, Size);
  916. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  917. Context.EmitLdvec(Reg);
  918. Context.EmitLdc_I4(Index);
  919. Context.EmitLdc_I4(Size);
  920. AVectorHelper.EmitCall(Context, Signed
  921. ? nameof(AVectorHelper.VectorExtractIntSx)
  922. : nameof(AVectorHelper.VectorExtractIntZx));
  923. }
  924. public static void EmitVectorExtractF(AILEmitterCtx Context, int Reg, int Index, int Size)
  925. {
  926. ThrowIfInvalidF(Index, Size);
  927. Context.EmitLdvec(Reg);
  928. Context.EmitLdc_I4(Index);
  929. if (Size == 0)
  930. {
  931. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorExtractSingle));
  932. }
  933. else if (Size == 1)
  934. {
  935. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorExtractDouble));
  936. }
  937. else
  938. {
  939. throw new ArgumentOutOfRangeException(nameof(Size));
  940. }
  941. }
  942. public static void EmitVectorZeroAll(AILEmitterCtx Context, int Rd)
  943. {
  944. EmitVectorZeroLower(Context, Rd);
  945. EmitVectorZeroUpper(Context, Rd);
  946. }
  947. public static void EmitVectorZeroLower(AILEmitterCtx Context, int Rd)
  948. {
  949. EmitVectorInsert(Context, Rd, 0, 3, 0);
  950. }
  951. public static void EmitVectorZeroLowerTmp(AILEmitterCtx Context)
  952. {
  953. EmitVectorInsertTmp(Context, 0, 3, 0);
  954. }
  955. public static void EmitVectorZeroUpper(AILEmitterCtx Context, int Rd)
  956. {
  957. EmitVectorInsert(Context, Rd, 1, 3, 0);
  958. }
  959. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size)
  960. {
  961. ThrowIfInvalid(Index, Size);
  962. Context.EmitLdvec(Reg);
  963. Context.EmitLdc_I4(Index);
  964. Context.EmitLdc_I4(Size);
  965. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  966. Context.EmitStvec(Reg);
  967. }
  968. public static void EmitVectorInsertTmp(AILEmitterCtx Context, int Index, int Size)
  969. {
  970. ThrowIfInvalid(Index, Size);
  971. Context.EmitLdvectmp();
  972. Context.EmitLdc_I4(Index);
  973. Context.EmitLdc_I4(Size);
  974. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  975. Context.EmitStvectmp();
  976. }
  977. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size, long Value)
  978. {
  979. ThrowIfInvalid(Index, Size);
  980. Context.EmitLdc_I8(Value);
  981. Context.EmitLdvec(Reg);
  982. Context.EmitLdc_I4(Index);
  983. Context.EmitLdc_I4(Size);
  984. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  985. Context.EmitStvec(Reg);
  986. }
  987. public static void EmitVectorInsertTmp(AILEmitterCtx Context, int Index, int Size, long Value)
  988. {
  989. ThrowIfInvalid(Index, Size);
  990. Context.EmitLdc_I8(Value);
  991. Context.EmitLdvectmp();
  992. Context.EmitLdc_I4(Index);
  993. Context.EmitLdc_I4(Size);
  994. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertInt));
  995. Context.EmitStvectmp();
  996. }
  997. public static void EmitVectorInsertF(AILEmitterCtx Context, int Reg, int Index, int Size)
  998. {
  999. ThrowIfInvalidF(Index, Size);
  1000. Context.EmitLdvec(Reg);
  1001. Context.EmitLdc_I4(Index);
  1002. if (Size == 0)
  1003. {
  1004. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertSingle));
  1005. }
  1006. else if (Size == 1)
  1007. {
  1008. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertDouble));
  1009. }
  1010. else
  1011. {
  1012. throw new ArgumentOutOfRangeException(nameof(Size));
  1013. }
  1014. Context.EmitStvec(Reg);
  1015. }
  1016. public static void EmitVectorInsertTmpF(AILEmitterCtx Context, int Index, int Size)
  1017. {
  1018. ThrowIfInvalidF(Index, Size);
  1019. Context.EmitLdvectmp();
  1020. Context.EmitLdc_I4(Index);
  1021. if (Size == 0)
  1022. {
  1023. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertSingle));
  1024. }
  1025. else if (Size == 1)
  1026. {
  1027. AVectorHelper.EmitCall(Context, nameof(AVectorHelper.VectorInsertDouble));
  1028. }
  1029. else
  1030. {
  1031. throw new ArgumentOutOfRangeException(nameof(Size));
  1032. }
  1033. Context.EmitStvectmp();
  1034. }
  1035. private static void ThrowIfInvalid(int Index, int Size)
  1036. {
  1037. if ((uint)Size > 3)
  1038. {
  1039. throw new ArgumentOutOfRangeException(nameof(Size));
  1040. }
  1041. if ((uint)Index >= 16 >> Size)
  1042. {
  1043. throw new ArgumentOutOfRangeException(nameof(Index));
  1044. }
  1045. }
  1046. private static void ThrowIfInvalidF(int Index, int Size)
  1047. {
  1048. if ((uint)Size > 1)
  1049. {
  1050. throw new ArgumentOutOfRangeException(nameof(Size));
  1051. }
  1052. if ((uint)Index >= 4 >> Size)
  1053. {
  1054. throw new ArgumentOutOfRangeException(nameof(Index));
  1055. }
  1056. }
  1057. }
  1058. }