CpuTestBfm.cs 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
  1. //#define Bfm
  2. using NUnit.Framework;
  3. namespace Ryujinx.Tests.Cpu
  4. {
  5. [Category("Bfm"), Ignore("Tested: first half of 2018.")]
  6. public sealed class CpuTestBfm : CpuTest
  7. {
  8. #if Bfm
  9. [SetUp]
  10. public void SetupTester()
  11. {
  12. AArch64.TakeReset(false);
  13. }
  14. [Test, Description("BFM <Xd>, <Xn>, #<immr>, #<imms>")]
  15. public void Bfm_64bit([Values(0u, 31u)] uint Rd,
  16. [Values(1u, 31u)] uint Rn,
  17. [Random(2)] ulong _Xd,
  18. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  19. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(2)] ulong Xn,
  20. [Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, 2)] uint immr,
  21. [Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, 2)] uint imms)
  22. {
  23. uint Opcode = 0xB3400000; // BFM X0, X0, #0, #0
  24. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  25. Opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
  26. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  27. AThreadState ThreadState = SingleOpcode(Opcode, X0: _Xd, X1: Xn, X31: _X31);
  28. if (Rd != 31)
  29. {
  30. Bits Op = new Bits(Opcode);
  31. AArch64.X((int)Rd, new Bits(_Xd));
  32. AArch64.X((int)Rn, new Bits(Xn));
  33. Base.Bfm(Op[31], Op[22], Op[21, 16], Op[15, 10], Op[9, 5], Op[4, 0]);
  34. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  35. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  36. }
  37. else
  38. {
  39. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  40. }
  41. }
  42. [Test, Description("BFM <Wd>, <Wn>, #<immr>, #<imms>")]
  43. public void Bfm_32bit([Values(0u, 31u)] uint Rd,
  44. [Values(1u, 31u)] uint Rn,
  45. [Random(2)] uint _Wd,
  46. [Values(0x00000000u, 0x7FFFFFFFu,
  47. 0x80000000u, 0xFFFFFFFFu)] [Random(2)] uint Wn,
  48. [Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, 2)] uint immr,
  49. [Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, 2)] uint imms)
  50. {
  51. uint Opcode = 0x33000000; // BFM W0, W0, #0, #0
  52. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  53. Opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
  54. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  55. AThreadState ThreadState = SingleOpcode(Opcode, X0: _Wd, X1: Wn, X31: _W31);
  56. if (Rd != 31)
  57. {
  58. Bits Op = new Bits(Opcode);
  59. AArch64.X((int)Rd, new Bits(_Wd));
  60. AArch64.X((int)Rn, new Bits(Wn));
  61. Base.Bfm(Op[31], Op[22], Op[21, 16], Op[15, 10], Op[9, 5], Op[4, 0]);
  62. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  63. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  64. }
  65. else
  66. {
  67. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  68. }
  69. }
  70. [Test, Description("SBFM <Xd>, <Xn>, #<immr>, #<imms>")]
  71. public void Sbfm_64bit([Values(0u, 31u)] uint Rd,
  72. [Values(1u, 31u)] uint Rn,
  73. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  74. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(2)] ulong Xn,
  75. [Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, 2)] uint immr,
  76. [Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, 2)] uint imms)
  77. {
  78. uint Opcode = 0x93400000; // SBFM X0, X0, #0, #0
  79. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  80. Opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
  81. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  82. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  83. if (Rd != 31)
  84. {
  85. Bits Op = new Bits(Opcode);
  86. AArch64.X((int)Rn, new Bits(Xn));
  87. Base.Sbfm(Op[31], Op[22], Op[21, 16], Op[15, 10], Op[9, 5], Op[4, 0]);
  88. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  89. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  90. }
  91. else
  92. {
  93. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  94. }
  95. }
  96. [Test, Description("SBFM <Wd>, <Wn>, #<immr>, #<imms>")]
  97. public void Sbfm_32bit([Values(0u, 31u)] uint Rd,
  98. [Values(1u, 31u)] uint Rn,
  99. [Values(0x00000000u, 0x7FFFFFFFu,
  100. 0x80000000u, 0xFFFFFFFFu)] [Random(2)] uint Wn,
  101. [Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, 2)] uint immr,
  102. [Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, 2)] uint imms)
  103. {
  104. uint Opcode = 0x13000000; // SBFM W0, W0, #0, #0
  105. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  106. Opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
  107. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  108. AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
  109. if (Rd != 31)
  110. {
  111. Bits Op = new Bits(Opcode);
  112. AArch64.X((int)Rn, new Bits(Wn));
  113. Base.Sbfm(Op[31], Op[22], Op[21, 16], Op[15, 10], Op[9, 5], Op[4, 0]);
  114. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  115. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  116. }
  117. else
  118. {
  119. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  120. }
  121. }
  122. [Test, Description("UBFM <Xd>, <Xn>, #<immr>, #<imms>")]
  123. public void Ubfm_64bit([Values(0u, 31u)] uint Rd,
  124. [Values(1u, 31u)] uint Rn,
  125. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  126. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(2)] ulong Xn,
  127. [Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, 2)] uint immr,
  128. [Values(0u, 31u, 32u, 63u)] [Random(0u, 63u, 2)] uint imms)
  129. {
  130. uint Opcode = 0xD3400000; // UBFM X0, X0, #0, #0
  131. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  132. Opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
  133. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  134. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  135. if (Rd != 31)
  136. {
  137. Bits Op = new Bits(Opcode);
  138. AArch64.X((int)Rn, new Bits(Xn));
  139. Base.Ubfm(Op[31], Op[22], Op[21, 16], Op[15, 10], Op[9, 5], Op[4, 0]);
  140. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  141. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  142. }
  143. else
  144. {
  145. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  146. }
  147. }
  148. [Test, Description("UBFM <Wd>, <Wn>, #<immr>, #<imms>")]
  149. public void Ubfm_32bit([Values(0u, 31u)] uint Rd,
  150. [Values(1u, 31u)] uint Rn,
  151. [Values(0x00000000u, 0x7FFFFFFFu,
  152. 0x80000000u, 0xFFFFFFFFu)] [Random(2)] uint Wn,
  153. [Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, 2)] uint immr,
  154. [Values(0u, 15u, 16u, 31u)] [Random(0u, 31u, 2)] uint imms)
  155. {
  156. uint Opcode = 0x53000000; // UBFM W0, W0, #0, #0
  157. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  158. Opcode |= ((immr & 63) << 16) | ((imms & 63) << 10);
  159. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  160. AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
  161. if (Rd != 31)
  162. {
  163. Bits Op = new Bits(Opcode);
  164. AArch64.X((int)Rn, new Bits(Wn));
  165. Base.Ubfm(Op[31], Op[22], Op[21, 16], Op[15, 10], Op[9, 5], Op[4, 0]);
  166. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  167. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  168. }
  169. else
  170. {
  171. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  172. }
  173. }
  174. #endif
  175. }
  176. }