CpuTestAlu.cs 12 KB

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  1. //#define Alu
  2. using NUnit.Framework;
  3. namespace Ryujinx.Tests.Cpu
  4. {
  5. [Category("Alu"), Ignore("Tested: first half of 2018.")]
  6. public sealed class CpuTestAlu : CpuTest
  7. {
  8. #if Alu
  9. [SetUp]
  10. public void SetupTester()
  11. {
  12. AArch64.TakeReset(false);
  13. }
  14. [Test, Description("CLS <Xd>, <Xn>")]
  15. public void Cls_64bit([Values(0u, 31u)] uint Rd,
  16. [Values(1u, 31u)] uint Rn,
  17. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  18. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(256)] ulong Xn)
  19. {
  20. uint Opcode = 0xDAC01400; // CLS X0, X0
  21. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  22. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  23. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  24. if (Rd != 31)
  25. {
  26. Bits Op = new Bits(Opcode);
  27. AArch64.X((int)Rn, new Bits(Xn));
  28. Base.Cls(Op[31], Op[9, 5], Op[4, 0]);
  29. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  30. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  31. }
  32. else
  33. {
  34. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  35. }
  36. }
  37. [Test, Description("CLS <Wd>, <Wn>")]
  38. public void Cls_32bit([Values(0u, 31u)] uint Rd,
  39. [Values(1u, 31u)] uint Rn,
  40. [Values(0x00000000u, 0x7FFFFFFFu,
  41. 0x80000000u, 0xFFFFFFFFu)] [Random(256)] uint Wn)
  42. {
  43. uint Opcode = 0x5AC01400; // CLS W0, W0
  44. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  45. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  46. AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
  47. if (Rd != 31)
  48. {
  49. Bits Op = new Bits(Opcode);
  50. AArch64.X((int)Rn, new Bits(Wn));
  51. Base.Cls(Op[31], Op[9, 5], Op[4, 0]);
  52. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  53. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  54. }
  55. else
  56. {
  57. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  58. }
  59. }
  60. [Test, Description("CLZ <Xd>, <Xn>")]
  61. public void Clz_64bit([Values(0u, 31u)] uint Rd,
  62. [Values(1u, 31u)] uint Rn,
  63. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  64. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(256)] ulong Xn)
  65. {
  66. uint Opcode = 0xDAC01000; // CLZ X0, X0
  67. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  68. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  69. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  70. if (Rd != 31)
  71. {
  72. Bits Op = new Bits(Opcode);
  73. AArch64.X((int)Rn, new Bits(Xn));
  74. Base.Clz(Op[31], Op[9, 5], Op[4, 0]);
  75. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  76. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  77. }
  78. else
  79. {
  80. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  81. }
  82. }
  83. [Test, Description("CLZ <Wd>, <Wn>")]
  84. public void Clz_32bit([Values(0u, 31u)] uint Rd,
  85. [Values(1u, 31u)] uint Rn,
  86. [Values(0x00000000u, 0x7FFFFFFFu,
  87. 0x80000000u, 0xFFFFFFFFu)] [Random(256)] uint Wn)
  88. {
  89. uint Opcode = 0x5AC01000; // CLZ W0, W0
  90. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  91. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  92. AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
  93. if (Rd != 31)
  94. {
  95. Bits Op = new Bits(Opcode);
  96. AArch64.X((int)Rn, new Bits(Wn));
  97. Base.Clz(Op[31], Op[9, 5], Op[4, 0]);
  98. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  99. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  100. }
  101. else
  102. {
  103. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  104. }
  105. }
  106. [Test, Description("RBIT <Xd>, <Xn>")]
  107. public void Rbit_64bit([Values(0u, 31u)] uint Rd,
  108. [Values(1u, 31u)] uint Rn,
  109. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  110. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(256)] ulong Xn)
  111. {
  112. uint Opcode = 0xDAC00000; // RBIT X0, X0
  113. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  114. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  115. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  116. if (Rd != 31)
  117. {
  118. Bits Op = new Bits(Opcode);
  119. AArch64.X((int)Rn, new Bits(Xn));
  120. Base.Rbit(Op[31], Op[9, 5], Op[4, 0]);
  121. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  122. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  123. }
  124. else
  125. {
  126. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  127. }
  128. }
  129. [Test, Description("RBIT <Wd>, <Wn>")]
  130. public void Rbit_32bit([Values(0u, 31u)] uint Rd,
  131. [Values(1u, 31u)] uint Rn,
  132. [Values(0x00000000u, 0x7FFFFFFFu,
  133. 0x80000000u, 0xFFFFFFFFu)] [Random(256)] uint Wn)
  134. {
  135. uint Opcode = 0x5AC00000; // RBIT W0, W0
  136. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  137. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  138. AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
  139. if (Rd != 31)
  140. {
  141. Bits Op = new Bits(Opcode);
  142. AArch64.X((int)Rn, new Bits(Wn));
  143. Base.Rbit(Op[31], Op[9, 5], Op[4, 0]);
  144. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  145. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  146. }
  147. else
  148. {
  149. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  150. }
  151. }
  152. [Test, Description("REV16 <Xd>, <Xn>")]
  153. public void Rev16_64bit([Values(0u, 31u)] uint Rd,
  154. [Values(1u, 31u)] uint Rn,
  155. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  156. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(256)] ulong Xn)
  157. {
  158. uint Opcode = 0xDAC00400; // REV16 X0, X0
  159. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  160. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  161. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  162. if (Rd != 31)
  163. {
  164. Bits Op = new Bits(Opcode);
  165. AArch64.X((int)Rn, new Bits(Xn));
  166. Base.Rev16(Op[31], Op[9, 5], Op[4, 0]);
  167. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  168. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  169. }
  170. else
  171. {
  172. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  173. }
  174. }
  175. [Test, Description("REV16 <Wd>, <Wn>")]
  176. public void Rev16_32bit([Values(0u, 31u)] uint Rd,
  177. [Values(1u, 31u)] uint Rn,
  178. [Values(0x00000000u, 0x7FFFFFFFu,
  179. 0x80000000u, 0xFFFFFFFFu)] [Random(256)] uint Wn)
  180. {
  181. uint Opcode = 0x5AC00400; // REV16 W0, W0
  182. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  183. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  184. AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
  185. if (Rd != 31)
  186. {
  187. Bits Op = new Bits(Opcode);
  188. AArch64.X((int)Rn, new Bits(Wn));
  189. Base.Rev16(Op[31], Op[9, 5], Op[4, 0]);
  190. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  191. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  192. }
  193. else
  194. {
  195. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  196. }
  197. }
  198. [Test, Description("REV32 <Xd>, <Xn>")]
  199. public void Rev32_64bit([Values(0u, 31u)] uint Rd,
  200. [Values(1u, 31u)] uint Rn,
  201. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  202. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(256)] ulong Xn)
  203. {
  204. uint Opcode = 0xDAC00800; // REV32 X0, X0
  205. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  206. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  207. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  208. if (Rd != 31)
  209. {
  210. Bits Op = new Bits(Opcode);
  211. AArch64.X((int)Rn, new Bits(Xn));
  212. Base.Rev32(Op[31], Op[9, 5], Op[4, 0]);
  213. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  214. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  215. }
  216. else
  217. {
  218. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  219. }
  220. }
  221. [Test, Description("REV <Wd>, <Wn>")]
  222. public void Rev32_32bit([Values(0u, 31u)] uint Rd,
  223. [Values(1u, 31u)] uint Rn,
  224. [Values(0x00000000u, 0x7FFFFFFFu,
  225. 0x80000000u, 0xFFFFFFFFu)] [Random(256)] uint Wn)
  226. {
  227. uint Opcode = 0x5AC00800; // REV W0, W0
  228. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  229. uint _W31 = TestContext.CurrentContext.Random.NextUInt();
  230. AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
  231. if (Rd != 31)
  232. {
  233. Bits Op = new Bits(Opcode);
  234. AArch64.X((int)Rn, new Bits(Wn));
  235. Base.Rev32(Op[31], Op[9, 5], Op[4, 0]);
  236. uint Wd = AArch64.X(32, (int)Rd).ToUInt32();
  237. Assert.That((uint)ThreadState.X0, Is.EqualTo(Wd));
  238. }
  239. else
  240. {
  241. Assert.That((uint)ThreadState.X31, Is.EqualTo(_W31));
  242. }
  243. }
  244. [Test, Description("REV64 <Xd>, <Xn>")]
  245. public void Rev64_64bit([Values(0u, 31u)] uint Rd,
  246. [Values(1u, 31u)] uint Rn,
  247. [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
  248. 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(256)] ulong Xn)
  249. {
  250. uint Opcode = 0xDAC00C00; // REV64 X0, X0
  251. Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
  252. ulong _X31 = TestContext.CurrentContext.Random.NextULong();
  253. AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
  254. if (Rd != 31)
  255. {
  256. Bits Op = new Bits(Opcode);
  257. AArch64.X((int)Rn, new Bits(Xn));
  258. Base.Rev64(Op[9, 5], Op[4, 0]);
  259. ulong Xd = AArch64.X(64, (int)Rd).ToUInt64();
  260. Assert.That((ulong)ThreadState.X0, Is.EqualTo(Xd));
  261. }
  262. else
  263. {
  264. Assert.That((ulong)ThreadState.X31, Is.EqualTo(_X31));
  265. }
  266. }
  267. #endif
  268. }
  269. }