AInstEmitSimdHelper.cs 20 KB

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  1. using ChocolArm64.Decoder;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection;
  6. namespace ChocolArm64.Instruction
  7. {
  8. static class AInstEmitSimdHelper
  9. {
  10. [Flags]
  11. public enum OperFlags
  12. {
  13. Rd = 1 << 0,
  14. Rn = 1 << 1,
  15. Rm = 1 << 2,
  16. Ra = 1 << 3,
  17. RnRm = Rn | Rm,
  18. RdRn = Rd | Rn,
  19. RaRnRm = Ra | Rn | Rm,
  20. RdRnRm = Rd | Rn | Rm
  21. }
  22. public static int GetImmShl(AOpCodeSimdShImm Op)
  23. {
  24. return Op.Imm - (8 << Op.Size);
  25. }
  26. public static int GetImmShr(AOpCodeSimdShImm Op)
  27. {
  28. return (8 << (Op.Size + 1)) - Op.Imm;
  29. }
  30. public static void EmitUnaryMathCall(AILEmitterCtx Context, string Name)
  31. {
  32. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  33. int SizeF = Op.Size & 1;
  34. MethodInfo MthdInfo;
  35. if (SizeF == 0)
  36. {
  37. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float) });
  38. }
  39. else /* if (SizeF == 1) */
  40. {
  41. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double) });
  42. }
  43. Context.EmitCall(MthdInfo);
  44. }
  45. public static void EmitBinaryMathCall(AILEmitterCtx Context, string Name)
  46. {
  47. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  48. int SizeF = Op.Size & 1;
  49. MethodInfo MthdInfo;
  50. if (SizeF == 0)
  51. {
  52. MthdInfo = typeof(MathF).GetMethod(Name, new Type[] { typeof(float), typeof(float) });
  53. }
  54. else /* if (SizeF == 1) */
  55. {
  56. MthdInfo = typeof(Math).GetMethod(Name, new Type[] { typeof(double), typeof(double) });
  57. }
  58. Context.EmitCall(MthdInfo);
  59. }
  60. public static void EmitRoundMathCall(AILEmitterCtx Context, MidpointRounding RoundMode)
  61. {
  62. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  63. int SizeF = Op.Size & 1;
  64. Context.EmitLdc_I4((int)RoundMode);
  65. MethodInfo MthdInfo;
  66. Type[] Types = new Type[] { null, typeof(MidpointRounding) };
  67. Types[0] = SizeF == 0
  68. ? typeof(float)
  69. : typeof(double);
  70. if (SizeF == 0)
  71. {
  72. MthdInfo = typeof(MathF).GetMethod(nameof(MathF.Round), Types);
  73. }
  74. else /* if (SizeF == 1) */
  75. {
  76. MthdInfo = typeof(Math).GetMethod(nameof(Math.Round), Types);
  77. }
  78. Context.EmitCall(MthdInfo);
  79. }
  80. public static void EmitScalarUnaryOpSx(AILEmitterCtx Context, Action Emit)
  81. {
  82. EmitScalarOp(Context, Emit, OperFlags.Rn, true);
  83. }
  84. public static void EmitScalarBinaryOpSx(AILEmitterCtx Context, Action Emit)
  85. {
  86. EmitScalarOp(Context, Emit, OperFlags.RnRm, true);
  87. }
  88. public static void EmitScalarUnaryOpZx(AILEmitterCtx Context, Action Emit)
  89. {
  90. EmitScalarOp(Context, Emit, OperFlags.Rn, false);
  91. }
  92. public static void EmitScalarBinaryOpZx(AILEmitterCtx Context, Action Emit)
  93. {
  94. EmitScalarOp(Context, Emit, OperFlags.RnRm, false);
  95. }
  96. public static void EmitScalarTernaryOpZx(AILEmitterCtx Context, Action Emit)
  97. {
  98. EmitScalarOp(Context, Emit, OperFlags.RdRnRm, false);
  99. }
  100. public static void EmitScalarOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  101. {
  102. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  103. if (Opers.HasFlag(OperFlags.Rd))
  104. {
  105. EmitVectorExtract(Context, Op.Rd, 0, Op.Size, Signed);
  106. }
  107. if (Opers.HasFlag(OperFlags.Rn))
  108. {
  109. EmitVectorExtract(Context, Op.Rn, 0, Op.Size, Signed);
  110. }
  111. if (Opers.HasFlag(OperFlags.Rm))
  112. {
  113. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, 0, Op.Size, Signed);
  114. }
  115. Emit();
  116. EmitScalarSet(Context, Op.Rd, Op.Size);
  117. }
  118. public static void EmitScalarUnaryOpF(AILEmitterCtx Context, Action Emit)
  119. {
  120. EmitScalarOpF(Context, Emit, OperFlags.Rn);
  121. }
  122. public static void EmitScalarBinaryOpF(AILEmitterCtx Context, Action Emit)
  123. {
  124. EmitScalarOpF(Context, Emit, OperFlags.RnRm);
  125. }
  126. public static void EmitScalarTernaryRaOpF(AILEmitterCtx Context, Action Emit)
  127. {
  128. EmitScalarOpF(Context, Emit, OperFlags.RaRnRm);
  129. }
  130. public static void EmitScalarOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  131. {
  132. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  133. int SizeF = Op.Size & 1;
  134. if (Opers.HasFlag(OperFlags.Ra))
  135. {
  136. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Ra, 0, SizeF);
  137. }
  138. if (Opers.HasFlag(OperFlags.Rn))
  139. {
  140. EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
  141. }
  142. if (Opers.HasFlag(OperFlags.Rm))
  143. {
  144. EmitVectorExtractF(Context, ((AOpCodeSimdReg)Op).Rm, 0, SizeF);
  145. }
  146. Emit();
  147. EmitScalarSetF(Context, Op.Rd, SizeF);
  148. }
  149. public static void EmitVectorBinaryOpF(AILEmitterCtx Context, Action Emit)
  150. {
  151. EmitVectorOpF(Context, Emit, OperFlags.RnRm);
  152. }
  153. public static void EmitVectorTernaryOpF(AILEmitterCtx Context, Action Emit)
  154. {
  155. EmitVectorOpF(Context, Emit, OperFlags.RdRnRm);
  156. }
  157. public static void EmitVectorOpF(AILEmitterCtx Context, Action Emit, OperFlags Opers)
  158. {
  159. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  160. int SizeF = Op.Size & 1;
  161. int Bytes = Context.CurrOp.GetBitsCount() >> 3;
  162. for (int Index = 0; Index < (Bytes >> SizeF + 2); Index++)
  163. {
  164. if (Opers.HasFlag(OperFlags.Rd))
  165. {
  166. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  167. }
  168. if (Opers.HasFlag(OperFlags.Rn))
  169. {
  170. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  171. }
  172. if (Opers.HasFlag(OperFlags.Rm))
  173. {
  174. EmitVectorExtractF(Context, Op.Rm, Index, SizeF);
  175. }
  176. Emit();
  177. EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
  178. }
  179. if (Op.RegisterSize == ARegisterSize.SIMD64)
  180. {
  181. EmitVectorZeroUpper(Context, Op.Rd);
  182. }
  183. }
  184. public static void EmitVectorBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
  185. {
  186. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  187. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: false);
  188. }
  189. public static void EmitVectorTernaryOpByElemF(AILEmitterCtx Context, Action Emit)
  190. {
  191. AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
  192. EmitVectorOpByElemF(Context, Emit, Op.Index, Ternary: true);
  193. }
  194. public static void EmitVectorOpByElemF(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary)
  195. {
  196. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  197. int SizeF = Op.Size & 1;
  198. int Bytes = Context.CurrOp.GetBitsCount() >> 3;
  199. for (int Index = 0; Index < (Bytes >> SizeF + 2); Index++)
  200. {
  201. if (Ternary)
  202. {
  203. EmitVectorExtractF(Context, Op.Rd, Index, SizeF);
  204. }
  205. EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
  206. EmitVectorExtractF(Context, Op.Rm, Elem, SizeF);
  207. Emit();
  208. EmitVectorInsertTmpF(Context, Index, SizeF);
  209. }
  210. Context.EmitLdvectmp();
  211. Context.EmitStvec(Op.Rd);
  212. if (Op.RegisterSize == ARegisterSize.SIMD64)
  213. {
  214. EmitVectorZeroUpper(Context, Op.Rd);
  215. }
  216. }
  217. public static void EmitVectorUnaryOpSx(AILEmitterCtx Context, Action Emit)
  218. {
  219. EmitVectorOp(Context, Emit, OperFlags.Rn, true);
  220. }
  221. public static void EmitVectorBinaryOpSx(AILEmitterCtx Context, Action Emit)
  222. {
  223. EmitVectorOp(Context, Emit, OperFlags.RnRm, true);
  224. }
  225. public static void EmitVectorUnaryOpZx(AILEmitterCtx Context, Action Emit)
  226. {
  227. EmitVectorOp(Context, Emit, OperFlags.Rn, false);
  228. }
  229. public static void EmitVectorBinaryOpZx(AILEmitterCtx Context, Action Emit)
  230. {
  231. EmitVectorOp(Context, Emit, OperFlags.RnRm, false);
  232. }
  233. public static void EmitVectorTernaryOpZx(AILEmitterCtx Context, Action Emit)
  234. {
  235. EmitVectorOp(Context, Emit, OperFlags.RdRnRm, false);
  236. }
  237. public static void EmitVectorOp(AILEmitterCtx Context, Action Emit, OperFlags Opers, bool Signed)
  238. {
  239. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  240. int Bytes = Context.CurrOp.GetBitsCount() >> 3;
  241. for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
  242. {
  243. if (Opers.HasFlag(OperFlags.Rd))
  244. {
  245. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  246. }
  247. if (Opers.HasFlag(OperFlags.Rn))
  248. {
  249. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  250. }
  251. if (Opers.HasFlag(OperFlags.Rm))
  252. {
  253. EmitVectorExtract(Context, ((AOpCodeSimdReg)Op).Rm, Index, Op.Size, Signed);
  254. }
  255. Emit();
  256. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  257. }
  258. if (Op.RegisterSize == ARegisterSize.SIMD64)
  259. {
  260. EmitVectorZeroUpper(Context, Op.Rd);
  261. }
  262. }
  263. public static void EmitVectorBinaryOpByElemSx(AILEmitterCtx Context, Action Emit)
  264. {
  265. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  266. EmitVectorOpByElem(Context, Emit, Op.Index, false, true);
  267. }
  268. public static void EmitVectorBinaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  269. {
  270. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  271. EmitVectorOpByElem(Context, Emit, Op.Index, false, false);
  272. }
  273. public static void EmitVectorTernaryOpByElemZx(AILEmitterCtx Context, Action Emit)
  274. {
  275. AOpCodeSimdRegElem Op = (AOpCodeSimdRegElem)Context.CurrOp;
  276. EmitVectorOpByElem(Context, Emit, Op.Index, true, false);
  277. }
  278. public static void EmitVectorOpByElem(AILEmitterCtx Context, Action Emit, int Elem, bool Ternary, bool Signed)
  279. {
  280. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  281. int Bytes = Context.CurrOp.GetBitsCount() >> 3;
  282. for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
  283. {
  284. if (Ternary)
  285. {
  286. EmitVectorExtract(Context, Op.Rd, Index, Op.Size, Signed);
  287. }
  288. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  289. EmitVectorExtract(Context, Op.Rm, Index, Op.Size, Signed);
  290. Emit();
  291. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  292. }
  293. if (Op.RegisterSize == ARegisterSize.SIMD64)
  294. {
  295. EmitVectorZeroUpper(Context, Op.Rd);
  296. }
  297. }
  298. public static void EmitVectorImmUnaryOp(AILEmitterCtx Context, Action Emit)
  299. {
  300. EmitVectorImmOp(Context, Emit, false);
  301. }
  302. public static void EmitVectorImmBinaryOp(AILEmitterCtx Context, Action Emit)
  303. {
  304. EmitVectorImmOp(Context, Emit, true);
  305. }
  306. public static void EmitVectorImmOp(AILEmitterCtx Context, Action Emit, bool Binary)
  307. {
  308. AOpCodeSimdImm Op = (AOpCodeSimdImm)Context.CurrOp;
  309. int Bytes = Context.CurrOp.GetBitsCount() >> 3;
  310. for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
  311. {
  312. if (Binary)
  313. {
  314. EmitVectorExtractZx(Context, Op.Rd, Index, Op.Size);
  315. }
  316. Context.EmitLdc_I8(Op.Imm);
  317. Emit();
  318. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  319. }
  320. if (Op.RegisterSize == ARegisterSize.SIMD64)
  321. {
  322. EmitVectorZeroUpper(Context, Op.Rd);
  323. }
  324. }
  325. public static void EmitVectorWidenRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  326. {
  327. EmitVectorWidenRmBinaryOp(Context, Emit, true);
  328. }
  329. public static void EmitVectorWidenRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  330. {
  331. EmitVectorWidenRmBinaryOp(Context, Emit, false);
  332. }
  333. public static void EmitVectorWidenRmBinaryOp(AILEmitterCtx Context, Action Emit, bool Signed)
  334. {
  335. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  336. int Elems = 8 >> Op.Size;
  337. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  338. for (int Index = 0; Index < Elems; Index++)
  339. {
  340. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, Signed);
  341. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  342. Emit();
  343. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  344. }
  345. Context.EmitLdvectmp();
  346. Context.EmitStvec(Op.Rd);
  347. }
  348. public static void EmitVectorWidenRnRmBinaryOpSx(AILEmitterCtx Context, Action Emit)
  349. {
  350. EmitVectorWidenRnRmBinaryOp(Context, Emit, true);
  351. }
  352. public static void EmitVectorWidenRnRmBinaryOpZx(AILEmitterCtx Context, Action Emit)
  353. {
  354. EmitVectorWidenRnRmBinaryOp(Context, Emit, false);
  355. }
  356. public static void EmitVectorWidenRnRmBinaryOp(AILEmitterCtx Context, Action Emit, bool Signed)
  357. {
  358. AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
  359. int Elems = 8 >> Op.Size;
  360. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  361. for (int Index = 0; Index < Elems; Index++)
  362. {
  363. EmitVectorExtract(Context, Op.Rn, Part + Index, Op.Size, Signed);
  364. EmitVectorExtract(Context, Op.Rm, Part + Index, Op.Size, Signed);
  365. Emit();
  366. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  367. }
  368. Context.EmitLdvectmp();
  369. Context.EmitStvec(Op.Rd);
  370. }
  371. public static void EmitScalarSet(AILEmitterCtx Context, int Reg, int Size)
  372. {
  373. EmitVectorZeroAll(Context, Reg);
  374. EmitVectorInsert(Context, Reg, 0, Size);
  375. }
  376. public static void EmitScalarSetF(AILEmitterCtx Context, int Reg, int Size)
  377. {
  378. EmitVectorZeroAll(Context, Reg);
  379. EmitVectorInsertF(Context, Reg, 0, Size);
  380. }
  381. public static void EmitVectorExtractSx(AILEmitterCtx Context, int Reg, int Index, int Size)
  382. {
  383. EmitVectorExtract(Context, Reg, Index, Size, true);
  384. }
  385. public static void EmitVectorExtractZx(AILEmitterCtx Context, int Reg, int Index, int Size)
  386. {
  387. EmitVectorExtract(Context, Reg, Index, Size, false);
  388. }
  389. public static void EmitVectorExtract(AILEmitterCtx Context, int Reg, int Index, int Size, bool Signed)
  390. {
  391. if (Size < 0 || Size > 3)
  392. {
  393. throw new ArgumentOutOfRangeException(nameof(Size));
  394. }
  395. IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
  396. Context.EmitLdvec(Reg);
  397. Context.EmitLdc_I4(Index);
  398. Context.EmitLdc_I4(Size);
  399. ASoftFallback.EmitCall(Context, Signed
  400. ? nameof(ASoftFallback.VectorExtractIntSx)
  401. : nameof(ASoftFallback.VectorExtractIntZx));
  402. }
  403. public static void EmitVectorExtractF(AILEmitterCtx Context, int Reg, int Index, int Size)
  404. {
  405. Context.EmitLdvec(Reg);
  406. Context.EmitLdc_I4(Index);
  407. if (Size == 0)
  408. {
  409. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorExtractSingle));
  410. }
  411. else if (Size == 1)
  412. {
  413. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorExtractDouble));
  414. }
  415. else
  416. {
  417. throw new ArgumentOutOfRangeException(nameof(Size));
  418. }
  419. }
  420. public static void EmitVectorZeroAll(AILEmitterCtx Context, int Rd)
  421. {
  422. EmitVectorZeroLower(Context, Rd);
  423. EmitVectorZeroUpper(Context, Rd);
  424. }
  425. public static void EmitVectorZeroLower(AILEmitterCtx Context, int Rd)
  426. {
  427. EmitVectorInsert(Context, Rd, 0, 3, 0);
  428. }
  429. public static void EmitVectorZeroUpper(AILEmitterCtx Context, int Rd)
  430. {
  431. EmitVectorInsert(Context, Rd, 1, 3, 0);
  432. }
  433. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size)
  434. {
  435. if (Size < 0 || Size > 3)
  436. {
  437. throw new ArgumentOutOfRangeException(nameof(Size));
  438. }
  439. Context.EmitLdvec(Reg);
  440. Context.EmitLdc_I4(Index);
  441. Context.EmitLdc_I4(Size);
  442. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorInsertInt));
  443. Context.EmitStvec(Reg);
  444. }
  445. public static void EmitVectorInsertTmp(AILEmitterCtx Context, int Index, int Size)
  446. {
  447. if (Size < 0 || Size > 3)
  448. {
  449. throw new ArgumentOutOfRangeException(nameof(Size));
  450. }
  451. Context.EmitLdvectmp();
  452. Context.EmitLdc_I4(Index);
  453. Context.EmitLdc_I4(Size);
  454. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorInsertInt));
  455. Context.EmitStvectmp();
  456. }
  457. public static void EmitVectorInsert(AILEmitterCtx Context, int Reg, int Index, int Size, long Value)
  458. {
  459. if (Size < 0 || Size > 3)
  460. {
  461. throw new ArgumentOutOfRangeException(nameof(Size));
  462. }
  463. Context.EmitLdc_I8(Value);
  464. Context.EmitLdvec(Reg);
  465. Context.EmitLdc_I4(Index);
  466. Context.EmitLdc_I4(Size);
  467. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorInsertInt));
  468. Context.EmitStvec(Reg);
  469. }
  470. public static void EmitVectorInsertF(AILEmitterCtx Context, int Reg, int Index, int Size)
  471. {
  472. Context.EmitLdvec(Reg);
  473. Context.EmitLdc_I4(Index);
  474. if (Size == 0)
  475. {
  476. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorInsertSingle));
  477. }
  478. else if (Size == 1)
  479. {
  480. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorInsertDouble));
  481. }
  482. else
  483. {
  484. throw new ArgumentOutOfRangeException(nameof(Size));
  485. }
  486. Context.EmitStvec(Reg);
  487. }
  488. public static void EmitVectorInsertTmpF(AILEmitterCtx Context, int Index, int Size)
  489. {
  490. Context.EmitLdvectmp();
  491. Context.EmitLdc_I4(Index);
  492. if (Size == 0)
  493. {
  494. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorInsertSingle));
  495. }
  496. else if (Size == 1)
  497. {
  498. ASoftFallback.EmitCall(Context, nameof(ASoftFallback.VectorInsertDouble));
  499. }
  500. else
  501. {
  502. throw new ArgumentOutOfRangeException(nameof(Size));
  503. }
  504. Context.EmitStvectmp();
  505. }
  506. }
  507. }