InstEmitSimdHelper.cs 49 KB

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  1. using ChocolArm64.Decoders;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection;
  6. using System.Reflection.Emit;
  7. using System.Runtime.Intrinsics;
  8. using System.Runtime.Intrinsics.X86;
  9. namespace ChocolArm64.Instructions
  10. {
  11. static class InstEmitSimdHelper
  12. {
  13. public static readonly Type[] IntTypesPerSizeLog2 = new Type[]
  14. {
  15. typeof(sbyte),
  16. typeof(short),
  17. typeof(int),
  18. typeof(long)
  19. };
  20. public static readonly Type[] UIntTypesPerSizeLog2 = new Type[]
  21. {
  22. typeof(byte),
  23. typeof(ushort),
  24. typeof(uint),
  25. typeof(ulong)
  26. };
  27. public static readonly Type[] VectorIntTypesPerSizeLog2 = new Type[]
  28. {
  29. typeof(Vector128<sbyte>),
  30. typeof(Vector128<short>),
  31. typeof(Vector128<int>),
  32. typeof(Vector128<long>)
  33. };
  34. public static readonly Type[] VectorUIntTypesPerSizeLog2 = new Type[]
  35. {
  36. typeof(Vector128<byte>),
  37. typeof(Vector128<ushort>),
  38. typeof(Vector128<uint>),
  39. typeof(Vector128<ulong>)
  40. };
  41. [Flags]
  42. public enum OperFlags
  43. {
  44. Rd = 1 << 0,
  45. Rn = 1 << 1,
  46. Rm = 1 << 2,
  47. Ra = 1 << 3,
  48. RnRm = Rn | Rm,
  49. RdRn = Rd | Rn,
  50. RaRnRm = Ra | Rn | Rm,
  51. RdRnRm = Rd | Rn | Rm
  52. }
  53. public static int GetImmShl(OpCodeSimdShImm64 op)
  54. {
  55. return op.Imm - (8 << op.Size);
  56. }
  57. public static int GetImmShr(OpCodeSimdShImm64 op)
  58. {
  59. return (8 << (op.Size + 1)) - op.Imm;
  60. }
  61. public static void EmitSse2Op(ILEmitterCtx context, string name)
  62. {
  63. EmitSseOp(context, name, typeof(Sse2));
  64. }
  65. public static void EmitSse41Op(ILEmitterCtx context, string name)
  66. {
  67. EmitSseOp(context, name, typeof(Sse41));
  68. }
  69. public static void EmitSse42Op(ILEmitterCtx context, string name)
  70. {
  71. EmitSseOp(context, name, typeof(Sse42));
  72. }
  73. private static void EmitSseOp(ILEmitterCtx context, string name, Type type)
  74. {
  75. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  76. context.EmitLdvec(op.Rn);
  77. Type baseType = VectorIntTypesPerSizeLog2[op.Size];
  78. if (op is OpCodeSimdReg64 binOp)
  79. {
  80. context.EmitLdvec(binOp.Rm);
  81. context.EmitCall(type.GetMethod(name, new Type[] { baseType, baseType }));
  82. }
  83. else
  84. {
  85. context.EmitCall(type.GetMethod(name, new Type[] { baseType }));
  86. }
  87. context.EmitStvec(op.Rd);
  88. if (op.RegisterSize == RegisterSize.Simd64)
  89. {
  90. EmitVectorZeroUpper(context, op.Rd);
  91. }
  92. }
  93. public static void EmitScalarSseOrSse2OpF(ILEmitterCtx context, string name)
  94. {
  95. EmitSseOrSse2OpF(context, name, true);
  96. }
  97. public static void EmitVectorSseOrSse2OpF(ILEmitterCtx context, string name)
  98. {
  99. EmitSseOrSse2OpF(context, name, false);
  100. }
  101. public static void EmitSseOrSse2OpF(ILEmitterCtx context, string name, bool scalar)
  102. {
  103. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  104. int sizeF = op.Size & 1;
  105. context.EmitLdvec(op.Rn);
  106. Type type;
  107. Type baseType;
  108. if (sizeF == 0)
  109. {
  110. type = typeof(Sse);
  111. baseType = typeof(Vector128<float>);
  112. }
  113. else /* if (sizeF == 1) */
  114. {
  115. type = typeof(Sse2);
  116. baseType = typeof(Vector128<double>);
  117. }
  118. if (op is OpCodeSimdReg64 binOp)
  119. {
  120. context.EmitLdvec(binOp.Rm);
  121. context.EmitCall(type.GetMethod(name, new Type[] { baseType, baseType }));
  122. }
  123. else
  124. {
  125. context.EmitCall(type.GetMethod(name, new Type[] { baseType }));
  126. }
  127. context.EmitStvec(op.Rd);
  128. if (scalar)
  129. {
  130. if (sizeF == 0)
  131. {
  132. EmitVectorZero32_128(context, op.Rd);
  133. }
  134. else /* if (sizeF == 1) */
  135. {
  136. EmitVectorZeroUpper(context, op.Rd);
  137. }
  138. }
  139. else if (op.RegisterSize == RegisterSize.Simd64)
  140. {
  141. EmitVectorZeroUpper(context, op.Rd);
  142. }
  143. }
  144. public static void EmitUnaryMathCall(ILEmitterCtx context, string name)
  145. {
  146. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  147. int sizeF = op.Size & 1;
  148. MethodInfo mthdInfo;
  149. if (sizeF == 0)
  150. {
  151. mthdInfo = typeof(MathF).GetMethod(name, new Type[] { typeof(float) });
  152. }
  153. else /* if (sizeF == 1) */
  154. {
  155. mthdInfo = typeof(Math).GetMethod(name, new Type[] { typeof(double) });
  156. }
  157. context.EmitCall(mthdInfo);
  158. }
  159. public static void EmitBinaryMathCall(ILEmitterCtx context, string name)
  160. {
  161. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  162. int sizeF = op.Size & 1;
  163. MethodInfo mthdInfo;
  164. if (sizeF == 0)
  165. {
  166. mthdInfo = typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(float) });
  167. }
  168. else /* if (sizeF == 1) */
  169. {
  170. mthdInfo = typeof(Math).GetMethod(name, new Type[] { typeof(double), typeof(double) });
  171. }
  172. context.EmitCall(mthdInfo);
  173. }
  174. public static void EmitRoundMathCall(ILEmitterCtx context, MidpointRounding roundMode)
  175. {
  176. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  177. int sizeF = op.Size & 1;
  178. MethodInfo mthdInfo;
  179. if (sizeF == 0)
  180. {
  181. mthdInfo = typeof(MathF).GetMethod(nameof(MathF.Round), new Type[] { typeof(float), typeof(MidpointRounding) });
  182. }
  183. else /* if (sizeF == 1) */
  184. {
  185. mthdInfo = typeof(Math).GetMethod(nameof(Math.Round), new Type[] { typeof(double), typeof(MidpointRounding) });
  186. }
  187. context.EmitLdc_I4((int)roundMode);
  188. context.EmitCall(mthdInfo);
  189. }
  190. public static void EmitSoftFloatCall(ILEmitterCtx context, string name)
  191. {
  192. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  193. int sizeF = op.Size & 1;
  194. Type type = sizeF == 0
  195. ? typeof(SoftFloat32)
  196. : typeof(SoftFloat64);
  197. context.EmitLdarg(TranslatedSub.StateArgIdx);
  198. context.EmitCall(type, name);
  199. }
  200. public static void EmitScalarBinaryOpByElemF(ILEmitterCtx context, Action emit)
  201. {
  202. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  203. EmitScalarOpByElemF(context, emit, op.Index, ternary: false);
  204. }
  205. public static void EmitScalarTernaryOpByElemF(ILEmitterCtx context, Action emit)
  206. {
  207. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  208. EmitScalarOpByElemF(context, emit, op.Index, ternary: true);
  209. }
  210. public static void EmitScalarOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
  211. {
  212. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  213. int sizeF = op.Size & 1;
  214. if (ternary)
  215. {
  216. EmitVectorExtractF(context, op.Rd, 0, sizeF);
  217. }
  218. EmitVectorExtractF(context, op.Rn, 0, sizeF);
  219. EmitVectorExtractF(context, op.Rm, elem, sizeF);
  220. emit();
  221. EmitScalarSetF(context, op.Rd, sizeF);
  222. }
  223. public static void EmitScalarUnaryOpSx(ILEmitterCtx context, Action emit)
  224. {
  225. EmitScalarOp(context, emit, OperFlags.Rn, true);
  226. }
  227. public static void EmitScalarBinaryOpSx(ILEmitterCtx context, Action emit)
  228. {
  229. EmitScalarOp(context, emit, OperFlags.RnRm, true);
  230. }
  231. public static void EmitScalarUnaryOpZx(ILEmitterCtx context, Action emit)
  232. {
  233. EmitScalarOp(context, emit, OperFlags.Rn, false);
  234. }
  235. public static void EmitScalarBinaryOpZx(ILEmitterCtx context, Action emit)
  236. {
  237. EmitScalarOp(context, emit, OperFlags.RnRm, false);
  238. }
  239. public static void EmitScalarTernaryOpZx(ILEmitterCtx context, Action emit)
  240. {
  241. EmitScalarOp(context, emit, OperFlags.RdRnRm, false);
  242. }
  243. public static void EmitScalarOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
  244. {
  245. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  246. bool rd = (opers & OperFlags.Rd) != 0;
  247. bool rn = (opers & OperFlags.Rn) != 0;
  248. bool rm = (opers & OperFlags.Rm) != 0;
  249. if (rd)
  250. {
  251. EmitVectorExtract(context, op.Rd, 0, op.Size, signed);
  252. }
  253. if (rn)
  254. {
  255. EmitVectorExtract(context, op.Rn, 0, op.Size, signed);
  256. }
  257. if (rm)
  258. {
  259. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, 0, op.Size, signed);
  260. }
  261. emit();
  262. EmitScalarSet(context, op.Rd, op.Size);
  263. }
  264. public static void EmitScalarUnaryOpF(ILEmitterCtx context, Action emit)
  265. {
  266. EmitScalarOpF(context, emit, OperFlags.Rn);
  267. }
  268. public static void EmitScalarBinaryOpF(ILEmitterCtx context, Action emit)
  269. {
  270. EmitScalarOpF(context, emit, OperFlags.RnRm);
  271. }
  272. public static void EmitScalarTernaryRaOpF(ILEmitterCtx context, Action emit)
  273. {
  274. EmitScalarOpF(context, emit, OperFlags.RaRnRm);
  275. }
  276. public static void EmitScalarOpF(ILEmitterCtx context, Action emit, OperFlags opers)
  277. {
  278. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  279. int sizeF = op.Size & 1;
  280. bool ra = (opers & OperFlags.Ra) != 0;
  281. bool rn = (opers & OperFlags.Rn) != 0;
  282. bool rm = (opers & OperFlags.Rm) != 0;
  283. if (ra)
  284. {
  285. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Ra, 0, sizeF);
  286. }
  287. if (rn)
  288. {
  289. EmitVectorExtractF(context, op.Rn, 0, sizeF);
  290. }
  291. if (rm)
  292. {
  293. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, 0, sizeF);
  294. }
  295. emit();
  296. EmitScalarSetF(context, op.Rd, sizeF);
  297. }
  298. public static void EmitVectorUnaryOpF(ILEmitterCtx context, Action emit)
  299. {
  300. EmitVectorOpF(context, emit, OperFlags.Rn);
  301. }
  302. public static void EmitVectorBinaryOpF(ILEmitterCtx context, Action emit)
  303. {
  304. EmitVectorOpF(context, emit, OperFlags.RnRm);
  305. }
  306. public static void EmitVectorTernaryOpF(ILEmitterCtx context, Action emit)
  307. {
  308. EmitVectorOpF(context, emit, OperFlags.RdRnRm);
  309. }
  310. public static void EmitVectorOpF(ILEmitterCtx context, Action emit, OperFlags opers)
  311. {
  312. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  313. int sizeF = op.Size & 1;
  314. int bytes = op.GetBitsCount() >> 3;
  315. int elems = bytes >> sizeF + 2;
  316. bool rd = (opers & OperFlags.Rd) != 0;
  317. bool rn = (opers & OperFlags.Rn) != 0;
  318. bool rm = (opers & OperFlags.Rm) != 0;
  319. for (int index = 0; index < elems; index++)
  320. {
  321. if (rd)
  322. {
  323. EmitVectorExtractF(context, op.Rd, index, sizeF);
  324. }
  325. if (rn)
  326. {
  327. EmitVectorExtractF(context, op.Rn, index, sizeF);
  328. }
  329. if (rm)
  330. {
  331. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, index, sizeF);
  332. }
  333. emit();
  334. EmitVectorInsertF(context, op.Rd, index, sizeF);
  335. }
  336. if (op.RegisterSize == RegisterSize.Simd64)
  337. {
  338. EmitVectorZeroUpper(context, op.Rd);
  339. }
  340. }
  341. public static void EmitVectorBinaryOpByElemF(ILEmitterCtx context, Action emit)
  342. {
  343. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  344. EmitVectorOpByElemF(context, emit, op.Index, ternary: false);
  345. }
  346. public static void EmitVectorTernaryOpByElemF(ILEmitterCtx context, Action emit)
  347. {
  348. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  349. EmitVectorOpByElemF(context, emit, op.Index, ternary: true);
  350. }
  351. public static void EmitVectorOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
  352. {
  353. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  354. int sizeF = op.Size & 1;
  355. int bytes = op.GetBitsCount() >> 3;
  356. int elems = bytes >> sizeF + 2;
  357. for (int index = 0; index < elems; index++)
  358. {
  359. if (ternary)
  360. {
  361. EmitVectorExtractF(context, op.Rd, index, sizeF);
  362. }
  363. EmitVectorExtractF(context, op.Rn, index, sizeF);
  364. EmitVectorExtractF(context, op.Rm, elem, sizeF);
  365. emit();
  366. EmitVectorInsertTmpF(context, index, sizeF);
  367. }
  368. context.EmitLdvectmp();
  369. context.EmitStvec(op.Rd);
  370. if (op.RegisterSize == RegisterSize.Simd64)
  371. {
  372. EmitVectorZeroUpper(context, op.Rd);
  373. }
  374. }
  375. public static void EmitVectorUnaryOpSx(ILEmitterCtx context, Action emit)
  376. {
  377. EmitVectorOp(context, emit, OperFlags.Rn, true);
  378. }
  379. public static void EmitVectorBinaryOpSx(ILEmitterCtx context, Action emit)
  380. {
  381. EmitVectorOp(context, emit, OperFlags.RnRm, true);
  382. }
  383. public static void EmitVectorTernaryOpSx(ILEmitterCtx context, Action emit)
  384. {
  385. EmitVectorOp(context, emit, OperFlags.RdRnRm, true);
  386. }
  387. public static void EmitVectorUnaryOpZx(ILEmitterCtx context, Action emit)
  388. {
  389. EmitVectorOp(context, emit, OperFlags.Rn, false);
  390. }
  391. public static void EmitVectorBinaryOpZx(ILEmitterCtx context, Action emit)
  392. {
  393. EmitVectorOp(context, emit, OperFlags.RnRm, false);
  394. }
  395. public static void EmitVectorTernaryOpZx(ILEmitterCtx context, Action emit)
  396. {
  397. EmitVectorOp(context, emit, OperFlags.RdRnRm, false);
  398. }
  399. public static void EmitVectorOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
  400. {
  401. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  402. int bytes = op.GetBitsCount() >> 3;
  403. int elems = bytes >> op.Size;
  404. bool rd = (opers & OperFlags.Rd) != 0;
  405. bool rn = (opers & OperFlags.Rn) != 0;
  406. bool rm = (opers & OperFlags.Rm) != 0;
  407. for (int index = 0; index < elems; index++)
  408. {
  409. if (rd)
  410. {
  411. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  412. }
  413. if (rn)
  414. {
  415. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  416. }
  417. if (rm)
  418. {
  419. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  420. }
  421. emit();
  422. EmitVectorInsert(context, op.Rd, index, op.Size);
  423. }
  424. if (op.RegisterSize == RegisterSize.Simd64)
  425. {
  426. EmitVectorZeroUpper(context, op.Rd);
  427. }
  428. }
  429. public static void EmitVectorBinaryOpByElemSx(ILEmitterCtx context, Action emit)
  430. {
  431. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  432. EmitVectorOpByElem(context, emit, op.Index, ternary: false, signed: true);
  433. }
  434. public static void EmitVectorBinaryOpByElemZx(ILEmitterCtx context, Action emit)
  435. {
  436. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  437. EmitVectorOpByElem(context, emit, op.Index, ternary: false, signed: false);
  438. }
  439. public static void EmitVectorTernaryOpByElemZx(ILEmitterCtx context, Action emit)
  440. {
  441. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  442. EmitVectorOpByElem(context, emit, op.Index, ternary: true, signed: false);
  443. }
  444. public static void EmitVectorOpByElem(ILEmitterCtx context, Action emit, int elem, bool ternary, bool signed)
  445. {
  446. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  447. int bytes = op.GetBitsCount() >> 3;
  448. int elems = bytes >> op.Size;
  449. EmitVectorExtract(context, op.Rm, elem, op.Size, signed);
  450. context.EmitSttmp();
  451. for (int index = 0; index < elems; index++)
  452. {
  453. if (ternary)
  454. {
  455. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  456. }
  457. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  458. context.EmitLdtmp();
  459. emit();
  460. EmitVectorInsert(context, op.Rd, index, op.Size);
  461. }
  462. if (op.RegisterSize == RegisterSize.Simd64)
  463. {
  464. EmitVectorZeroUpper(context, op.Rd);
  465. }
  466. }
  467. public static void EmitVectorImmUnaryOp(ILEmitterCtx context, Action emit)
  468. {
  469. EmitVectorImmOp(context, emit, false);
  470. }
  471. public static void EmitVectorImmBinaryOp(ILEmitterCtx context, Action emit)
  472. {
  473. EmitVectorImmOp(context, emit, true);
  474. }
  475. public static void EmitVectorImmOp(ILEmitterCtx context, Action emit, bool binary)
  476. {
  477. OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp;
  478. int bytes = op.GetBitsCount() >> 3;
  479. int elems = bytes >> op.Size;
  480. for (int index = 0; index < elems; index++)
  481. {
  482. if (binary)
  483. {
  484. EmitVectorExtractZx(context, op.Rd, index, op.Size);
  485. }
  486. context.EmitLdc_I8(op.Imm);
  487. emit();
  488. EmitVectorInsert(context, op.Rd, index, op.Size);
  489. }
  490. if (op.RegisterSize == RegisterSize.Simd64)
  491. {
  492. EmitVectorZeroUpper(context, op.Rd);
  493. }
  494. }
  495. public static void EmitVectorWidenRmBinaryOpSx(ILEmitterCtx context, Action emit)
  496. {
  497. EmitVectorWidenRmBinaryOp(context, emit, true);
  498. }
  499. public static void EmitVectorWidenRmBinaryOpZx(ILEmitterCtx context, Action emit)
  500. {
  501. EmitVectorWidenRmBinaryOp(context, emit, false);
  502. }
  503. public static void EmitVectorWidenRmBinaryOp(ILEmitterCtx context, Action emit, bool signed)
  504. {
  505. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  506. int elems = 8 >> op.Size;
  507. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  508. for (int index = 0; index < elems; index++)
  509. {
  510. EmitVectorExtract(context, op.Rn, index, op.Size + 1, signed);
  511. EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  512. emit();
  513. EmitVectorInsertTmp(context, index, op.Size + 1);
  514. }
  515. context.EmitLdvectmp();
  516. context.EmitStvec(op.Rd);
  517. }
  518. public static void EmitVectorWidenRnRmBinaryOpSx(ILEmitterCtx context, Action emit)
  519. {
  520. EmitVectorWidenRnRmOp(context, emit, false, true);
  521. }
  522. public static void EmitVectorWidenRnRmBinaryOpZx(ILEmitterCtx context, Action emit)
  523. {
  524. EmitVectorWidenRnRmOp(context, emit, false, false);
  525. }
  526. public static void EmitVectorWidenRnRmTernaryOpSx(ILEmitterCtx context, Action emit)
  527. {
  528. EmitVectorWidenRnRmOp(context, emit, true, true);
  529. }
  530. public static void EmitVectorWidenRnRmTernaryOpZx(ILEmitterCtx context, Action emit)
  531. {
  532. EmitVectorWidenRnRmOp(context, emit, true, false);
  533. }
  534. public static void EmitVectorWidenRnRmOp(ILEmitterCtx context, Action emit, bool ternary, bool signed)
  535. {
  536. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  537. int elems = 8 >> op.Size;
  538. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  539. for (int index = 0; index < elems; index++)
  540. {
  541. if (ternary)
  542. {
  543. EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  544. }
  545. EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  546. EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  547. emit();
  548. EmitVectorInsertTmp(context, index, op.Size + 1);
  549. }
  550. context.EmitLdvectmp();
  551. context.EmitStvec(op.Rd);
  552. }
  553. public static void EmitVectorWidenBinaryOpByElemSx(ILEmitterCtx context, Action emit)
  554. {
  555. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  556. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: false, signed: true);
  557. }
  558. public static void EmitVectorWidenBinaryOpByElemZx(ILEmitterCtx context, Action emit)
  559. {
  560. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  561. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: false, signed: false);
  562. }
  563. public static void EmitVectorWidenTernaryOpByElemSx(ILEmitterCtx context, Action emit)
  564. {
  565. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  566. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: true, signed: true);
  567. }
  568. public static void EmitVectorWidenTernaryOpByElemZx(ILEmitterCtx context, Action emit)
  569. {
  570. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  571. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: true, signed: false);
  572. }
  573. public static void EmitVectorWidenOpByElem(ILEmitterCtx context, Action emit, int elem, bool ternary, bool signed)
  574. {
  575. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  576. int elems = 8 >> op.Size;
  577. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  578. EmitVectorExtract(context, op.Rm, elem, op.Size, signed);
  579. context.EmitSttmp();
  580. for (int index = 0; index < elems; index++)
  581. {
  582. if (ternary)
  583. {
  584. EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  585. }
  586. EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  587. context.EmitLdtmp();
  588. emit();
  589. EmitVectorInsertTmp(context, index, op.Size + 1);
  590. }
  591. context.EmitLdvectmp();
  592. context.EmitStvec(op.Rd);
  593. }
  594. public static void EmitVectorPairwiseOpSx(ILEmitterCtx context, Action emit)
  595. {
  596. EmitVectorPairwiseOp(context, emit, true);
  597. }
  598. public static void EmitVectorPairwiseOpZx(ILEmitterCtx context, Action emit)
  599. {
  600. EmitVectorPairwiseOp(context, emit, false);
  601. }
  602. public static void EmitVectorPairwiseOp(ILEmitterCtx context, Action emit, bool signed)
  603. {
  604. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  605. int words = op.GetBitsCount() >> 4;
  606. int pairs = words >> op.Size;
  607. for (int index = 0; index < pairs; index++)
  608. {
  609. int idx = index << 1;
  610. EmitVectorExtract(context, op.Rn, idx, op.Size, signed);
  611. EmitVectorExtract(context, op.Rn, idx + 1, op.Size, signed);
  612. emit();
  613. EmitVectorExtract(context, op.Rm, idx, op.Size, signed);
  614. EmitVectorExtract(context, op.Rm, idx + 1, op.Size, signed);
  615. emit();
  616. EmitVectorInsertTmp(context, pairs + index, op.Size);
  617. EmitVectorInsertTmp(context, index, op.Size);
  618. }
  619. context.EmitLdvectmp();
  620. context.EmitStvec(op.Rd);
  621. if (op.RegisterSize == RegisterSize.Simd64)
  622. {
  623. EmitVectorZeroUpper(context, op.Rd);
  624. }
  625. }
  626. public static void EmitVectorAcrossVectorOpSx(ILEmitterCtx context, Action emit)
  627. {
  628. EmitVectorAcrossVectorOp(context, emit, true);
  629. }
  630. public static void EmitVectorAcrossVectorOpZx(ILEmitterCtx context, Action emit)
  631. {
  632. EmitVectorAcrossVectorOp(context, emit, false);
  633. }
  634. public static void EmitVectorAcrossVectorOp(ILEmitterCtx context, Action emit, bool signed)
  635. {
  636. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  637. int bytes = op.GetBitsCount() >> 3;
  638. int elems = bytes >> op.Size;
  639. EmitVectorExtract(context, op.Rn, 0, op.Size, signed);
  640. for (int index = 1; index < elems; index++)
  641. {
  642. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  643. emit();
  644. }
  645. EmitScalarSet(context, op.Rd, op.Size);
  646. }
  647. public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
  648. {
  649. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  650. int sizeF = op.Size & 1;
  651. int words = op.GetBitsCount() >> 4;
  652. int pairs = words >> sizeF + 2;
  653. for (int index = 0; index < pairs; index++)
  654. {
  655. int idx = index << 1;
  656. EmitVectorExtractF(context, op.Rn, idx, sizeF);
  657. EmitVectorExtractF(context, op.Rn, idx + 1, sizeF);
  658. emit();
  659. EmitVectorExtractF(context, op.Rm, idx, sizeF);
  660. EmitVectorExtractF(context, op.Rm, idx + 1, sizeF);
  661. emit();
  662. EmitVectorInsertTmpF(context, pairs + index, sizeF);
  663. EmitVectorInsertTmpF(context, index, sizeF);
  664. }
  665. context.EmitLdvectmp();
  666. context.EmitStvec(op.Rd);
  667. if (op.RegisterSize == RegisterSize.Simd64)
  668. {
  669. EmitVectorZeroUpper(context, op.Rd);
  670. }
  671. }
  672. public static void EmitVectorPairwiseSseOrSse2OpF(ILEmitterCtx context, string name)
  673. {
  674. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  675. int sizeF = op.Size & 1;
  676. if (sizeF == 0)
  677. {
  678. if (op.RegisterSize == RegisterSize.Simd64)
  679. {
  680. Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
  681. context.EmitLdvec(op.Rn);
  682. context.EmitLdvec(op.Rm);
  683. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.UnpackLow), types));
  684. context.EmitStvectmp();
  685. context.EmitLdvectmp();
  686. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  687. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh), types));
  688. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  689. context.EmitLdvectmp();
  690. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveHighToLow), types));
  691. context.EmitCall(typeof(Sse).GetMethod(name, types));
  692. context.EmitStvec(op.Rd);
  693. }
  694. else /* if (op.RegisterSize == RegisterSize.Simd128) */
  695. {
  696. Type[] typesSfl = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>), typeof(byte) };
  697. Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
  698. context.EmitLdvec(op.Rn);
  699. context.EmitLdvec(op.Rm);
  700. context.EmitLdc_I4(2 << 6 | 0 << 4 | 2 << 2 | 0 << 0);
  701. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Shuffle), typesSfl));
  702. context.EmitLdvec(op.Rn);
  703. context.EmitLdvec(op.Rm);
  704. context.EmitLdc_I4(3 << 6 | 1 << 4 | 3 << 2 | 1 << 0);
  705. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Shuffle), typesSfl));
  706. context.EmitCall(typeof(Sse).GetMethod(name, types));
  707. context.EmitStvec(op.Rd);
  708. }
  709. }
  710. else /* if (sizeF == 1) */
  711. {
  712. Type[] types = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
  713. context.EmitLdvec(op.Rn);
  714. context.EmitLdvec(op.Rm);
  715. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), types));
  716. context.EmitLdvec(op.Rn);
  717. context.EmitLdvec(op.Rm);
  718. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), types));
  719. context.EmitCall(typeof(Sse2).GetMethod(name, types));
  720. context.EmitStvec(op.Rd);
  721. }
  722. }
  723. [Flags]
  724. public enum SaturatingFlags
  725. {
  726. Scalar = 1 << 0,
  727. Signed = 1 << 1,
  728. Add = 1 << 2,
  729. Sub = 1 << 3,
  730. Accumulate = 1 << 4,
  731. ScalarSx = Scalar | Signed,
  732. ScalarZx = Scalar,
  733. VectorSx = Signed,
  734. VectorZx = 0
  735. }
  736. public static void EmitScalarSaturatingUnaryOpSx(ILEmitterCtx context, Action emit)
  737. {
  738. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.ScalarSx);
  739. }
  740. public static void EmitVectorSaturatingUnaryOpSx(ILEmitterCtx context, Action emit)
  741. {
  742. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.VectorSx);
  743. }
  744. public static void EmitSaturatingUnaryOpSx(ILEmitterCtx context, Action emit, SaturatingFlags flags)
  745. {
  746. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  747. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  748. int bytes = op.GetBitsCount() >> 3;
  749. int elems = !scalar ? bytes >> op.Size : 1;
  750. for (int index = 0; index < elems; index++)
  751. {
  752. EmitVectorExtractSx(context, op.Rn, index, op.Size);
  753. emit();
  754. if (op.Size <= 2)
  755. {
  756. EmitSatQ(context, op.Size, true, true);
  757. }
  758. else /* if (op.Size == 3) */
  759. {
  760. EmitUnarySignedSatQAbsOrNeg(context);
  761. }
  762. if (scalar)
  763. {
  764. EmitVectorZeroAll(context, op.Rd);
  765. }
  766. EmitVectorInsert(context, op.Rd, index, op.Size);
  767. }
  768. if (op.RegisterSize == RegisterSize.Simd64)
  769. {
  770. EmitVectorZeroUpper(context, op.Rd);
  771. }
  772. }
  773. public static void EmitScalarSaturatingBinaryOpSx(ILEmitterCtx context, SaturatingFlags flags)
  774. {
  775. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.ScalarSx | flags);
  776. }
  777. public static void EmitScalarSaturatingBinaryOpZx(ILEmitterCtx context, SaturatingFlags flags)
  778. {
  779. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.ScalarZx | flags);
  780. }
  781. public static void EmitVectorSaturatingBinaryOpSx(ILEmitterCtx context, SaturatingFlags flags)
  782. {
  783. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.VectorSx | flags);
  784. }
  785. public static void EmitVectorSaturatingBinaryOpZx(ILEmitterCtx context, SaturatingFlags flags)
  786. {
  787. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.VectorZx | flags);
  788. }
  789. public static void EmitSaturatingBinaryOp(ILEmitterCtx context, Action emit, SaturatingFlags flags)
  790. {
  791. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  792. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  793. bool signed = (flags & SaturatingFlags.Signed) != 0;
  794. bool add = (flags & SaturatingFlags.Add) != 0;
  795. bool sub = (flags & SaturatingFlags.Sub) != 0;
  796. bool accumulate = (flags & SaturatingFlags.Accumulate) != 0;
  797. int bytes = op.GetBitsCount() >> 3;
  798. int elems = !scalar ? bytes >> op.Size : 1;
  799. if (add || sub)
  800. {
  801. for (int index = 0; index < elems; index++)
  802. {
  803. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  804. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  805. if (op.Size <= 2)
  806. {
  807. context.Emit(add ? OpCodes.Add : OpCodes.Sub);
  808. EmitSatQ(context, op.Size, true, signed);
  809. }
  810. else /* if (op.Size == 3) */
  811. {
  812. if (add)
  813. {
  814. EmitBinarySatQAdd(context, signed);
  815. }
  816. else /* if (sub) */
  817. {
  818. EmitBinarySatQSub(context, signed);
  819. }
  820. }
  821. if (scalar)
  822. {
  823. EmitVectorZeroAll(context, op.Rd);
  824. }
  825. EmitVectorInsert(context, op.Rd, index, op.Size);
  826. }
  827. }
  828. else if (accumulate)
  829. {
  830. for (int index = 0; index < elems; index++)
  831. {
  832. EmitVectorExtract(context, op.Rn, index, op.Size, !signed);
  833. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  834. if (op.Size <= 2)
  835. {
  836. context.Emit(OpCodes.Add);
  837. EmitSatQ(context, op.Size, true, signed);
  838. }
  839. else /* if (op.Size == 3) */
  840. {
  841. EmitBinarySatQAccumulate(context, signed);
  842. }
  843. if (scalar)
  844. {
  845. EmitVectorZeroAll(context, op.Rd);
  846. }
  847. EmitVectorInsert(context, op.Rd, index, op.Size);
  848. }
  849. }
  850. else
  851. {
  852. for (int index = 0; index < elems; index++)
  853. {
  854. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  855. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  856. emit();
  857. EmitSatQ(context, op.Size, true, signed);
  858. if (scalar)
  859. {
  860. EmitVectorZeroAll(context, op.Rd);
  861. }
  862. EmitVectorInsert(context, op.Rd, index, op.Size);
  863. }
  864. }
  865. if (op.RegisterSize == RegisterSize.Simd64)
  866. {
  867. EmitVectorZeroUpper(context, op.Rd);
  868. }
  869. }
  870. [Flags]
  871. public enum SaturatingNarrowFlags
  872. {
  873. Scalar = 1 << 0,
  874. SignedSrc = 1 << 1,
  875. SignedDst = 1 << 2,
  876. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  877. ScalarSxZx = Scalar | SignedSrc,
  878. ScalarZxZx = Scalar,
  879. VectorSxSx = SignedSrc | SignedDst,
  880. VectorSxZx = SignedSrc,
  881. VectorZxZx = 0
  882. }
  883. public static void EmitSaturatingNarrowOp(ILEmitterCtx context, SaturatingNarrowFlags flags)
  884. {
  885. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  886. bool scalar = (flags & SaturatingNarrowFlags.Scalar) != 0;
  887. bool signedSrc = (flags & SaturatingNarrowFlags.SignedSrc) != 0;
  888. bool signedDst = (flags & SaturatingNarrowFlags.SignedDst) != 0;
  889. int elems = !scalar ? 8 >> op.Size : 1;
  890. int part = !scalar && (op.RegisterSize == RegisterSize.Simd128) ? elems : 0;
  891. if (scalar)
  892. {
  893. EmitVectorZeroLowerTmp(context);
  894. }
  895. if (part != 0)
  896. {
  897. context.EmitLdvec(op.Rd);
  898. context.EmitStvectmp();
  899. }
  900. for (int index = 0; index < elems; index++)
  901. {
  902. EmitVectorExtract(context, op.Rn, index, op.Size + 1, signedSrc);
  903. EmitSatQ(context, op.Size, signedSrc, signedDst);
  904. EmitVectorInsertTmp(context, part + index, op.Size);
  905. }
  906. context.EmitLdvectmp();
  907. context.EmitStvec(op.Rd);
  908. if (part == 0)
  909. {
  910. EmitVectorZeroUpper(context, op.Rd);
  911. }
  912. }
  913. // TSrc (16bit, 32bit, 64bit; signed, unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  914. public static void EmitSatQ(ILEmitterCtx context, int sizeDst, bool signedSrc, bool signedDst)
  915. {
  916. if ((uint)sizeDst > 2u)
  917. {
  918. throw new ArgumentOutOfRangeException(nameof(sizeDst));
  919. }
  920. context.EmitLdc_I4(sizeDst);
  921. context.EmitLdarg(TranslatedSub.StateArgIdx);
  922. if (signedSrc)
  923. {
  924. SoftFallback.EmitCall(context, signedDst
  925. ? nameof(SoftFallback.SignedSrcSignedDstSatQ)
  926. : nameof(SoftFallback.SignedSrcUnsignedDstSatQ));
  927. }
  928. else
  929. {
  930. SoftFallback.EmitCall(context, signedDst
  931. ? nameof(SoftFallback.UnsignedSrcSignedDstSatQ)
  932. : nameof(SoftFallback.UnsignedSrcUnsignedDstSatQ));
  933. }
  934. }
  935. // TSrc (64bit) == TDst (64bit); signed.
  936. public static void EmitUnarySignedSatQAbsOrNeg(ILEmitterCtx context)
  937. {
  938. if (((OpCodeSimd64)context.CurrOp).Size < 3)
  939. {
  940. throw new InvalidOperationException();
  941. }
  942. context.EmitLdarg(TranslatedSub.StateArgIdx);
  943. SoftFallback.EmitCall(context, nameof(SoftFallback.UnarySignedSatQAbsOrNeg));
  944. }
  945. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  946. public static void EmitBinarySatQAdd(ILEmitterCtx context, bool signed)
  947. {
  948. if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
  949. {
  950. throw new InvalidOperationException();
  951. }
  952. context.EmitLdarg(TranslatedSub.StateArgIdx);
  953. SoftFallback.EmitCall(context, signed
  954. ? nameof(SoftFallback.BinarySignedSatQAdd)
  955. : nameof(SoftFallback.BinaryUnsignedSatQAdd));
  956. }
  957. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  958. public static void EmitBinarySatQSub(ILEmitterCtx context, bool signed)
  959. {
  960. if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
  961. {
  962. throw new InvalidOperationException();
  963. }
  964. context.EmitLdarg(TranslatedSub.StateArgIdx);
  965. SoftFallback.EmitCall(context, signed
  966. ? nameof(SoftFallback.BinarySignedSatQSub)
  967. : nameof(SoftFallback.BinaryUnsignedSatQSub));
  968. }
  969. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  970. public static void EmitBinarySatQAccumulate(ILEmitterCtx context, bool signed)
  971. {
  972. if (((OpCodeSimd64)context.CurrOp).Size < 3)
  973. {
  974. throw new InvalidOperationException();
  975. }
  976. context.EmitLdarg(TranslatedSub.StateArgIdx);
  977. SoftFallback.EmitCall(context, signed
  978. ? nameof(SoftFallback.BinarySignedSatQAcc)
  979. : nameof(SoftFallback.BinaryUnsignedSatQAcc));
  980. }
  981. public static void EmitScalarSet(ILEmitterCtx context, int reg, int size)
  982. {
  983. EmitVectorZeroAll(context, reg);
  984. EmitVectorInsert(context, reg, 0, size);
  985. }
  986. public static void EmitScalarSetF(ILEmitterCtx context, int reg, int size)
  987. {
  988. if (Optimizations.UseSse41 && size == 0)
  989. {
  990. //If the type is float, we can perform insertion and
  991. //zero the upper bits with a single instruction (INSERTPS);
  992. context.EmitLdvec(reg);
  993. VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41VectorInsertScalarSingle));
  994. context.EmitStvec(reg);
  995. }
  996. else
  997. {
  998. EmitVectorZeroAll(context, reg);
  999. EmitVectorInsertF(context, reg, 0, size);
  1000. }
  1001. }
  1002. public static void EmitVectorExtractSx(ILEmitterCtx context, int reg, int index, int size)
  1003. {
  1004. EmitVectorExtract(context, reg, index, size, true);
  1005. }
  1006. public static void EmitVectorExtractZx(ILEmitterCtx context, int reg, int index, int size)
  1007. {
  1008. EmitVectorExtract(context, reg, index, size, false);
  1009. }
  1010. public static void EmitVectorExtract(ILEmitterCtx context, int reg, int index, int size, bool signed)
  1011. {
  1012. ThrowIfInvalid(index, size);
  1013. context.EmitLdvec(reg);
  1014. context.EmitLdc_I4(index);
  1015. context.EmitLdc_I4(size);
  1016. VectorHelper.EmitCall(context, signed
  1017. ? nameof(VectorHelper.VectorExtractIntSx)
  1018. : nameof(VectorHelper.VectorExtractIntZx));
  1019. }
  1020. public static void EmitVectorExtractF(ILEmitterCtx context, int reg, int index, int size)
  1021. {
  1022. ThrowIfInvalidF(index, size);
  1023. context.EmitLdvec(reg);
  1024. context.EmitLdc_I4(index);
  1025. if (size == 0)
  1026. {
  1027. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorExtractSingle));
  1028. }
  1029. else if (size == 1)
  1030. {
  1031. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorExtractDouble));
  1032. }
  1033. else
  1034. {
  1035. throw new ArgumentOutOfRangeException(nameof(size));
  1036. }
  1037. }
  1038. public static void EmitVectorZeroAll(ILEmitterCtx context, int reg)
  1039. {
  1040. if (Optimizations.UseSse)
  1041. {
  1042. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1043. context.EmitStvec(reg);
  1044. }
  1045. else
  1046. {
  1047. EmitVectorZeroLower(context, reg);
  1048. EmitVectorZeroUpper(context, reg);
  1049. }
  1050. }
  1051. public static void EmitVectorZeroLower(ILEmitterCtx context, int reg)
  1052. {
  1053. EmitVectorInsert(context, reg, 0, 3, 0);
  1054. }
  1055. public static void EmitVectorZeroLowerTmp(ILEmitterCtx context)
  1056. {
  1057. if (Optimizations.UseSse)
  1058. {
  1059. context.EmitLdvectmp();
  1060. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1061. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveHighToLow)));
  1062. context.EmitStvectmp();
  1063. }
  1064. else
  1065. {
  1066. EmitVectorInsertTmp(context, 0, 3, 0);
  1067. }
  1068. }
  1069. public static void EmitVectorZeroUpper(ILEmitterCtx context, int reg)
  1070. {
  1071. if (Optimizations.UseSse)
  1072. {
  1073. // TODO: Use Sse2.MoveScalar once it is fixed (in .NET Core 3.0),
  1074. // as of the time of writing it just crashes the JIT.
  1075. /*Type[] typesMov = new Type[] { typeof(Vector128<ulong>) };
  1076. context.EmitLdvec(reg);
  1077. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.MoveScalar), typesMov));
  1078. context.EmitStvec(reg);*/
  1079. context.EmitLdvec(reg);
  1080. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1081. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh)));
  1082. context.EmitStvec(reg);
  1083. }
  1084. else
  1085. {
  1086. EmitVectorInsert(context, reg, 1, 3, 0);
  1087. }
  1088. }
  1089. public static void EmitVectorZero32_128(ILEmitterCtx context, int reg)
  1090. {
  1091. if (!Sse.IsSupported)
  1092. {
  1093. throw new PlatformNotSupportedException();
  1094. }
  1095. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1096. context.EmitLdvec(reg);
  1097. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveScalar)));
  1098. context.EmitStvec(reg);
  1099. }
  1100. public static void EmitVectorInsert(ILEmitterCtx context, int reg, int index, int size)
  1101. {
  1102. ThrowIfInvalid(index, size);
  1103. context.EmitLdvec(reg);
  1104. context.EmitLdc_I4(index);
  1105. context.EmitLdc_I4(size);
  1106. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1107. context.EmitStvec(reg);
  1108. }
  1109. public static void EmitVectorInsertTmp(ILEmitterCtx context, int index, int size)
  1110. {
  1111. ThrowIfInvalid(index, size);
  1112. context.EmitLdvectmp();
  1113. context.EmitLdc_I4(index);
  1114. context.EmitLdc_I4(size);
  1115. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1116. context.EmitStvectmp();
  1117. }
  1118. public static void EmitVectorInsert(ILEmitterCtx context, int reg, int index, int size, long value)
  1119. {
  1120. ThrowIfInvalid(index, size);
  1121. context.EmitLdc_I8(value);
  1122. context.EmitLdvec(reg);
  1123. context.EmitLdc_I4(index);
  1124. context.EmitLdc_I4(size);
  1125. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1126. context.EmitStvec(reg);
  1127. }
  1128. public static void EmitVectorInsertTmp(ILEmitterCtx context, int index, int size, long value)
  1129. {
  1130. ThrowIfInvalid(index, size);
  1131. context.EmitLdc_I8(value);
  1132. context.EmitLdvectmp();
  1133. context.EmitLdc_I4(index);
  1134. context.EmitLdc_I4(size);
  1135. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1136. context.EmitStvectmp();
  1137. }
  1138. public static void EmitVectorInsertF(ILEmitterCtx context, int reg, int index, int size)
  1139. {
  1140. ThrowIfInvalidF(index, size);
  1141. context.EmitLdvec(reg);
  1142. context.EmitLdc_I4(index);
  1143. if (size == 0)
  1144. {
  1145. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertSingle));
  1146. }
  1147. else if (size == 1)
  1148. {
  1149. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertDouble));
  1150. }
  1151. else
  1152. {
  1153. throw new ArgumentOutOfRangeException(nameof(size));
  1154. }
  1155. context.EmitStvec(reg);
  1156. }
  1157. public static void EmitVectorInsertTmpF(ILEmitterCtx context, int index, int size)
  1158. {
  1159. ThrowIfInvalidF(index, size);
  1160. context.EmitLdvectmp();
  1161. context.EmitLdc_I4(index);
  1162. if (size == 0)
  1163. {
  1164. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertSingle));
  1165. }
  1166. else if (size == 1)
  1167. {
  1168. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertDouble));
  1169. }
  1170. else
  1171. {
  1172. throw new ArgumentOutOfRangeException(nameof(size));
  1173. }
  1174. context.EmitStvectmp();
  1175. }
  1176. private static void ThrowIfInvalid(int index, int size)
  1177. {
  1178. if ((uint)size > 3u)
  1179. {
  1180. throw new ArgumentOutOfRangeException(nameof(size));
  1181. }
  1182. if ((uint)index >= 16u >> size)
  1183. {
  1184. throw new ArgumentOutOfRangeException(nameof(index));
  1185. }
  1186. }
  1187. private static void ThrowIfInvalidF(int index, int size)
  1188. {
  1189. if ((uint)size > 1u)
  1190. {
  1191. throw new ArgumentOutOfRangeException(nameof(size));
  1192. }
  1193. if ((uint)index >= 4u >> size)
  1194. {
  1195. throw new ArgumentOutOfRangeException(nameof(index));
  1196. }
  1197. }
  1198. }
  1199. }