NvGpuEngineDma.cs 4.4 KB

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  1. using Ryujinx.HLE.Gpu.Memory;
  2. using Ryujinx.HLE.Gpu.Texture;
  3. using System.Collections.Generic;
  4. namespace Ryujinx.HLE.Gpu.Engines
  5. {
  6. class NvGpuEngineDma : INvGpuEngine
  7. {
  8. public int[] Registers { get; private set; }
  9. private NvGpu Gpu;
  10. private Dictionary<int, NvGpuMethod> Methods;
  11. public NvGpuEngineDma(NvGpu Gpu)
  12. {
  13. this.Gpu = Gpu;
  14. Registers = new int[0x1d6];
  15. Methods = new Dictionary<int, NvGpuMethod>();
  16. void AddMethod(int Meth, int Count, int Stride, NvGpuMethod Method)
  17. {
  18. while (Count-- > 0)
  19. {
  20. Methods.Add(Meth, Method);
  21. Meth += Stride;
  22. }
  23. }
  24. AddMethod(0xc0, 1, 1, Execute);
  25. }
  26. public void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
  27. {
  28. if (Methods.TryGetValue(PBEntry.Method, out NvGpuMethod Method))
  29. {
  30. Method(Vmm, PBEntry);
  31. }
  32. else
  33. {
  34. WriteRegister(PBEntry);
  35. }
  36. }
  37. private void Execute(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
  38. {
  39. int Control = PBEntry.Arguments[0];
  40. bool SrcLinear = ((Control >> 7) & 1) != 0;
  41. bool DstLinear = ((Control >> 8) & 1) != 0;
  42. long SrcAddress = MakeInt64From2xInt32(NvGpuEngineDmaReg.SrcAddress);
  43. long DstAddress = MakeInt64From2xInt32(NvGpuEngineDmaReg.DstAddress);
  44. int SrcPitch = ReadRegister(NvGpuEngineDmaReg.SrcPitch);
  45. int DstPitch = ReadRegister(NvGpuEngineDmaReg.DstPitch);
  46. int DstBlkDim = ReadRegister(NvGpuEngineDmaReg.DstBlkDim);
  47. int DstSizeX = ReadRegister(NvGpuEngineDmaReg.DstSizeX);
  48. int DstSizeY = ReadRegister(NvGpuEngineDmaReg.DstSizeY);
  49. int DstSizeZ = ReadRegister(NvGpuEngineDmaReg.DstSizeZ);
  50. int DstPosXY = ReadRegister(NvGpuEngineDmaReg.DstPosXY);
  51. int DstPosZ = ReadRegister(NvGpuEngineDmaReg.DstPosZ);
  52. int SrcBlkDim = ReadRegister(NvGpuEngineDmaReg.SrcBlkDim);
  53. int SrcSizeX = ReadRegister(NvGpuEngineDmaReg.SrcSizeX);
  54. int SrcSizeY = ReadRegister(NvGpuEngineDmaReg.SrcSizeY);
  55. int SrcSizeZ = ReadRegister(NvGpuEngineDmaReg.SrcSizeZ);
  56. int SrcPosXY = ReadRegister(NvGpuEngineDmaReg.SrcPosXY);
  57. int SrcPosZ = ReadRegister(NvGpuEngineDmaReg.SrcPosZ);
  58. int DstPosX = (DstPosXY >> 0) & 0xffff;
  59. int DstPosY = (DstPosXY >> 16) & 0xffff;
  60. int SrcPosX = (SrcPosXY >> 0) & 0xffff;
  61. int SrcPosY = (SrcPosXY >> 16) & 0xffff;
  62. int SrcBlockHeight = 1 << ((SrcBlkDim >> 4) & 0xf);
  63. int DstBlockHeight = 1 << ((DstBlkDim >> 4) & 0xf);
  64. ISwizzle SrcSwizzle;
  65. if (SrcLinear)
  66. {
  67. SrcSwizzle = new LinearSwizzle(SrcPitch, 1);
  68. }
  69. else
  70. {
  71. SrcSwizzle = new BlockLinearSwizzle(SrcSizeX, 1, SrcBlockHeight);
  72. }
  73. ISwizzle DstSwizzle;
  74. if (DstLinear)
  75. {
  76. DstSwizzle = new LinearSwizzle(DstPitch, 1);
  77. }
  78. else
  79. {
  80. DstSwizzle = new BlockLinearSwizzle(DstSizeX, 1, DstBlockHeight);
  81. }
  82. for (int Y = 0; Y < DstSizeY; Y++)
  83. for (int X = 0; X < DstSizeX; X++)
  84. {
  85. long SrcOffset = SrcAddress + (uint)SrcSwizzle.GetSwizzleOffset(X, Y);
  86. long DstOffset = DstAddress + (uint)DstSwizzle.GetSwizzleOffset(X, Y);
  87. Vmm.WriteByte(DstOffset, Vmm.ReadByte(SrcOffset));
  88. }
  89. }
  90. private long MakeInt64From2xInt32(NvGpuEngineDmaReg Reg)
  91. {
  92. return
  93. (long)Registers[(int)Reg + 0] << 32 |
  94. (uint)Registers[(int)Reg + 1];
  95. }
  96. private void WriteRegister(NvGpuPBEntry PBEntry)
  97. {
  98. int ArgsCount = PBEntry.Arguments.Count;
  99. if (ArgsCount > 0)
  100. {
  101. Registers[PBEntry.Method] = PBEntry.Arguments[ArgsCount - 1];
  102. }
  103. }
  104. private int ReadRegister(NvGpuEngineDmaReg Reg)
  105. {
  106. return Registers[(int)Reg];
  107. }
  108. private void WriteRegister(NvGpuEngineDmaReg Reg, int Value)
  109. {
  110. Registers[(int)Reg] = Value;
  111. }
  112. }
  113. }