| .. |
|
AInst.cs
|
9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
|
8 anni fa |
|
AInstEmitAlu.cs
|
c99b2884e4
Remove broken adds/cmn with condition check optimization (#218)
|
7 anni fa |
|
AInstEmitAluHelper.cs
|
708761963e
Fix corner cases of ADCS and SBFM
|
8 anni fa |
|
AInstEmitBfm.cs
|
708761963e
Fix corner cases of ADCS and SBFM
|
8 anni fa |
|
AInstEmitCcmp.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 anni fa |
|
AInstEmitCsel.cs
|
950011c90f
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
|
8 anni fa |
|
AInstEmitException.cs
|
65105c2a3b
Implement SvcGetThreadContext3
|
7 anni fa |
|
AInstEmitFlow.cs
|
bd9b1e2c6b
Stub a few services, add support for generating call stacks on the CPU
|
8 anni fa |
|
AInstEmitHash.cs
|
8f6387128a
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
|
7 anni fa |
|
AInstEmitMemory.cs
|
4731c7545d
Fix mistake on astc conversion, make some static methods that shouldn't be public private, remove old commmented out code
|
8 anni fa |
|
AInstEmitMemoryEx.cs
|
3e6afeb513
Fix some thread sync issues (#172)
|
7 anni fa |
|
AInstEmitMemoryHelper.cs
|
a8ba340dde
Improved logging (#103)
|
8 anni fa |
|
AInstEmitMove.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 anni fa |
|
AInstEmitMul.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 anni fa |
|
AInstEmitSimdArithmetic.cs
|
be31f5b46d
Improve CountLeadingZeros() algorithm, nits. (#219)
|
7 anni fa |
|
AInstEmitSimdCmp.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 anni fa |
|
AInstEmitSimdCvt.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 anni fa |
|
AInstEmitSimdHelper.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 anni fa |
|
AInstEmitSimdLogical.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 anni fa |
|
AInstEmitSimdMemory.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 anni fa |
|
AInstEmitSimdMove.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 anni fa |
|
AInstEmitSimdShift.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 anni fa |
|
AInstEmitSystem.cs
|
2ed24af756
Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count
|
8 anni fa |
|
AInstEmitter.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 anni fa |
|
AInstInterpreter.cs
|
9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
|
8 anni fa |
|
ASoftFallback.cs
|
be31f5b46d
Improve CountLeadingZeros() algorithm, nits. (#219)
|
7 anni fa |
|
ASoftFloat.cs
|
b233ae964f
AInstEmitSimdCvt: Half-precision to single-precision conversion (#235)
|
7 anni fa |
|
AVectorHelper.cs
|
c228cf320d
Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Improve CountSetBits8() algorithm. (#212)
|
7 anni fa |