| .. |
|
CpuTest.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
|
CpuTest32.cs
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
il y a 5 ans |
|
CpuTestAlu.cs
|
d87c5375f1
Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
|
il y a 6 ans |
|
CpuTestAlu32.cs
|
fb0939f9b6
Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
|
il y a 6 ans |
|
CpuTestAluBinary.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestAluImm.cs
|
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
|
il y a 7 ans |
|
CpuTestAluRs.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestAluRs32.cs
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
|
il y a 6 ans |
|
CpuTestAluRx.cs
|
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
|
il y a 7 ans |
|
CpuTestBf32.cs
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
|
il y a 6 ans |
|
CpuTestBfm.cs
|
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
|
il y a 7 ans |
|
CpuTestCcmpImm.cs
|
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
|
il y a 7 ans |
|
CpuTestCcmpReg.cs
|
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
|
il y a 7 ans |
|
CpuTestCsel.cs
|
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
|
il y a 7 ans |
|
CpuTestMisc.cs
|
e4ee61d6c3
Improve V128 (#1097)
|
il y a 6 ans |
|
CpuTestMov.cs
|
d87c5375f1
Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
|
il y a 6 ans |
|
CpuTestMul.cs
|
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
|
il y a 7 ans |
|
CpuTestMul32.cs
|
fb0939f9b6
Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
|
il y a 6 ans |
|
CpuTestSimd.cs
|
83d94b21d0
Add FMaxNmV & FMinNmV Inst.s with Test. (#1279)
|
il y a 6 ans |
|
CpuTestSimdCrypto.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdCrypto32.cs
|
dd433c1296
Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
|
il y a 6 ans |
|
CpuTestSimdCvt.cs
|
0915731a9d
Implemented fast paths for: (#846)
|
il y a 6 ans |
|
CpuTestSimdExt.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdFcond.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdFmov.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdImm.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdIns.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdLogical32.cs
|
dd433c1296
Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
|
il y a 6 ans |
|
CpuTestSimdMemory32.cs
|
b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
|
il y a 6 ans |
|
CpuTestSimdMov32.cs
|
9a49f8aec9
Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303)
|
il y a 5 ans |
|
CpuTestSimdReg.cs
|
b8ee5b15ab
Implement FACGE and FACGT (Scalar and Vector) AArch64 SIMD instructions (#956)
|
il y a 6 ans |
|
CpuTestSimdReg32.cs
|
9a49f8aec9
Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303)
|
il y a 5 ans |
|
CpuTestSimdRegElem.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdRegElem32.cs
|
c26f3774bd
Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
|
il y a 6 ans |
|
CpuTestSimdRegElemF.cs
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
il y a 6 ans |
|
CpuTestSimdShImm.cs
|
0915731a9d
Implemented fast paths for: (#846)
|
il y a 6 ans |
|
CpuTestSimdShImm32.cs
|
c26f3774bd
Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
|
il y a 6 ans |
|
CpuTestSimdTbl.cs
|
16869402bf
Add Tbx Inst. (fast & slow paths), with Tests. (#782)
|
il y a 6 ans |
|
CpuTestSystem.cs
|
7c111a3567
Add Mrs & Msr (Nzcv) Inst., with Tests. (#819)
|
il y a 6 ans |
riperiperi