InstEmitSimdHelper.cs 60 KB

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  1. using ARMeilleure.Decoders;
  2. using ARMeilleure.IntermediateRepresentation;
  3. using ARMeilleure.State;
  4. using ARMeilleure.Translation;
  5. using System;
  6. using System.Diagnostics;
  7. using System.Reflection;
  8. using static ARMeilleure.Instructions.InstEmitHelper;
  9. using static ARMeilleure.IntermediateRepresentation.OperandHelper;
  10. namespace ARMeilleure.Instructions
  11. {
  12. using Func1I = Func<Operand, Operand>;
  13. using Func2I = Func<Operand, Operand, Operand>;
  14. using Func3I = Func<Operand, Operand, Operand, Operand>;
  15. static class InstEmitSimdHelper
  16. {
  17. #region "Masks"
  18. public static readonly long[] EvenMasks = new long[]
  19. {
  20. 14L << 56 | 12L << 48 | 10L << 40 | 08L << 32 | 06L << 24 | 04L << 16 | 02L << 8 | 00L << 0, // B
  21. 13L << 56 | 12L << 48 | 09L << 40 | 08L << 32 | 05L << 24 | 04L << 16 | 01L << 8 | 00L << 0, // H
  22. 11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 03L << 24 | 02L << 16 | 01L << 8 | 00L << 0 // S
  23. };
  24. public static readonly long[] OddMasks = new long[]
  25. {
  26. 15L << 56 | 13L << 48 | 11L << 40 | 09L << 32 | 07L << 24 | 05L << 16 | 03L << 8 | 01L << 0, // B
  27. 15L << 56 | 14L << 48 | 11L << 40 | 10L << 32 | 07L << 24 | 06L << 16 | 03L << 8 | 02L << 0, // H
  28. 15L << 56 | 14L << 48 | 13L << 40 | 12L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0 // S
  29. };
  30. public static readonly long ZeroMask = 128L << 56 | 128L << 48 | 128L << 40 | 128L << 32 | 128L << 24 | 128L << 16 | 128L << 8 | 128L << 0;
  31. #endregion
  32. #region "X86 SSE Intrinsics"
  33. public static readonly Intrinsic[] X86PaddInstruction = new Intrinsic[]
  34. {
  35. Intrinsic.X86Paddb,
  36. Intrinsic.X86Paddw,
  37. Intrinsic.X86Paddd,
  38. Intrinsic.X86Paddq
  39. };
  40. public static readonly Intrinsic[] X86PcmpeqInstruction = new Intrinsic[]
  41. {
  42. Intrinsic.X86Pcmpeqb,
  43. Intrinsic.X86Pcmpeqw,
  44. Intrinsic.X86Pcmpeqd,
  45. Intrinsic.X86Pcmpeqq
  46. };
  47. public static readonly Intrinsic[] X86PcmpgtInstruction = new Intrinsic[]
  48. {
  49. Intrinsic.X86Pcmpgtb,
  50. Intrinsic.X86Pcmpgtw,
  51. Intrinsic.X86Pcmpgtd,
  52. Intrinsic.X86Pcmpgtq
  53. };
  54. public static readonly Intrinsic[] X86PmaxsInstruction = new Intrinsic[]
  55. {
  56. Intrinsic.X86Pmaxsb,
  57. Intrinsic.X86Pmaxsw,
  58. Intrinsic.X86Pmaxsd
  59. };
  60. public static readonly Intrinsic[] X86PmaxuInstruction = new Intrinsic[]
  61. {
  62. Intrinsic.X86Pmaxub,
  63. Intrinsic.X86Pmaxuw,
  64. Intrinsic.X86Pmaxud
  65. };
  66. public static readonly Intrinsic[] X86PminsInstruction = new Intrinsic[]
  67. {
  68. Intrinsic.X86Pminsb,
  69. Intrinsic.X86Pminsw,
  70. Intrinsic.X86Pminsd
  71. };
  72. public static readonly Intrinsic[] X86PminuInstruction = new Intrinsic[]
  73. {
  74. Intrinsic.X86Pminub,
  75. Intrinsic.X86Pminuw,
  76. Intrinsic.X86Pminud
  77. };
  78. public static readonly Intrinsic[] X86PmovsxInstruction = new Intrinsic[]
  79. {
  80. Intrinsic.X86Pmovsxbw,
  81. Intrinsic.X86Pmovsxwd,
  82. Intrinsic.X86Pmovsxdq
  83. };
  84. public static readonly Intrinsic[] X86PmovzxInstruction = new Intrinsic[]
  85. {
  86. Intrinsic.X86Pmovzxbw,
  87. Intrinsic.X86Pmovzxwd,
  88. Intrinsic.X86Pmovzxdq
  89. };
  90. public static readonly Intrinsic[] X86PsllInstruction = new Intrinsic[]
  91. {
  92. 0,
  93. Intrinsic.X86Psllw,
  94. Intrinsic.X86Pslld,
  95. Intrinsic.X86Psllq
  96. };
  97. public static readonly Intrinsic[] X86PsraInstruction = new Intrinsic[]
  98. {
  99. 0,
  100. Intrinsic.X86Psraw,
  101. Intrinsic.X86Psrad
  102. };
  103. public static readonly Intrinsic[] X86PsrlInstruction = new Intrinsic[]
  104. {
  105. 0,
  106. Intrinsic.X86Psrlw,
  107. Intrinsic.X86Psrld,
  108. Intrinsic.X86Psrlq
  109. };
  110. public static readonly Intrinsic[] X86PsubInstruction = new Intrinsic[]
  111. {
  112. Intrinsic.X86Psubb,
  113. Intrinsic.X86Psubw,
  114. Intrinsic.X86Psubd,
  115. Intrinsic.X86Psubq
  116. };
  117. public static readonly Intrinsic[] X86PunpckhInstruction = new Intrinsic[]
  118. {
  119. Intrinsic.X86Punpckhbw,
  120. Intrinsic.X86Punpckhwd,
  121. Intrinsic.X86Punpckhdq,
  122. Intrinsic.X86Punpckhqdq
  123. };
  124. public static readonly Intrinsic[] X86PunpcklInstruction = new Intrinsic[]
  125. {
  126. Intrinsic.X86Punpcklbw,
  127. Intrinsic.X86Punpcklwd,
  128. Intrinsic.X86Punpckldq,
  129. Intrinsic.X86Punpcklqdq
  130. };
  131. #endregion
  132. public static int GetImmShl(OpCodeSimdShImm op)
  133. {
  134. return op.Imm - (8 << op.Size);
  135. }
  136. public static int GetImmShr(OpCodeSimdShImm op)
  137. {
  138. return (8 << (op.Size + 1)) - op.Imm;
  139. }
  140. public static Operand X86GetScalar(ArmEmitterContext context, float value)
  141. {
  142. return X86GetScalar(context, BitConverter.SingleToInt32Bits(value));
  143. }
  144. public static Operand X86GetScalar(ArmEmitterContext context, double value)
  145. {
  146. return X86GetScalar(context, BitConverter.DoubleToInt64Bits(value));
  147. }
  148. public static Operand X86GetScalar(ArmEmitterContext context, int value)
  149. {
  150. return context.VectorCreateScalar(Const(value));
  151. }
  152. public static Operand X86GetScalar(ArmEmitterContext context, long value)
  153. {
  154. return context.VectorCreateScalar(Const(value));
  155. }
  156. public static Operand X86GetAllElements(ArmEmitterContext context, float value)
  157. {
  158. return X86GetAllElements(context, BitConverter.SingleToInt32Bits(value));
  159. }
  160. public static Operand X86GetAllElements(ArmEmitterContext context, double value)
  161. {
  162. return X86GetAllElements(context, BitConverter.DoubleToInt64Bits(value));
  163. }
  164. public static Operand X86GetAllElements(ArmEmitterContext context, int value)
  165. {
  166. Operand vector = context.VectorCreateScalar(Const(value));
  167. vector = context.AddIntrinsic(Intrinsic.X86Shufps, vector, vector, Const(0));
  168. return vector;
  169. }
  170. public static Operand X86GetAllElements(ArmEmitterContext context, long value)
  171. {
  172. Operand vector = context.VectorCreateScalar(Const(value));
  173. vector = context.AddIntrinsic(Intrinsic.X86Movlhps, vector, vector);
  174. return vector;
  175. }
  176. public static Operand X86GetElements(ArmEmitterContext context, long e1, long e0)
  177. {
  178. return X86GetElements(context, (ulong)e1, (ulong)e0);
  179. }
  180. public static Operand X86GetElements(ArmEmitterContext context, ulong e1, ulong e0)
  181. {
  182. Operand vector0 = context.VectorCreateScalar(Const(e0));
  183. Operand vector1 = context.VectorCreateScalar(Const(e1));
  184. return context.AddIntrinsic(Intrinsic.X86Punpcklqdq, vector0, vector1);
  185. }
  186. public static int X86GetRoundControl(FPRoundingMode roundMode)
  187. {
  188. switch (roundMode)
  189. {
  190. case FPRoundingMode.ToNearest: return 8 | 0; // even
  191. case FPRoundingMode.TowardsPlusInfinity: return 8 | 2;
  192. case FPRoundingMode.TowardsMinusInfinity: return 8 | 1;
  193. case FPRoundingMode.TowardsZero: return 8 | 3;
  194. }
  195. throw new ArgumentException($"Invalid rounding mode \"{roundMode}\".");
  196. }
  197. public static Operand EmitCountSetBits8(ArmEmitterContext context, Operand op) // "size" is 8 (SIMD&FP Inst.).
  198. {
  199. Debug.Assert(op.Type == OperandType.I32 || op.Type == OperandType.I64);
  200. Operand op0 = context.Subtract(op, context.BitwiseAnd(context.ShiftRightUI(op, Const(1)), Const(op.Type, 0x55L)));
  201. Operand c1 = Const(op.Type, 0x33L);
  202. Operand op1 = context.Add(context.BitwiseAnd(context.ShiftRightUI(op0, Const(2)), c1), context.BitwiseAnd(op0, c1));
  203. return context.BitwiseAnd(context.Add(op1, context.ShiftRightUI(op1, Const(4))), Const(op.Type, 0x0fL));
  204. }
  205. public static void EmitScalarUnaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  206. {
  207. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  208. Operand n = GetVec(op.Rn);
  209. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  210. Operand res = context.AddIntrinsic(inst, n);
  211. if ((op.Size & 1) != 0)
  212. {
  213. res = context.VectorZeroUpper64(res);
  214. }
  215. else
  216. {
  217. res = context.VectorZeroUpper96(res);
  218. }
  219. context.Copy(GetVec(op.Rd), res);
  220. }
  221. public static void EmitScalarBinaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  222. {
  223. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  224. Operand n = GetVec(op.Rn);
  225. Operand m = GetVec(op.Rm);
  226. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  227. Operand res = context.AddIntrinsic(inst, n, m);
  228. if ((op.Size & 1) != 0)
  229. {
  230. res = context.VectorZeroUpper64(res);
  231. }
  232. else
  233. {
  234. res = context.VectorZeroUpper96(res);
  235. }
  236. context.Copy(GetVec(op.Rd), res);
  237. }
  238. public static void EmitVectorUnaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  239. {
  240. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  241. Operand n = GetVec(op.Rn);
  242. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  243. Operand res = context.AddIntrinsic(inst, n);
  244. if (op.RegisterSize == RegisterSize.Simd64)
  245. {
  246. res = context.VectorZeroUpper64(res);
  247. }
  248. context.Copy(GetVec(op.Rd), res);
  249. }
  250. public static void EmitVectorBinaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  251. {
  252. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  253. Operand n = GetVec(op.Rn);
  254. Operand m = GetVec(op.Rm);
  255. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  256. Operand res = context.AddIntrinsic(inst, n, m);
  257. if (op.RegisterSize == RegisterSize.Simd64)
  258. {
  259. res = context.VectorZeroUpper64(res);
  260. }
  261. context.Copy(GetVec(op.Rd), res);
  262. }
  263. public static Operand EmitUnaryMathCall(ArmEmitterContext context, string name, Operand n)
  264. {
  265. IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
  266. MethodInfo info = (op.Size & 1) == 0
  267. ? typeof(MathF).GetMethod(name, new Type[] { typeof(float) })
  268. : typeof(Math). GetMethod(name, new Type[] { typeof(double) });
  269. return context.Call(info, n);
  270. }
  271. public static Operand EmitRoundMathCall(ArmEmitterContext context, MidpointRounding roundMode, Operand n)
  272. {
  273. IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
  274. string name = nameof(Math.Round);
  275. MethodInfo info = (op.Size & 1) == 0
  276. ? typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(MidpointRounding) })
  277. : typeof(Math). GetMethod(name, new Type[] { typeof(double), typeof(MidpointRounding) });
  278. return context.Call(info, n, Const((int)roundMode));
  279. }
  280. public static Operand EmitSoftFloatCall(ArmEmitterContext context, string name, params Operand[] callArgs)
  281. {
  282. IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
  283. MethodInfo info = (op.Size & 1) == 0
  284. ? typeof(SoftFloat32).GetMethod(name)
  285. : typeof(SoftFloat64).GetMethod(name);
  286. return context.Call(info, callArgs);
  287. }
  288. public static void EmitScalarBinaryOpByElemF(ArmEmitterContext context, Func2I emit)
  289. {
  290. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  291. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  292. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  293. Operand m = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  294. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(n, m), 0));
  295. }
  296. public static void EmitScalarTernaryOpByElemF(ArmEmitterContext context, Func3I emit)
  297. {
  298. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  299. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  300. Operand d = context.VectorExtract(type, GetVec(op.Rd), 0);
  301. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  302. Operand m = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  303. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(d, n, m), 0));
  304. }
  305. public static void EmitScalarUnaryOpSx(ArmEmitterContext context, Func1I emit)
  306. {
  307. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  308. Operand n = EmitVectorExtractSx(context, op.Rn, 0, op.Size);
  309. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n), 0, op.Size);
  310. context.Copy(GetVec(op.Rd), d);
  311. }
  312. public static void EmitScalarBinaryOpSx(ArmEmitterContext context, Func2I emit)
  313. {
  314. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  315. Operand n = EmitVectorExtractSx(context, op.Rn, 0, op.Size);
  316. Operand m = EmitVectorExtractSx(context, op.Rm, 0, op.Size);
  317. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n, m), 0, op.Size);
  318. context.Copy(GetVec(op.Rd), d);
  319. }
  320. public static void EmitScalarUnaryOpZx(ArmEmitterContext context, Func1I emit)
  321. {
  322. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  323. Operand n = EmitVectorExtractZx(context, op.Rn, 0, op.Size);
  324. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n), 0, op.Size);
  325. context.Copy(GetVec(op.Rd), d);
  326. }
  327. public static void EmitScalarBinaryOpZx(ArmEmitterContext context, Func2I emit)
  328. {
  329. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  330. Operand n = EmitVectorExtractZx(context, op.Rn, 0, op.Size);
  331. Operand m = EmitVectorExtractZx(context, op.Rm, 0, op.Size);
  332. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n, m), 0, op.Size);
  333. context.Copy(GetVec(op.Rd), d);
  334. }
  335. public static void EmitScalarTernaryOpZx(ArmEmitterContext context, Func3I emit)
  336. {
  337. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  338. Operand d = EmitVectorExtractZx(context, op.Rd, 0, op.Size);
  339. Operand n = EmitVectorExtractZx(context, op.Rn, 0, op.Size);
  340. Operand m = EmitVectorExtractZx(context, op.Rm, 0, op.Size);
  341. d = EmitVectorInsert(context, context.VectorZero(), emit(d, n, m), 0, op.Size);
  342. context.Copy(GetVec(op.Rd), d);
  343. }
  344. public static void EmitScalarUnaryOpF(ArmEmitterContext context, Func1I emit)
  345. {
  346. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  347. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  348. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  349. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(n), 0));
  350. }
  351. public static void EmitScalarBinaryOpF(ArmEmitterContext context, Func2I emit)
  352. {
  353. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  354. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  355. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  356. Operand m = context.VectorExtract(type, GetVec(op.Rm), 0);
  357. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(n, m), 0));
  358. }
  359. public static void EmitScalarTernaryRaOpF(ArmEmitterContext context, Func3I emit)
  360. {
  361. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  362. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  363. Operand a = context.VectorExtract(type, GetVec(op.Ra), 0);
  364. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  365. Operand m = context.VectorExtract(type, GetVec(op.Rm), 0);
  366. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(a, n, m), 0));
  367. }
  368. public static void EmitVectorUnaryOpF(ArmEmitterContext context, Func1I emit)
  369. {
  370. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  371. Operand res = context.VectorZero();
  372. int sizeF = op.Size & 1;
  373. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  374. int elems = op.GetBytesCount() >> sizeF + 2;
  375. for (int index = 0; index < elems; index++)
  376. {
  377. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  378. res = context.VectorInsert(res, emit(ne), index);
  379. }
  380. context.Copy(GetVec(op.Rd), res);
  381. }
  382. public static void EmitVectorBinaryOpF(ArmEmitterContext context, Func2I emit)
  383. {
  384. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  385. Operand res = context.VectorZero();
  386. int sizeF = op.Size & 1;
  387. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  388. int elems = op.GetBytesCount() >> sizeF + 2;
  389. for (int index = 0; index < elems; index++)
  390. {
  391. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  392. Operand me = context.VectorExtract(type, GetVec(op.Rm), index);
  393. res = context.VectorInsert(res, emit(ne, me), index);
  394. }
  395. context.Copy(GetVec(op.Rd), res);
  396. }
  397. public static void EmitVectorTernaryOpF(ArmEmitterContext context, Func3I emit)
  398. {
  399. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  400. Operand res = context.VectorZero();
  401. int sizeF = op.Size & 1;
  402. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  403. int elems = op.GetBytesCount() >> sizeF + 2;
  404. for (int index = 0; index < elems; index++)
  405. {
  406. Operand de = context.VectorExtract(type, GetVec(op.Rd), index);
  407. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  408. Operand me = context.VectorExtract(type, GetVec(op.Rm), index);
  409. res = context.VectorInsert(res, emit(de, ne, me), index);
  410. }
  411. context.Copy(GetVec(op.Rd), res);
  412. }
  413. public static void EmitVectorBinaryOpByElemF(ArmEmitterContext context, Func2I emit)
  414. {
  415. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  416. Operand res = context.VectorZero();
  417. int sizeF = op.Size & 1;
  418. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  419. int elems = op.GetBytesCount() >> sizeF + 2;
  420. for (int index = 0; index < elems; index++)
  421. {
  422. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  423. Operand me = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  424. res = context.VectorInsert(res, emit(ne, me), index);
  425. }
  426. context.Copy(GetVec(op.Rd), res);
  427. }
  428. public static void EmitVectorTernaryOpByElemF(ArmEmitterContext context, Func3I emit)
  429. {
  430. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  431. Operand res = context.VectorZero();
  432. int sizeF = op.Size & 1;
  433. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  434. int elems = op.GetBytesCount() >> sizeF + 2;
  435. for (int index = 0; index < elems; index++)
  436. {
  437. Operand de = context.VectorExtract(type, GetVec(op.Rd), index);
  438. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  439. Operand me = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  440. res = context.VectorInsert(res, emit(de, ne, me), index);
  441. }
  442. context.Copy(GetVec(op.Rd), res);
  443. }
  444. public static void EmitVectorUnaryOpSx(ArmEmitterContext context, Func1I emit)
  445. {
  446. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  447. Operand res = context.VectorZero();
  448. int elems = op.GetBytesCount() >> op.Size;
  449. for (int index = 0; index < elems; index++)
  450. {
  451. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  452. res = EmitVectorInsert(context, res, emit(ne), index, op.Size);
  453. }
  454. context.Copy(GetVec(op.Rd), res);
  455. }
  456. public static void EmitVectorBinaryOpSx(ArmEmitterContext context, Func2I emit)
  457. {
  458. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  459. Operand res = context.VectorZero();
  460. int elems = op.GetBytesCount() >> op.Size;
  461. for (int index = 0; index < elems; index++)
  462. {
  463. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  464. Operand me = EmitVectorExtractSx(context, op.Rm, index, op.Size);
  465. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  466. }
  467. context.Copy(GetVec(op.Rd), res);
  468. }
  469. public static void EmitVectorTernaryOpSx(ArmEmitterContext context, Func3I emit)
  470. {
  471. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  472. Operand res = context.VectorZero();
  473. int elems = op.GetBytesCount() >> op.Size;
  474. for (int index = 0; index < elems; index++)
  475. {
  476. Operand de = EmitVectorExtractSx(context, op.Rd, index, op.Size);
  477. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  478. Operand me = EmitVectorExtractSx(context, op.Rm, index, op.Size);
  479. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size);
  480. }
  481. context.Copy(GetVec(op.Rd), res);
  482. }
  483. public static void EmitVectorUnaryOpZx(ArmEmitterContext context, Func1I emit)
  484. {
  485. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  486. Operand res = context.VectorZero();
  487. int elems = op.GetBytesCount() >> op.Size;
  488. for (int index = 0; index < elems; index++)
  489. {
  490. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  491. res = EmitVectorInsert(context, res, emit(ne), index, op.Size);
  492. }
  493. context.Copy(GetVec(op.Rd), res);
  494. }
  495. public static void EmitVectorBinaryOpZx(ArmEmitterContext context, Func2I emit)
  496. {
  497. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  498. Operand res = context.VectorZero();
  499. int elems = op.GetBytesCount() >> op.Size;
  500. for (int index = 0; index < elems; index++)
  501. {
  502. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  503. Operand me = EmitVectorExtractZx(context, op.Rm, index, op.Size);
  504. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  505. }
  506. context.Copy(GetVec(op.Rd), res);
  507. }
  508. public static void EmitVectorTernaryOpZx(ArmEmitterContext context, Func3I emit)
  509. {
  510. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  511. Operand res = context.VectorZero();
  512. int elems = op.GetBytesCount() >> op.Size;
  513. for (int index = 0; index < elems; index++)
  514. {
  515. Operand de = EmitVectorExtractZx(context, op.Rd, index, op.Size);
  516. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  517. Operand me = EmitVectorExtractZx(context, op.Rm, index, op.Size);
  518. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size);
  519. }
  520. context.Copy(GetVec(op.Rd), res);
  521. }
  522. public static void EmitVectorBinaryOpByElemSx(ArmEmitterContext context, Func2I emit)
  523. {
  524. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  525. Operand res = context.VectorZero();
  526. Operand me = EmitVectorExtractSx(context, op.Rm, op.Index, op.Size);
  527. int elems = op.GetBytesCount() >> op.Size;
  528. for (int index = 0; index < elems; index++)
  529. {
  530. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  531. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  532. }
  533. context.Copy(GetVec(op.Rd), res);
  534. }
  535. public static void EmitVectorBinaryOpByElemZx(ArmEmitterContext context, Func2I emit)
  536. {
  537. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  538. Operand res = context.VectorZero();
  539. Operand me = EmitVectorExtractZx(context, op.Rm, op.Index, op.Size);
  540. int elems = op.GetBytesCount() >> op.Size;
  541. for (int index = 0; index < elems; index++)
  542. {
  543. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  544. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  545. }
  546. context.Copy(GetVec(op.Rd), res);
  547. }
  548. public static void EmitVectorTernaryOpByElemZx(ArmEmitterContext context, Func3I emit)
  549. {
  550. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  551. Operand res = context.VectorZero();
  552. Operand me = EmitVectorExtractZx(context, op.Rm, op.Index, op.Size);
  553. int elems = op.GetBytesCount() >> op.Size;
  554. for (int index = 0; index < elems; index++)
  555. {
  556. Operand de = EmitVectorExtractZx(context, op.Rd, index, op.Size);
  557. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  558. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size);
  559. }
  560. context.Copy(GetVec(op.Rd), res);
  561. }
  562. public static void EmitVectorImmUnaryOp(ArmEmitterContext context, Func1I emit)
  563. {
  564. OpCodeSimdImm op = (OpCodeSimdImm)context.CurrOp;
  565. Operand imm = Const(op.Immediate);
  566. Operand res = context.VectorZero();
  567. int elems = op.GetBytesCount() >> op.Size;
  568. for (int index = 0; index < elems; index++)
  569. {
  570. res = EmitVectorInsert(context, res, emit(imm), index, op.Size);
  571. }
  572. context.Copy(GetVec(op.Rd), res);
  573. }
  574. public static void EmitVectorImmBinaryOp(ArmEmitterContext context, Func2I emit)
  575. {
  576. OpCodeSimdImm op = (OpCodeSimdImm)context.CurrOp;
  577. Operand imm = Const(op.Immediate);
  578. Operand res = context.VectorZero();
  579. int elems = op.GetBytesCount() >> op.Size;
  580. for (int index = 0; index < elems; index++)
  581. {
  582. Operand de = EmitVectorExtractZx(context, op.Rd, index, op.Size);
  583. res = EmitVectorInsert(context, res, emit(de, imm), index, op.Size);
  584. }
  585. context.Copy(GetVec(op.Rd), res);
  586. }
  587. public static void EmitVectorWidenRmBinaryOpSx(ArmEmitterContext context, Func2I emit)
  588. {
  589. EmitVectorWidenRmBinaryOp(context, emit, signed: true);
  590. }
  591. public static void EmitVectorWidenRmBinaryOpZx(ArmEmitterContext context, Func2I emit)
  592. {
  593. EmitVectorWidenRmBinaryOp(context, emit, signed: false);
  594. }
  595. private static void EmitVectorWidenRmBinaryOp(ArmEmitterContext context, Func2I emit, bool signed)
  596. {
  597. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  598. Operand res = context.VectorZero();
  599. int elems = 8 >> op.Size;
  600. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  601. for (int index = 0; index < elems; index++)
  602. {
  603. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size + 1, signed);
  604. Operand me = EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  605. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size + 1);
  606. }
  607. context.Copy(GetVec(op.Rd), res);
  608. }
  609. public static void EmitVectorWidenRnRmBinaryOpSx(ArmEmitterContext context, Func2I emit)
  610. {
  611. EmitVectorWidenRnRmBinaryOp(context, emit, signed: true);
  612. }
  613. public static void EmitVectorWidenRnRmBinaryOpZx(ArmEmitterContext context, Func2I emit)
  614. {
  615. EmitVectorWidenRnRmBinaryOp(context, emit, signed: false);
  616. }
  617. private static void EmitVectorWidenRnRmBinaryOp(ArmEmitterContext context, Func2I emit, bool signed)
  618. {
  619. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  620. Operand res = context.VectorZero();
  621. int elems = 8 >> op.Size;
  622. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  623. for (int index = 0; index < elems; index++)
  624. {
  625. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  626. Operand me = EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  627. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size + 1);
  628. }
  629. context.Copy(GetVec(op.Rd), res);
  630. }
  631. public static void EmitVectorWidenRnRmTernaryOpSx(ArmEmitterContext context, Func3I emit)
  632. {
  633. EmitVectorWidenRnRmTernaryOp(context, emit, signed: true);
  634. }
  635. public static void EmitVectorWidenRnRmTernaryOpZx(ArmEmitterContext context, Func3I emit)
  636. {
  637. EmitVectorWidenRnRmTernaryOp(context, emit, signed: false);
  638. }
  639. private static void EmitVectorWidenRnRmTernaryOp(ArmEmitterContext context, Func3I emit, bool signed)
  640. {
  641. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  642. Operand res = context.VectorZero();
  643. int elems = 8 >> op.Size;
  644. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  645. for (int index = 0; index < elems; index++)
  646. {
  647. Operand de = EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  648. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  649. Operand me = EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  650. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size + 1);
  651. }
  652. context.Copy(GetVec(op.Rd), res);
  653. }
  654. public static void EmitVectorWidenBinaryOpByElemSx(ArmEmitterContext context, Func2I emit)
  655. {
  656. EmitVectorWidenBinaryOpByElem(context, emit, signed: true);
  657. }
  658. public static void EmitVectorWidenBinaryOpByElemZx(ArmEmitterContext context, Func2I emit)
  659. {
  660. EmitVectorWidenBinaryOpByElem(context, emit, signed: false);
  661. }
  662. private static void EmitVectorWidenBinaryOpByElem(ArmEmitterContext context, Func2I emit, bool signed)
  663. {
  664. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  665. Operand res = context.VectorZero();
  666. Operand me = EmitVectorExtract(context, op.Rm, op.Index, op.Size, signed);
  667. int elems = 8 >> op.Size;
  668. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  669. for (int index = 0; index < elems; index++)
  670. {
  671. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  672. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size + 1);
  673. }
  674. context.Copy(GetVec(op.Rd), res);
  675. }
  676. public static void EmitVectorWidenTernaryOpByElemSx(ArmEmitterContext context, Func3I emit)
  677. {
  678. EmitVectorWidenTernaryOpByElem(context, emit, signed: true);
  679. }
  680. public static void EmitVectorWidenTernaryOpByElemZx(ArmEmitterContext context, Func3I emit)
  681. {
  682. EmitVectorWidenTernaryOpByElem(context, emit, signed: false);
  683. }
  684. private static void EmitVectorWidenTernaryOpByElem(ArmEmitterContext context, Func3I emit, bool signed)
  685. {
  686. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  687. Operand res = context.VectorZero();
  688. Operand me = EmitVectorExtract(context, op.Rm, op.Index, op.Size, signed);
  689. int elems = 8 >> op.Size;
  690. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  691. for (int index = 0; index < elems; index++)
  692. {
  693. Operand de = EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  694. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  695. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size + 1);
  696. }
  697. context.Copy(GetVec(op.Rd), res);
  698. }
  699. public static void EmitVectorPairwiseOpSx(ArmEmitterContext context, Func2I emit)
  700. {
  701. EmitVectorPairwiseOp(context, emit, signed: true);
  702. }
  703. public static void EmitVectorPairwiseOpZx(ArmEmitterContext context, Func2I emit)
  704. {
  705. EmitVectorPairwiseOp(context, emit, signed: false);
  706. }
  707. private static void EmitVectorPairwiseOp(ArmEmitterContext context, Func2I emit, bool signed)
  708. {
  709. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  710. Operand res = context.VectorZero();
  711. int pairs = op.GetPairsCount() >> op.Size;
  712. for (int index = 0; index < pairs; index++)
  713. {
  714. int pairIndex = index << 1;
  715. Operand n0 = EmitVectorExtract(context, op.Rn, pairIndex, op.Size, signed);
  716. Operand n1 = EmitVectorExtract(context, op.Rn, pairIndex + 1, op.Size, signed);
  717. Operand m0 = EmitVectorExtract(context, op.Rm, pairIndex, op.Size, signed);
  718. Operand m1 = EmitVectorExtract(context, op.Rm, pairIndex + 1, op.Size, signed);
  719. res = EmitVectorInsert(context, res, emit(n0, n1), index, op.Size);
  720. res = EmitVectorInsert(context, res, emit(m0, m1), pairs + index, op.Size);
  721. }
  722. context.Copy(GetVec(op.Rd), res);
  723. }
  724. public static void EmitSsse3VectorPairwiseOp(ArmEmitterContext context, Intrinsic[] inst)
  725. {
  726. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  727. Operand n = GetVec(op.Rn);
  728. Operand m = GetVec(op.Rm);
  729. if (op.RegisterSize == RegisterSize.Simd64)
  730. {
  731. Operand zeroEvenMask = X86GetElements(context, ZeroMask, EvenMasks[op.Size]);
  732. Operand zeroOddMask = X86GetElements(context, ZeroMask, OddMasks [op.Size]);
  733. Operand mN = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, n, m); // m:n
  734. Operand left = context.AddIntrinsic(Intrinsic.X86Pshufb, mN, zeroEvenMask); // 0:even from m:n
  735. Operand right = context.AddIntrinsic(Intrinsic.X86Pshufb, mN, zeroOddMask); // 0:odd from m:n
  736. context.Copy(GetVec(op.Rd), context.AddIntrinsic(inst[op.Size], left, right));
  737. }
  738. else if (op.Size < 3)
  739. {
  740. Operand oddEvenMask = X86GetElements(context, OddMasks[op.Size], EvenMasks[op.Size]);
  741. Operand oddEvenN = context.AddIntrinsic(Intrinsic.X86Pshufb, n, oddEvenMask); // odd:even from n
  742. Operand oddEvenM = context.AddIntrinsic(Intrinsic.X86Pshufb, m, oddEvenMask); // odd:even from m
  743. Operand left = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, oddEvenN, oddEvenM);
  744. Operand right = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, oddEvenN, oddEvenM);
  745. context.Copy(GetVec(op.Rd), context.AddIntrinsic(inst[op.Size], left, right));
  746. }
  747. else
  748. {
  749. Operand left = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, n, m);
  750. Operand right = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, n, m);
  751. context.Copy(GetVec(op.Rd), context.AddIntrinsic(inst[3], left, right));
  752. }
  753. }
  754. public static void EmitVectorAcrossVectorOpSx(ArmEmitterContext context, Func2I emit)
  755. {
  756. EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: false);
  757. }
  758. public static void EmitVectorAcrossVectorOpZx(ArmEmitterContext context, Func2I emit)
  759. {
  760. EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: false);
  761. }
  762. public static void EmitVectorLongAcrossVectorOpSx(ArmEmitterContext context, Func2I emit)
  763. {
  764. EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: true);
  765. }
  766. public static void EmitVectorLongAcrossVectorOpZx(ArmEmitterContext context, Func2I emit)
  767. {
  768. EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: true);
  769. }
  770. private static void EmitVectorAcrossVectorOp(
  771. ArmEmitterContext context,
  772. Func2I emit,
  773. bool signed,
  774. bool isLong)
  775. {
  776. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  777. int elems = op.GetBytesCount() >> op.Size;
  778. Operand res = EmitVectorExtract(context, op.Rn, 0, op.Size, signed);
  779. for (int index = 1; index < elems; index++)
  780. {
  781. Operand n = EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  782. res = emit(res, n);
  783. }
  784. int size = isLong ? op.Size + 1 : op.Size;
  785. Operand d = EmitVectorInsert(context, context.VectorZero(), res, 0, size);
  786. context.Copy(GetVec(op.Rd), d);
  787. }
  788. public static void EmitVectorAcrossVectorOpF(ArmEmitterContext context, Func2I emit)
  789. {
  790. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  791. Debug.Assert((op.Size & 1) == 0 && op.RegisterSize == RegisterSize.Simd128);
  792. Operand res = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), 0);
  793. for (int index = 1; index < 4; index++)
  794. {
  795. Operand n = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), index);
  796. res = emit(res, n);
  797. }
  798. Operand d = context.VectorInsert(context.VectorZero(), res, 0);
  799. context.Copy(GetVec(op.Rd), d);
  800. }
  801. public static void EmitSse2VectorAcrossVectorOpF(ArmEmitterContext context, Func2I emit)
  802. {
  803. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  804. Debug.Assert((op.Size & 1) == 0 && op.RegisterSize == RegisterSize.Simd128);
  805. const int sm0 = 0 << 6 | 0 << 4 | 0 << 2 | 0 << 0;
  806. const int sm1 = 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0;
  807. const int sm2 = 2 << 6 | 2 << 4 | 2 << 2 | 2 << 0;
  808. const int sm3 = 3 << 6 | 3 << 4 | 3 << 2 | 3 << 0;
  809. Operand nCopy = context.Copy(GetVec(op.Rn));
  810. Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm0));
  811. Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm1));
  812. Operand part2 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm2));
  813. Operand part3 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm3));
  814. Operand res = emit(emit(part0, part1), emit(part2, part3));
  815. context.Copy(GetVec(op.Rd), context.VectorZeroUpper96(res));
  816. }
  817. public static void EmitScalarPairwiseOpF(ArmEmitterContext context, Func2I emit)
  818. {
  819. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  820. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  821. Operand ne0 = context.VectorExtract(type, GetVec(op.Rn), 0);
  822. Operand ne1 = context.VectorExtract(type, GetVec(op.Rn), 1);
  823. Operand res = context.VectorInsert(context.VectorZero(), emit(ne0, ne1), 0);
  824. context.Copy(GetVec(op.Rd), res);
  825. }
  826. public static void EmitSse2ScalarPairwiseOpF(ArmEmitterContext context, Func2I emit)
  827. {
  828. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  829. Operand n = GetVec(op.Rn);
  830. Operand op0, op1;
  831. if ((op.Size & 1) == 0)
  832. {
  833. const int sm0 = 2 << 6 | 2 << 4 | 2 << 2 | 0 << 0;
  834. const int sm1 = 2 << 6 | 2 << 4 | 2 << 2 | 1 << 0;
  835. Operand zeroN = context.VectorZeroUpper64(n);
  836. op0 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm0));
  837. op1 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm1));
  838. }
  839. else /* if ((op.Size & 1) == 1) */
  840. {
  841. Operand zero = context.VectorZero();
  842. op0 = context.AddIntrinsic(Intrinsic.X86Movlhps, n, zero);
  843. op1 = context.AddIntrinsic(Intrinsic.X86Movhlps, zero, n);
  844. }
  845. context.Copy(GetVec(op.Rd), emit(op0, op1));
  846. }
  847. public static void EmitVectorPairwiseOpF(ArmEmitterContext context, Func2I emit)
  848. {
  849. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  850. Operand res = context.VectorZero();
  851. int sizeF = op.Size & 1;
  852. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  853. int pairs = op.GetPairsCount() >> sizeF + 2;
  854. for (int index = 0; index < pairs; index++)
  855. {
  856. int pairIndex = index << 1;
  857. Operand n0 = context.VectorExtract(type, GetVec(op.Rn), pairIndex);
  858. Operand n1 = context.VectorExtract(type, GetVec(op.Rn), pairIndex + 1);
  859. Operand m0 = context.VectorExtract(type, GetVec(op.Rm), pairIndex);
  860. Operand m1 = context.VectorExtract(type, GetVec(op.Rm), pairIndex + 1);
  861. res = context.VectorInsert(res, emit(n0, n1), index);
  862. res = context.VectorInsert(res, emit(m0, m1), pairs + index);
  863. }
  864. context.Copy(GetVec(op.Rd), res);
  865. }
  866. public static void EmitSse2VectorPairwiseOpF(ArmEmitterContext context, Func2I emit)
  867. {
  868. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  869. Operand nCopy = context.Copy(GetVec(op.Rn));
  870. Operand mCopy = context.Copy(GetVec(op.Rm));
  871. int sizeF = op.Size & 1;
  872. if (sizeF == 0)
  873. {
  874. if (op.RegisterSize == RegisterSize.Simd64)
  875. {
  876. Operand unpck = context.AddIntrinsic(Intrinsic.X86Unpcklps, nCopy, mCopy);
  877. Operand zero = context.VectorZero();
  878. Operand part0 = context.AddIntrinsic(Intrinsic.X86Movlhps, unpck, zero);
  879. Operand part1 = context.AddIntrinsic(Intrinsic.X86Movhlps, zero, unpck);
  880. context.Copy(GetVec(op.Rd), emit(part0, part1));
  881. }
  882. else /* if (op.RegisterSize == RegisterSize.Simd128) */
  883. {
  884. const int sm0 = 2 << 6 | 0 << 4 | 2 << 2 | 0 << 0;
  885. const int sm1 = 3 << 6 | 1 << 4 | 3 << 2 | 1 << 0;
  886. Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm0));
  887. Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm1));
  888. context.Copy(GetVec(op.Rd), emit(part0, part1));
  889. }
  890. }
  891. else /* if (sizeF == 1) */
  892. {
  893. Operand part0 = context.AddIntrinsic(Intrinsic.X86Unpcklpd, nCopy, mCopy);
  894. Operand part1 = context.AddIntrinsic(Intrinsic.X86Unpckhpd, nCopy, mCopy);
  895. context.Copy(GetVec(op.Rd), emit(part0, part1));
  896. }
  897. }
  898. [Flags]
  899. public enum Mxcsr
  900. {
  901. Ftz = 1 << 15, // Flush To Zero.
  902. Um = 1 << 11, // Underflow Mask.
  903. Dm = 1 << 8, // Denormal Mask.
  904. Daz = 1 << 6 // Denormals Are Zero.
  905. }
  906. public static void EmitSseOrAvxEnterFtzAndDazModesOpF(ArmEmitterContext context, out Operand isTrue)
  907. {
  908. isTrue = context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpcrFz)));
  909. Operand lblTrue = Label();
  910. context.BranchIfFalse(lblTrue, isTrue);
  911. context.AddIntrinsicNoRet(Intrinsic.X86Mxcsrmb, Const((int)(Mxcsr.Ftz | Mxcsr.Um | Mxcsr.Dm | Mxcsr.Daz)));
  912. context.MarkLabel(lblTrue);
  913. }
  914. public static void EmitSseOrAvxExitFtzAndDazModesOpF(ArmEmitterContext context, Operand isTrue = null)
  915. {
  916. isTrue ??= context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpcrFz)));
  917. Operand lblTrue = Label();
  918. context.BranchIfFalse(lblTrue, isTrue);
  919. context.AddIntrinsicNoRet(Intrinsic.X86Mxcsrub, Const((int)(Mxcsr.Ftz | Mxcsr.Daz)));
  920. context.MarkLabel(lblTrue);
  921. }
  922. public enum CmpCondition
  923. {
  924. // Legacy Sse.
  925. Equal = 0, // Ordered, non-signaling.
  926. LessThan = 1, // Ordered, signaling.
  927. LessThanOrEqual = 2, // Ordered, signaling.
  928. UnorderedQ = 3, // Non-signaling.
  929. NotLessThan = 5, // Unordered, signaling.
  930. NotLessThanOrEqual = 6, // Unordered, signaling.
  931. OrderedQ = 7, // Non-signaling.
  932. // Vex.
  933. GreaterThanOrEqual = 13, // Ordered, signaling.
  934. GreaterThan = 14, // Ordered, signaling.
  935. OrderedS = 23 // Signaling.
  936. }
  937. [Flags]
  938. public enum SaturatingFlags
  939. {
  940. None = 0,
  941. ByElem = 1 << 0,
  942. Scalar = 1 << 1,
  943. Signed = 1 << 2,
  944. Add = 1 << 3,
  945. Sub = 1 << 4,
  946. Accumulate = 1 << 5
  947. }
  948. public static void EmitScalarSaturatingUnaryOpSx(ArmEmitterContext context, Func1I emit)
  949. {
  950. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.Scalar | SaturatingFlags.Signed);
  951. }
  952. public static void EmitVectorSaturatingUnaryOpSx(ArmEmitterContext context, Func1I emit)
  953. {
  954. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.Signed);
  955. }
  956. public static void EmitSaturatingUnaryOpSx(ArmEmitterContext context, Func1I emit, SaturatingFlags flags)
  957. {
  958. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  959. Operand res = context.VectorZero();
  960. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  961. int elems = !scalar ? op.GetBytesCount() >> op.Size : 1;
  962. for (int index = 0; index < elems; index++)
  963. {
  964. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  965. Operand de;
  966. if (op.Size <= 2)
  967. {
  968. de = EmitSatQ(context, emit(ne), op.Size, signedSrc: true, signedDst: true);
  969. }
  970. else /* if (op.Size == 3) */
  971. {
  972. de = EmitUnarySignedSatQAbsOrNeg(context, emit(ne));
  973. }
  974. res = EmitVectorInsert(context, res, de, index, op.Size);
  975. }
  976. context.Copy(GetVec(op.Rd), res);
  977. }
  978. public static void EmitScalarSaturatingBinaryOpSx(ArmEmitterContext context, Func2I emit = null, SaturatingFlags flags = SaturatingFlags.None)
  979. {
  980. EmitSaturatingBinaryOp(context, emit, SaturatingFlags.Scalar | SaturatingFlags.Signed | flags);
  981. }
  982. public static void EmitScalarSaturatingBinaryOpZx(ArmEmitterContext context, SaturatingFlags flags)
  983. {
  984. EmitSaturatingBinaryOp(context, null, SaturatingFlags.Scalar | flags);
  985. }
  986. public static void EmitVectorSaturatingBinaryOpSx(ArmEmitterContext context, Func2I emit = null, SaturatingFlags flags = SaturatingFlags.None)
  987. {
  988. EmitSaturatingBinaryOp(context, emit, SaturatingFlags.Signed | flags);
  989. }
  990. public static void EmitVectorSaturatingBinaryOpZx(ArmEmitterContext context, SaturatingFlags flags)
  991. {
  992. EmitSaturatingBinaryOp(context, null, flags);
  993. }
  994. public static void EmitVectorSaturatingBinaryOpByElemSx(ArmEmitterContext context, Func2I emit)
  995. {
  996. EmitSaturatingBinaryOp(context, emit, SaturatingFlags.ByElem | SaturatingFlags.Signed);
  997. }
  998. public static void EmitSaturatingBinaryOp(ArmEmitterContext context, Func2I emit, SaturatingFlags flags)
  999. {
  1000. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  1001. Operand res = context.VectorZero();
  1002. bool byElem = (flags & SaturatingFlags.ByElem) != 0;
  1003. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  1004. bool signed = (flags & SaturatingFlags.Signed) != 0;
  1005. bool add = (flags & SaturatingFlags.Add) != 0;
  1006. bool sub = (flags & SaturatingFlags.Sub) != 0;
  1007. bool accumulate = (flags & SaturatingFlags.Accumulate) != 0;
  1008. int elems = !scalar ? op.GetBytesCount() >> op.Size : 1;
  1009. if (add || sub)
  1010. {
  1011. for (int index = 0; index < elems; index++)
  1012. {
  1013. Operand de;
  1014. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  1015. Operand me = EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, index, op.Size, signed);
  1016. if (op.Size <= 2)
  1017. {
  1018. Operand temp = add ? context.Add(ne, me) : context.Subtract(ne, me);
  1019. de = EmitSatQ(context, temp, op.Size, signedSrc: true, signedDst: signed);
  1020. }
  1021. else if (add) /* if (op.Size == 3) */
  1022. {
  1023. de = EmitBinarySatQAdd(context, ne, me, signed);
  1024. }
  1025. else /* if (sub) */
  1026. {
  1027. de = EmitBinarySatQSub(context, ne, me, signed);
  1028. }
  1029. res = EmitVectorInsert(context, res, de, index, op.Size);
  1030. }
  1031. }
  1032. else if (accumulate)
  1033. {
  1034. for (int index = 0; index < elems; index++)
  1035. {
  1036. Operand de;
  1037. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size, !signed);
  1038. Operand me = EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  1039. if (op.Size <= 2)
  1040. {
  1041. Operand temp = context.Add(ne, me);
  1042. de = EmitSatQ(context, temp, op.Size, signedSrc: true, signedDst: signed);
  1043. }
  1044. else /* if (op.Size == 3) */
  1045. {
  1046. de = EmitBinarySatQAccumulate(context, ne, me, signed);
  1047. }
  1048. res = EmitVectorInsert(context, res, de, index, op.Size);
  1049. }
  1050. }
  1051. else
  1052. {
  1053. Operand me = null;
  1054. if (byElem)
  1055. {
  1056. OpCodeSimdRegElem opRegElem = (OpCodeSimdRegElem)op;
  1057. me = EmitVectorExtract(context, opRegElem.Rm, opRegElem.Index, op.Size, signed);
  1058. }
  1059. for (int index = 0; index < elems; index++)
  1060. {
  1061. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  1062. if (!byElem)
  1063. {
  1064. me = EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, index, op.Size, signed);
  1065. }
  1066. Operand de = EmitSatQ(context, emit(ne, me), op.Size, true, signed);
  1067. res = EmitVectorInsert(context, res, de, index, op.Size);
  1068. }
  1069. }
  1070. context.Copy(GetVec(op.Rd), res);
  1071. }
  1072. [Flags]
  1073. public enum SaturatingNarrowFlags
  1074. {
  1075. Scalar = 1 << 0,
  1076. SignedSrc = 1 << 1,
  1077. SignedDst = 1 << 2,
  1078. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  1079. ScalarSxZx = Scalar | SignedSrc,
  1080. ScalarZxZx = Scalar,
  1081. VectorSxSx = SignedSrc | SignedDst,
  1082. VectorSxZx = SignedSrc,
  1083. VectorZxZx = 0
  1084. }
  1085. public static void EmitSaturatingNarrowOp(ArmEmitterContext context, SaturatingNarrowFlags flags)
  1086. {
  1087. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  1088. bool scalar = (flags & SaturatingNarrowFlags.Scalar) != 0;
  1089. bool signedSrc = (flags & SaturatingNarrowFlags.SignedSrc) != 0;
  1090. bool signedDst = (flags & SaturatingNarrowFlags.SignedDst) != 0;
  1091. int elems = !scalar ? 8 >> op.Size : 1;
  1092. int part = !scalar && (op.RegisterSize == RegisterSize.Simd128) ? elems : 0;
  1093. Operand d = GetVec(op.Rd);
  1094. Operand res = part == 0 ? context.VectorZero() : context.Copy(d);
  1095. for (int index = 0; index < elems; index++)
  1096. {
  1097. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size + 1, signedSrc);
  1098. Operand temp = EmitSatQ(context, ne, op.Size, signedSrc, signedDst);
  1099. res = EmitVectorInsert(context, res, temp, part + index, op.Size);
  1100. }
  1101. context.Copy(d, res);
  1102. }
  1103. // TSrc (16bit, 32bit, 64bit; signed, unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  1104. public static Operand EmitSatQ(ArmEmitterContext context, Operand op, int sizeDst, bool signedSrc, bool signedDst)
  1105. {
  1106. if ((uint)sizeDst > 2u)
  1107. {
  1108. throw new ArgumentOutOfRangeException(nameof(sizeDst));
  1109. }
  1110. MethodInfo info;
  1111. if (signedSrc)
  1112. {
  1113. info = signedDst
  1114. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SignedSrcSignedDstSatQ))
  1115. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.SignedSrcUnsignedDstSatQ));
  1116. }
  1117. else
  1118. {
  1119. info = signedDst
  1120. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.UnsignedSrcSignedDstSatQ))
  1121. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.UnsignedSrcUnsignedDstSatQ));
  1122. }
  1123. return context.Call(info, op, Const(sizeDst));
  1124. }
  1125. // TSrc (64bit) == TDst (64bit); signed.
  1126. public static Operand EmitUnarySignedSatQAbsOrNeg(ArmEmitterContext context, Operand op)
  1127. {
  1128. Debug.Assert(((OpCodeSimd)context.CurrOp).Size == 3, "Invalid element size.");
  1129. return context.Call(typeof(SoftFallback).GetMethod(nameof(SoftFallback.UnarySignedSatQAbsOrNeg)), op);
  1130. }
  1131. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  1132. public static Operand EmitBinarySatQAdd(ArmEmitterContext context, Operand op1, Operand op2, bool signed)
  1133. {
  1134. Debug.Assert(((OpCodeSimd)context.CurrOp).Size == 3, "Invalid element size.");
  1135. MethodInfo info = signed
  1136. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.BinarySignedSatQAdd))
  1137. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.BinaryUnsignedSatQAdd));
  1138. return context.Call(info, op1, op2);
  1139. }
  1140. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  1141. public static Operand EmitBinarySatQSub(ArmEmitterContext context, Operand op1, Operand op2, bool signed)
  1142. {
  1143. Debug.Assert(((OpCodeSimd)context.CurrOp).Size == 3, "Invalid element size.");
  1144. MethodInfo info = signed
  1145. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.BinarySignedSatQSub))
  1146. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.BinaryUnsignedSatQSub));
  1147. return context.Call(info, op1, op2);
  1148. }
  1149. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  1150. public static Operand EmitBinarySatQAccumulate(ArmEmitterContext context, Operand op1, Operand op2, bool signed)
  1151. {
  1152. Debug.Assert(((OpCodeSimd)context.CurrOp).Size == 3, "Invalid element size.");
  1153. MethodInfo info = signed
  1154. ? typeof(SoftFallback).GetMethod(nameof(SoftFallback.BinarySignedSatQAcc))
  1155. : typeof(SoftFallback).GetMethod(nameof(SoftFallback.BinaryUnsignedSatQAcc));
  1156. return context.Call(info, op1, op2);
  1157. }
  1158. public static Operand EmitFloatAbs(ArmEmitterContext context, Operand value, bool single, bool vector)
  1159. {
  1160. Operand mask;
  1161. if (single)
  1162. {
  1163. mask = vector ? X86GetAllElements(context, -0f) : X86GetScalar(context, -0f);
  1164. }
  1165. else
  1166. {
  1167. mask = vector ? X86GetAllElements(context, -0d) : X86GetScalar(context, -0d);
  1168. }
  1169. return context.AddIntrinsic(single ? Intrinsic.X86Andnps : Intrinsic.X86Andnpd, mask, value);
  1170. }
  1171. public static Operand EmitVectorExtractSx(ArmEmitterContext context, int reg, int index, int size)
  1172. {
  1173. return EmitVectorExtract(context, reg, index, size, true);
  1174. }
  1175. public static Operand EmitVectorExtractZx(ArmEmitterContext context, int reg, int index, int size)
  1176. {
  1177. return EmitVectorExtract(context, reg, index, size, false);
  1178. }
  1179. public static Operand EmitVectorExtract(ArmEmitterContext context, int reg, int index, int size, bool signed)
  1180. {
  1181. ThrowIfInvalid(index, size);
  1182. Operand res = null;
  1183. switch (size)
  1184. {
  1185. case 0:
  1186. res = context.VectorExtract8(GetVec(reg), index);
  1187. break;
  1188. case 1:
  1189. res = context.VectorExtract16(GetVec(reg), index);
  1190. break;
  1191. case 2:
  1192. res = context.VectorExtract(OperandType.I32, GetVec(reg), index);
  1193. break;
  1194. case 3:
  1195. res = context.VectorExtract(OperandType.I64, GetVec(reg), index);
  1196. break;
  1197. }
  1198. if (signed)
  1199. {
  1200. switch (size)
  1201. {
  1202. case 0: res = context.SignExtend8 (OperandType.I64, res); break;
  1203. case 1: res = context.SignExtend16(OperandType.I64, res); break;
  1204. case 2: res = context.SignExtend32(OperandType.I64, res); break;
  1205. }
  1206. }
  1207. else
  1208. {
  1209. switch (size)
  1210. {
  1211. case 0: res = context.ZeroExtend8 (OperandType.I64, res); break;
  1212. case 1: res = context.ZeroExtend16(OperandType.I64, res); break;
  1213. case 2: res = context.ZeroExtend32(OperandType.I64, res); break;
  1214. }
  1215. }
  1216. return res;
  1217. }
  1218. public static Operand EmitVectorInsert(ArmEmitterContext context, Operand vector, Operand value, int index, int size)
  1219. {
  1220. ThrowIfInvalid(index, size);
  1221. if (size < 3 && value.Type == OperandType.I64)
  1222. {
  1223. value = context.ConvertI64ToI32(value);
  1224. }
  1225. switch (size)
  1226. {
  1227. case 0: vector = context.VectorInsert8 (vector, value, index); break;
  1228. case 1: vector = context.VectorInsert16(vector, value, index); break;
  1229. case 2: vector = context.VectorInsert (vector, value, index); break;
  1230. case 3: vector = context.VectorInsert (vector, value, index); break;
  1231. }
  1232. return vector;
  1233. }
  1234. public static void ThrowIfInvalid(int index, int size)
  1235. {
  1236. if ((uint)size > 3u)
  1237. {
  1238. throw new ArgumentOutOfRangeException(nameof(size));
  1239. }
  1240. if ((uint)index >= 16u >> size)
  1241. {
  1242. throw new ArgumentOutOfRangeException(nameof(index));
  1243. }
  1244. }
  1245. }
  1246. }