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CpuTest.cs
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567ea726e1
Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)
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5 anni fa |
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CpuTest32.cs
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863edae328
shader cache: Fix Linux boot issues (#1709)
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5 anni fa |
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CpuTestAlu.cs
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d87c5375f1
Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
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6 anni fa |
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CpuTestAlu32.cs
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fb0939f9b6
Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
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6 anni fa |
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CpuTestAluBinary.cs
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d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
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5 anni fa |
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CpuTestAluBinary32.cs
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d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
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5 anni fa |
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CpuTestAluImm.cs
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
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CpuTestAluRs.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestAluRs32.cs
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b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
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6 anni fa |
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CpuTestAluRx.cs
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
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CpuTestBf32.cs
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b1b6f294f2
Add most of the A32 instruction set to ARMeilleure (#897)
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6 anni fa |
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CpuTestBfm.cs
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
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CpuTestCcmpImm.cs
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
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CpuTestCcmpReg.cs
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
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CpuTestCsel.cs
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
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CpuTestMisc.cs
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a804db6eed
Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)
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5 anni fa |
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CpuTestMisc32.cs
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e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
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5 anni fa |
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CpuTestMov.cs
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d87c5375f1
Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
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6 anni fa |
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CpuTestMul.cs
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1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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7 anni fa |
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CpuTestMul32.cs
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fb0939f9b6
Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
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6 anni fa |
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CpuTestSimd.cs
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c3e0c41da3
CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894)
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5 anni fa |
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CpuTestSimd32.cs
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56a61a5758
CPU: A32: Fix Vabs_V & Vneg_V (S8, S16, S32 & F32); add Tests. (#1394)
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5 anni fa |
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CpuTestSimdCrypto.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdCrypto32.cs
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dd433c1296
Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
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6 anni fa |
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CpuTestSimdCvt.cs
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0915731a9d
Implemented fast paths for: (#846)
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6 anni fa |
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CpuTestSimdCvt32.cs
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8a33e884f8
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)
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5 anni fa |
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CpuTestSimdExt.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdFcond.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdFmov.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdImm.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdIns.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdLogical32.cs
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3af2ce74ec
Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)
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5 anni fa |
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CpuTestSimdMemory32.cs
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e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
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5 anni fa |
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CpuTestSimdMov32.cs
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9a49f8aec9
Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303)
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5 anni fa |
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CpuTestSimdReg.cs
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430ba6da65
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)
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5 anni fa |
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CpuTestSimdReg32.cs
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430ba6da65
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)
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5 anni fa |
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CpuTestSimdRegElem.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdRegElem32.cs
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c26f3774bd
Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
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6 anni fa |
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CpuTestSimdRegElemF.cs
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a731ab3a2a
Add a new JIT compiler for CPU code (#693)
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6 anni fa |
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CpuTestSimdShImm.cs
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2cb8bd7006
CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492)
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5 anni fa |
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CpuTestSimdShImm32.cs
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e36e97c64d
CPU: This PR fixes Fpscr, among other things. (#1433)
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5 anni fa |
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CpuTestSimdTbl.cs
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16869402bf
Add Tbx Inst. (fast & slow paths), with Tests. (#782)
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6 anni fa |
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CpuTestSystem.cs
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7c111a3567
Add Mrs & Msr (Nzcv) Inst., with Tests. (#819)
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6 anni fa |
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