Translator.cs 9.3 KB

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  1. using Ryujinx.Graphics.Shader.CodeGen.Glsl;
  2. using Ryujinx.Graphics.Shader.Decoders;
  3. using Ryujinx.Graphics.Shader.IntermediateRepresentation;
  4. using Ryujinx.Graphics.Shader.StructuredIr;
  5. using Ryujinx.Graphics.Shader.Translation.Optimizations;
  6. using System;
  7. using System.Collections.Generic;
  8. using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
  9. namespace Ryujinx.Graphics.Shader.Translation
  10. {
  11. public static class Translator
  12. {
  13. private const int HeaderSize = 0x50;
  14. internal struct FunctionCode
  15. {
  16. public Operation[] Code { get; }
  17. public FunctionCode(Operation[] code)
  18. {
  19. Code = code;
  20. }
  21. }
  22. public static TranslatorContext CreateContext(
  23. ulong address,
  24. IGpuAccessor gpuAccessor,
  25. TranslationOptions options,
  26. TranslationCounts counts = null)
  27. {
  28. counts ??= new TranslationCounts();
  29. Block[][] cfg = DecodeShader(address, gpuAccessor, options, counts, out ShaderConfig config);
  30. return new TranslatorContext(address, cfg, config);
  31. }
  32. internal static ShaderProgram Translate(FunctionCode[] functions, ShaderConfig config, out ShaderProgramInfo shaderProgramInfo)
  33. {
  34. var cfgs = new ControlFlowGraph[functions.Length];
  35. var frus = new RegisterUsage.FunctionRegisterUsage[functions.Length];
  36. for (int i = 0; i < functions.Length; i++)
  37. {
  38. cfgs[i] = ControlFlowGraph.Create(functions[i].Code);
  39. if (i != 0)
  40. {
  41. frus[i] = RegisterUsage.RunPass(cfgs[i]);
  42. }
  43. }
  44. Function[] funcs = new Function[functions.Length];
  45. for (int i = 0; i < functions.Length; i++)
  46. {
  47. var cfg = cfgs[i];
  48. int inArgumentsCount = 0;
  49. int outArgumentsCount = 0;
  50. if (i != 0)
  51. {
  52. var fru = frus[i];
  53. inArgumentsCount = fru.InArguments.Length;
  54. outArgumentsCount = fru.OutArguments.Length;
  55. }
  56. if (cfg.Blocks.Length != 0)
  57. {
  58. RegisterUsage.FixupCalls(cfg.Blocks, frus);
  59. Dominance.FindDominators(cfg);
  60. Dominance.FindDominanceFrontiers(cfg.Blocks);
  61. Ssa.Rename(cfg.Blocks);
  62. Optimizer.RunPass(cfg.Blocks, config);
  63. Rewriter.RunPass(cfg.Blocks, config);
  64. }
  65. funcs[i] = new Function(cfg.Blocks, $"fun{i}", false, inArgumentsCount, outArgumentsCount);
  66. }
  67. StructuredProgramInfo sInfo = StructuredProgram.MakeStructuredProgram(funcs, config);
  68. ShaderProgram program;
  69. switch (config.Options.TargetLanguage)
  70. {
  71. case TargetLanguage.Glsl:
  72. program = new ShaderProgram(config.Stage, GlslGenerator.Generate(sInfo, config));
  73. break;
  74. default:
  75. throw new NotImplementedException(config.Options.TargetLanguage.ToString());
  76. }
  77. shaderProgramInfo = new ShaderProgramInfo(
  78. config.GetConstantBufferDescriptors(),
  79. config.GetStorageBufferDescriptors(),
  80. config.GetTextureDescriptors(),
  81. config.GetImageDescriptors(),
  82. config.UsedFeatures.HasFlag(FeatureFlags.InstanceId),
  83. config.ClipDistancesWritten);
  84. return program;
  85. }
  86. private static Block[][] DecodeShader(
  87. ulong address,
  88. IGpuAccessor gpuAccessor,
  89. TranslationOptions options,
  90. TranslationCounts counts,
  91. out ShaderConfig config)
  92. {
  93. Block[][] cfg;
  94. ulong maxEndAddress = 0;
  95. bool hasBindless;
  96. if ((options.Flags & TranslationFlags.Compute) != 0)
  97. {
  98. config = new ShaderConfig(gpuAccessor, options, counts);
  99. cfg = Decoder.Decode(gpuAccessor, address, out hasBindless);
  100. }
  101. else
  102. {
  103. config = new ShaderConfig(new ShaderHeader(gpuAccessor, address), gpuAccessor, options, counts);
  104. cfg = Decoder.Decode(gpuAccessor, address + HeaderSize, out hasBindless);
  105. }
  106. if (hasBindless)
  107. {
  108. config.SetUsedFeature(FeatureFlags.Bindless);
  109. }
  110. for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
  111. {
  112. for (int blkIndex = 0; blkIndex < cfg[funcIndex].Length; blkIndex++)
  113. {
  114. Block block = cfg[funcIndex][blkIndex];
  115. if (maxEndAddress < block.EndAddress)
  116. {
  117. maxEndAddress = block.EndAddress;
  118. }
  119. if (!hasBindless)
  120. {
  121. for (int index = 0; index < block.OpCodes.Count; index++)
  122. {
  123. if (block.OpCodes[index] is OpCodeTextureBase texture)
  124. {
  125. config.TextureHandlesForCache.Add(texture.HandleOffset);
  126. }
  127. }
  128. }
  129. }
  130. }
  131. config.SizeAdd((int)maxEndAddress + (options.Flags.HasFlag(TranslationFlags.Compute) ? 0 : HeaderSize));
  132. return cfg;
  133. }
  134. internal static FunctionCode[] EmitShader(Block[][] cfg, ShaderConfig config)
  135. {
  136. Dictionary<ulong, int> funcIds = new Dictionary<ulong, int>();
  137. for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
  138. {
  139. funcIds.Add(cfg[funcIndex][0].Address, funcIndex);
  140. }
  141. List<FunctionCode> funcs = new List<FunctionCode>();
  142. for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
  143. {
  144. EmitterContext context = new EmitterContext(config, funcIndex != 0, funcIds);
  145. for (int blkIndex = 0; blkIndex < cfg[funcIndex].Length; blkIndex++)
  146. {
  147. Block block = cfg[funcIndex][blkIndex];
  148. context.CurrBlock = block;
  149. context.MarkLabel(context.GetLabel(block.Address));
  150. EmitOps(context, block);
  151. }
  152. funcs.Add(new FunctionCode(context.GetOperations()));
  153. }
  154. return funcs.ToArray();
  155. }
  156. private static void EmitOps(EmitterContext context, Block block)
  157. {
  158. for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++)
  159. {
  160. OpCode op = block.OpCodes[opIndex];
  161. if ((context.Config.Options.Flags & TranslationFlags.DebugMode) != 0)
  162. {
  163. string instName;
  164. if (op.Emitter != null)
  165. {
  166. instName = op.Emitter.Method.Name;
  167. }
  168. else
  169. {
  170. instName = "???";
  171. context.Config.GpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16}).");
  172. }
  173. string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
  174. context.Add(new CommentNode(dbgComment));
  175. }
  176. if (op.NeverExecute)
  177. {
  178. continue;
  179. }
  180. Operand predSkipLbl = null;
  181. bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget;
  182. if (op is OpCodeBranchPop opBranchPop)
  183. {
  184. // If the instruction is a SYNC or BRK instruction with only one
  185. // possible target address, then the instruction is basically
  186. // just a simple branch, we can generate code similar to branch
  187. // instructions, with the condition check on the branch itself.
  188. skipPredicateCheck = opBranchPop.Targets.Count < 2;
  189. }
  190. if (!(op.Predicate.IsPT || skipPredicateCheck))
  191. {
  192. Operand label;
  193. if (opIndex == block.OpCodes.Count - 1 && block.Next != null)
  194. {
  195. label = context.GetLabel(block.Next.Address);
  196. }
  197. else
  198. {
  199. label = Label();
  200. predSkipLbl = label;
  201. }
  202. Operand pred = Register(op.Predicate);
  203. if (op.InvertPredicate)
  204. {
  205. context.BranchIfTrue(label, pred);
  206. }
  207. else
  208. {
  209. context.BranchIfFalse(label, pred);
  210. }
  211. }
  212. context.CurrOp = op;
  213. op.Emitter?.Invoke(context);
  214. if (predSkipLbl != null)
  215. {
  216. context.MarkLabel(predSkipLbl);
  217. }
  218. }
  219. }
  220. }
  221. }