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CryptoHelper.cs
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8f7fcede7f
Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)
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há 7 anos atrás |
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Inst.cs
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36b9ab0e48
Add ARM32 support on the translator (#561)
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há 7 anos atrás |
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InstEmit32Helper.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitAlu.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitAlu32.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitAluHelper.cs
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c1bdf19061
Implement some ARM32 memory instructions and CMP (#565)
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há 7 anos atrás |
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InstEmitBfm.cs
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ef3f9a2abe
Optmize BFM instruction (#607)
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há 7 anos atrás |
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InstEmitCcmp.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitCsel.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitException.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitFlow.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitFlow32.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitFlowHelper.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitHash.cs
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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há 7 anos atrás |
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InstEmitMemory.cs
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5001f78b1d
Optimize address translation and write tracking on the MMU (#571)
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há 7 anos atrás |
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InstEmitMemory32.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitMemoryEx.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitMemoryHelper.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitMove.cs
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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há 7 anos atrás |
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InstEmitMul.cs
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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há 7 anos atrás |
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InstEmitSimdArithmetic.cs
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51ea6fa583
Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)
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há 6 anos atrás |
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InstEmitSimdCmp.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitSimdCrypto.cs
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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há 7 anos atrás |
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InstEmitSimdCvt.cs
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ffbfbb5549
Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692)
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há 6 anos atrás |
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InstEmitSimdHash.cs
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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há 7 anos atrás |
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InstEmitSimdHelper.cs
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51ea6fa583
Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)
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há 6 anos atrás |
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InstEmitSimdLogical.cs
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464ec7ced8
Add Cmeq_V, Cmge_V, Cmgt_V, Cmle_V & Cmlt_V (Z & ~Z) Sse opt.. (#646)
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há 7 anos atrás |
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InstEmitSimdMemory.cs
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5001f78b1d
Optimize address translation and write tracking on the MMU (#571)
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há 7 anos atrás |
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InstEmitSimdMove.cs
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8a7d99cdea
Refactoring and optimization on CPU translation (#661)
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há 7 anos atrás |
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InstEmitSimdShift.cs
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1bef70c068
Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)
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há 7 anos atrás |
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InstEmitSystem.cs
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5001f78b1d
Optimize address translation and write tracking on the MMU (#571)
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há 7 anos atrás |
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InstEmitter.cs
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9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
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há 7 anos atrás |
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SoftFallback.cs
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8f7fcede7f
Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)
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há 7 anos atrás |
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SoftFloat.cs
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8f7fcede7f
Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)
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há 7 anos atrás |
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VectorHelper.cs
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16de171c44
Sse optimized the Scalar & Vector fp-to-fp conversion instructions (MNPZ & IX); added the related Tests (AMNPZ & IX). Small refactoring of existing instructions. (#676)
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há 7 anos atrás |
LDj3SNuD
ffbfbb5549
Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692)