OpCode32SimdDupGP.cs 1.3 KB

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  1. namespace ARMeilleure.Decoders
  2. {
  3. class OpCode32SimdDupGP : OpCode32, IOpCode32Simd
  4. {
  5. public int Size { get; }
  6. public int Vd { get; }
  7. public int Rt { get; }
  8. public bool Q { get; }
  9. public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdDupGP(inst, address, opCode, false);
  10. public static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdDupGP(inst, address, opCode, true);
  11. public OpCode32SimdDupGP(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode)
  12. {
  13. IsThumb = isThumb;
  14. Size = 2 - (((opCode >> 21) & 0x2) | ((opCode >> 5) & 0x1)); // B:E - 0 for 32, 16 then 8.
  15. if (Size == -1)
  16. {
  17. Instruction = InstDescriptor.Undefined;
  18. return;
  19. }
  20. Q = ((opCode >> 21) & 0x1) != 0;
  21. RegisterSize = Q ? RegisterSize.Simd128 : RegisterSize.Simd64;
  22. Vd = ((opCode >> 3) & 0x10) | ((opCode >> 16) & 0xf);
  23. Rt = ((opCode >> 12) & 0xf);
  24. if (DecoderHelper.VectorArgumentsInvalid(Q, Vd))
  25. {
  26. Instruction = InstDescriptor.Undefined;
  27. }
  28. }
  29. }
  30. }