InstEmitSimdHelper.cs 74 KB

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  1. using ARMeilleure.Decoders;
  2. using ARMeilleure.IntermediateRepresentation;
  3. using ARMeilleure.State;
  4. using ARMeilleure.Translation;
  5. using System;
  6. using System.Diagnostics;
  7. using System.Reflection;
  8. using static ARMeilleure.Instructions.InstEmitHelper;
  9. using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
  10. namespace ARMeilleure.Instructions
  11. {
  12. using Func1I = Func<Operand, Operand>;
  13. using Func2I = Func<Operand, Operand, Operand>;
  14. using Func3I = Func<Operand, Operand, Operand, Operand>;
  15. static class InstEmitSimdHelper
  16. {
  17. #region "Masks"
  18. public static readonly long[] EvenMasks = new long[]
  19. {
  20. 14L << 56 | 12L << 48 | 10L << 40 | 08L << 32 | 06L << 24 | 04L << 16 | 02L << 8 | 00L << 0, // B
  21. 13L << 56 | 12L << 48 | 09L << 40 | 08L << 32 | 05L << 24 | 04L << 16 | 01L << 8 | 00L << 0, // H
  22. 11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 03L << 24 | 02L << 16 | 01L << 8 | 00L << 0 // S
  23. };
  24. public static readonly long[] OddMasks = new long[]
  25. {
  26. 15L << 56 | 13L << 48 | 11L << 40 | 09L << 32 | 07L << 24 | 05L << 16 | 03L << 8 | 01L << 0, // B
  27. 15L << 56 | 14L << 48 | 11L << 40 | 10L << 32 | 07L << 24 | 06L << 16 | 03L << 8 | 02L << 0, // H
  28. 15L << 56 | 14L << 48 | 13L << 40 | 12L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0 // S
  29. };
  30. public static readonly long ZeroMask = 128L << 56 | 128L << 48 | 128L << 40 | 128L << 32 | 128L << 24 | 128L << 16 | 128L << 8 | 128L << 0;
  31. public static ulong X86GetGf2p8LogicalShiftLeft(int shift)
  32. {
  33. ulong identity = (0b00000001UL << 56) | (0b00000010UL << 48) | (0b00000100UL << 40) | (0b00001000UL << 32) |
  34. (0b00010000UL << 24) | (0b00100000UL << 16) | (0b01000000UL << 8) | (0b10000000UL << 0);
  35. return shift >= 0 ? identity >> (shift * 8) : identity << (-shift * 8);
  36. }
  37. #endregion
  38. #region "X86 SSE Intrinsics"
  39. public static readonly Intrinsic[] X86PaddInstruction = new Intrinsic[]
  40. {
  41. Intrinsic.X86Paddb,
  42. Intrinsic.X86Paddw,
  43. Intrinsic.X86Paddd,
  44. Intrinsic.X86Paddq
  45. };
  46. public static readonly Intrinsic[] X86PcmpeqInstruction = new Intrinsic[]
  47. {
  48. Intrinsic.X86Pcmpeqb,
  49. Intrinsic.X86Pcmpeqw,
  50. Intrinsic.X86Pcmpeqd,
  51. Intrinsic.X86Pcmpeqq
  52. };
  53. public static readonly Intrinsic[] X86PcmpgtInstruction = new Intrinsic[]
  54. {
  55. Intrinsic.X86Pcmpgtb,
  56. Intrinsic.X86Pcmpgtw,
  57. Intrinsic.X86Pcmpgtd,
  58. Intrinsic.X86Pcmpgtq
  59. };
  60. public static readonly Intrinsic[] X86PmaxsInstruction = new Intrinsic[]
  61. {
  62. Intrinsic.X86Pmaxsb,
  63. Intrinsic.X86Pmaxsw,
  64. Intrinsic.X86Pmaxsd
  65. };
  66. public static readonly Intrinsic[] X86PmaxuInstruction = new Intrinsic[]
  67. {
  68. Intrinsic.X86Pmaxub,
  69. Intrinsic.X86Pmaxuw,
  70. Intrinsic.X86Pmaxud
  71. };
  72. public static readonly Intrinsic[] X86PminsInstruction = new Intrinsic[]
  73. {
  74. Intrinsic.X86Pminsb,
  75. Intrinsic.X86Pminsw,
  76. Intrinsic.X86Pminsd
  77. };
  78. public static readonly Intrinsic[] X86PminuInstruction = new Intrinsic[]
  79. {
  80. Intrinsic.X86Pminub,
  81. Intrinsic.X86Pminuw,
  82. Intrinsic.X86Pminud
  83. };
  84. public static readonly Intrinsic[] X86PmovsxInstruction = new Intrinsic[]
  85. {
  86. Intrinsic.X86Pmovsxbw,
  87. Intrinsic.X86Pmovsxwd,
  88. Intrinsic.X86Pmovsxdq
  89. };
  90. public static readonly Intrinsic[] X86PmovzxInstruction = new Intrinsic[]
  91. {
  92. Intrinsic.X86Pmovzxbw,
  93. Intrinsic.X86Pmovzxwd,
  94. Intrinsic.X86Pmovzxdq
  95. };
  96. public static readonly Intrinsic[] X86PsllInstruction = new Intrinsic[]
  97. {
  98. 0,
  99. Intrinsic.X86Psllw,
  100. Intrinsic.X86Pslld,
  101. Intrinsic.X86Psllq
  102. };
  103. public static readonly Intrinsic[] X86PsraInstruction = new Intrinsic[]
  104. {
  105. 0,
  106. Intrinsic.X86Psraw,
  107. Intrinsic.X86Psrad
  108. };
  109. public static readonly Intrinsic[] X86PsrlInstruction = new Intrinsic[]
  110. {
  111. 0,
  112. Intrinsic.X86Psrlw,
  113. Intrinsic.X86Psrld,
  114. Intrinsic.X86Psrlq
  115. };
  116. public static readonly Intrinsic[] X86PsubInstruction = new Intrinsic[]
  117. {
  118. Intrinsic.X86Psubb,
  119. Intrinsic.X86Psubw,
  120. Intrinsic.X86Psubd,
  121. Intrinsic.X86Psubq
  122. };
  123. public static readonly Intrinsic[] X86PunpckhInstruction = new Intrinsic[]
  124. {
  125. Intrinsic.X86Punpckhbw,
  126. Intrinsic.X86Punpckhwd,
  127. Intrinsic.X86Punpckhdq,
  128. Intrinsic.X86Punpckhqdq
  129. };
  130. public static readonly Intrinsic[] X86PunpcklInstruction = new Intrinsic[]
  131. {
  132. Intrinsic.X86Punpcklbw,
  133. Intrinsic.X86Punpcklwd,
  134. Intrinsic.X86Punpckldq,
  135. Intrinsic.X86Punpcklqdq
  136. };
  137. #endregion
  138. public static int GetImmShl(OpCodeSimdShImm op)
  139. {
  140. return op.Imm - (8 << op.Size);
  141. }
  142. public static int GetImmShr(OpCodeSimdShImm op)
  143. {
  144. return (8 << (op.Size + 1)) - op.Imm;
  145. }
  146. public static Operand X86GetScalar(ArmEmitterContext context, float value)
  147. {
  148. return X86GetScalar(context, BitConverter.SingleToInt32Bits(value));
  149. }
  150. public static Operand X86GetScalar(ArmEmitterContext context, double value)
  151. {
  152. return X86GetScalar(context, BitConverter.DoubleToInt64Bits(value));
  153. }
  154. public static Operand X86GetScalar(ArmEmitterContext context, int value)
  155. {
  156. return context.VectorCreateScalar(Const(value));
  157. }
  158. public static Operand X86GetScalar(ArmEmitterContext context, long value)
  159. {
  160. return context.VectorCreateScalar(Const(value));
  161. }
  162. public static Operand X86GetAllElements(ArmEmitterContext context, float value)
  163. {
  164. return X86GetAllElements(context, BitConverter.SingleToInt32Bits(value));
  165. }
  166. public static Operand X86GetAllElements(ArmEmitterContext context, double value)
  167. {
  168. return X86GetAllElements(context, BitConverter.DoubleToInt64Bits(value));
  169. }
  170. public static Operand X86GetAllElements(ArmEmitterContext context, short value)
  171. {
  172. ulong value1 = (ushort)value;
  173. ulong value2 = value1 << 16 | value1;
  174. ulong value4 = value2 << 32 | value2;
  175. return X86GetAllElements(context, (long)value4);
  176. }
  177. public static Operand X86GetAllElements(ArmEmitterContext context, int value)
  178. {
  179. Operand vector = context.VectorCreateScalar(Const(value));
  180. vector = context.AddIntrinsic(Intrinsic.X86Shufps, vector, vector, Const(0));
  181. return vector;
  182. }
  183. public static Operand X86GetAllElements(ArmEmitterContext context, long value)
  184. {
  185. Operand vector = context.VectorCreateScalar(Const(value));
  186. vector = context.AddIntrinsic(Intrinsic.X86Movlhps, vector, vector);
  187. return vector;
  188. }
  189. public static Operand X86GetElements(ArmEmitterContext context, long e1, long e0)
  190. {
  191. return X86GetElements(context, (ulong)e1, (ulong)e0);
  192. }
  193. public static Operand X86GetElements(ArmEmitterContext context, ulong e1, ulong e0)
  194. {
  195. Operand vector0 = context.VectorCreateScalar(Const(e0));
  196. Operand vector1 = context.VectorCreateScalar(Const(e1));
  197. return context.AddIntrinsic(Intrinsic.X86Punpcklqdq, vector0, vector1);
  198. }
  199. public static int X86GetRoundControl(FPRoundingMode roundMode)
  200. {
  201. switch (roundMode)
  202. {
  203. case FPRoundingMode.ToNearest: return 8 | 0; // even
  204. case FPRoundingMode.TowardsPlusInfinity: return 8 | 2;
  205. case FPRoundingMode.TowardsMinusInfinity: return 8 | 1;
  206. case FPRoundingMode.TowardsZero: return 8 | 3;
  207. }
  208. throw new ArgumentException($"Invalid rounding mode \"{roundMode}\".");
  209. }
  210. public static Operand EmitSse41RoundToNearestWithTiesToAwayOpF(ArmEmitterContext context, Operand n, bool scalar)
  211. {
  212. Debug.Assert(n.Type == OperandType.V128);
  213. Operand nCopy = context.Copy(n);
  214. Operand rC = Const(X86GetRoundControl(FPRoundingMode.TowardsZero));
  215. IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
  216. if ((op.Size & 1) == 0)
  217. {
  218. Operand signMask = scalar ? X86GetScalar(context, int.MinValue) : X86GetAllElements(context, int.MinValue);
  219. signMask = context.AddIntrinsic(Intrinsic.X86Pand, signMask, nCopy);
  220. // 0x3EFFFFFF == BitConverter.SingleToInt32Bits(0.5f) - 1
  221. Operand valueMask = scalar ? X86GetScalar(context, 0x3EFFFFFF) : X86GetAllElements(context, 0x3EFFFFFF);
  222. valueMask = context.AddIntrinsic(Intrinsic.X86Por, valueMask, signMask);
  223. nCopy = context.AddIntrinsic(scalar ? Intrinsic.X86Addss : Intrinsic.X86Addps, nCopy, valueMask);
  224. nCopy = context.AddIntrinsic(scalar ? Intrinsic.X86Roundss : Intrinsic.X86Roundps, nCopy, rC);
  225. }
  226. else
  227. {
  228. Operand signMask = scalar ? X86GetScalar(context, long.MinValue) : X86GetAllElements(context, long.MinValue);
  229. signMask = context.AddIntrinsic(Intrinsic.X86Pand, signMask, nCopy);
  230. // 0x3FDFFFFFFFFFFFFFL == BitConverter.DoubleToInt64Bits(0.5d) - 1L
  231. Operand valueMask = scalar ? X86GetScalar(context, 0x3FDFFFFFFFFFFFFFL) : X86GetAllElements(context, 0x3FDFFFFFFFFFFFFFL);
  232. valueMask = context.AddIntrinsic(Intrinsic.X86Por, valueMask, signMask);
  233. nCopy = context.AddIntrinsic(scalar ? Intrinsic.X86Addsd : Intrinsic.X86Addpd, nCopy, valueMask);
  234. nCopy = context.AddIntrinsic(scalar ? Intrinsic.X86Roundsd : Intrinsic.X86Roundpd, nCopy, rC);
  235. }
  236. return nCopy;
  237. }
  238. public static Operand EmitCountSetBits8(ArmEmitterContext context, Operand op) // "size" is 8 (SIMD&FP Inst.).
  239. {
  240. Debug.Assert(op.Type == OperandType.I32 || op.Type == OperandType.I64);
  241. Operand op0 = context.Subtract(op, context.BitwiseAnd(context.ShiftRightUI(op, Const(1)), Const(op.Type, 0x55L)));
  242. Operand c1 = Const(op.Type, 0x33L);
  243. Operand op1 = context.Add(context.BitwiseAnd(context.ShiftRightUI(op0, Const(2)), c1), context.BitwiseAnd(op0, c1));
  244. return context.BitwiseAnd(context.Add(op1, context.ShiftRightUI(op1, Const(4))), Const(op.Type, 0x0fL));
  245. }
  246. public static void EmitScalarUnaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  247. {
  248. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  249. Operand n = GetVec(op.Rn);
  250. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  251. Operand res = context.AddIntrinsic(inst, n);
  252. if ((op.Size & 1) != 0)
  253. {
  254. res = context.VectorZeroUpper64(res);
  255. }
  256. else
  257. {
  258. res = context.VectorZeroUpper96(res);
  259. }
  260. context.Copy(GetVec(op.Rd), res);
  261. }
  262. public static void EmitScalarBinaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  263. {
  264. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  265. Operand n = GetVec(op.Rn);
  266. Operand m = GetVec(op.Rm);
  267. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  268. Operand res = context.AddIntrinsic(inst, n, m);
  269. if ((op.Size & 1) != 0)
  270. {
  271. res = context.VectorZeroUpper64(res);
  272. }
  273. else
  274. {
  275. res = context.VectorZeroUpper96(res);
  276. }
  277. context.Copy(GetVec(op.Rd), res);
  278. }
  279. public static void EmitVectorUnaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  280. {
  281. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  282. Operand n = GetVec(op.Rn);
  283. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  284. Operand res = context.AddIntrinsic(inst, n);
  285. if (op.RegisterSize == RegisterSize.Simd64)
  286. {
  287. res = context.VectorZeroUpper64(res);
  288. }
  289. context.Copy(GetVec(op.Rd), res);
  290. }
  291. public static void EmitVectorBinaryOpF(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64)
  292. {
  293. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  294. Operand n = GetVec(op.Rn);
  295. Operand m = GetVec(op.Rm);
  296. Intrinsic inst = (op.Size & 1) != 0 ? inst64 : inst32;
  297. Operand res = context.AddIntrinsic(inst, n, m);
  298. if (op.RegisterSize == RegisterSize.Simd64)
  299. {
  300. res = context.VectorZeroUpper64(res);
  301. }
  302. context.Copy(GetVec(op.Rd), res);
  303. }
  304. public static Operand EmitUnaryMathCall(ArmEmitterContext context, string name, Operand n)
  305. {
  306. IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
  307. MethodInfo info = (op.Size & 1) == 0
  308. ? typeof(MathF).GetMethod(name, new Type[] { typeof(float) })
  309. : typeof(Math). GetMethod(name, new Type[] { typeof(double) });
  310. return context.Call(info, n);
  311. }
  312. public static Operand EmitRoundMathCall(ArmEmitterContext context, MidpointRounding roundMode, Operand n)
  313. {
  314. IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
  315. string name = nameof(Math.Round);
  316. MethodInfo info = (op.Size & 1) == 0
  317. ? typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(MidpointRounding) })
  318. : typeof(Math). GetMethod(name, new Type[] { typeof(double), typeof(MidpointRounding) });
  319. return context.Call(info, n, Const((int)roundMode));
  320. }
  321. public static Operand EmitGetRoundingMode(ArmEmitterContext context)
  322. {
  323. Operand rMode = context.ShiftLeft(GetFpFlag(FPState.RMode1Flag), Const(1));
  324. rMode = context.BitwiseOr(rMode, GetFpFlag(FPState.RMode0Flag));
  325. return rMode;
  326. }
  327. public static Operand EmitRoundByRMode(ArmEmitterContext context, Operand op)
  328. {
  329. Debug.Assert(op.Type == OperandType.FP32 || op.Type == OperandType.FP64);
  330. Operand lbl1 = Label();
  331. Operand lbl2 = Label();
  332. Operand lbl3 = Label();
  333. Operand lblEnd = Label();
  334. Operand rN = Const((int)FPRoundingMode.ToNearest);
  335. Operand rP = Const((int)FPRoundingMode.TowardsPlusInfinity);
  336. Operand rM = Const((int)FPRoundingMode.TowardsMinusInfinity);
  337. Operand res = context.AllocateLocal(op.Type);
  338. Operand rMode = EmitGetRoundingMode(context);
  339. context.BranchIf(lbl1, rMode, rN, Comparison.NotEqual);
  340. context.Copy(res, EmitRoundMathCall(context, MidpointRounding.ToEven, op));
  341. context.Branch(lblEnd);
  342. context.MarkLabel(lbl1);
  343. context.BranchIf(lbl2, rMode, rP, Comparison.NotEqual);
  344. context.Copy(res, EmitUnaryMathCall(context, nameof(Math.Ceiling), op));
  345. context.Branch(lblEnd);
  346. context.MarkLabel(lbl2);
  347. context.BranchIf(lbl3, rMode, rM, Comparison.NotEqual);
  348. context.Copy(res, EmitUnaryMathCall(context, nameof(Math.Floor), op));
  349. context.Branch(lblEnd);
  350. context.MarkLabel(lbl3);
  351. context.Copy(res, EmitUnaryMathCall(context, nameof(Math.Truncate), op));
  352. context.Branch(lblEnd);
  353. context.MarkLabel(lblEnd);
  354. return res;
  355. }
  356. public static Operand EmitSoftFloatCall(ArmEmitterContext context, string name, params Operand[] callArgs)
  357. {
  358. IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
  359. MethodInfo info = (op.Size & 1) == 0
  360. ? typeof(SoftFloat32).GetMethod(name)
  361. : typeof(SoftFloat64).GetMethod(name);
  362. context.StoreToContext();
  363. Operand res = context.Call(info, callArgs);
  364. context.LoadFromContext();
  365. return res;
  366. }
  367. public static void EmitScalarBinaryOpByElemF(ArmEmitterContext context, Func2I emit)
  368. {
  369. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  370. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  371. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  372. Operand m = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  373. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(n, m), 0));
  374. }
  375. public static void EmitScalarTernaryOpByElemF(ArmEmitterContext context, Func3I emit)
  376. {
  377. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  378. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  379. Operand d = context.VectorExtract(type, GetVec(op.Rd), 0);
  380. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  381. Operand m = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  382. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(d, n, m), 0));
  383. }
  384. public static void EmitScalarUnaryOpSx(ArmEmitterContext context, Func1I emit)
  385. {
  386. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  387. Operand n = EmitVectorExtractSx(context, op.Rn, 0, op.Size);
  388. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n), 0, op.Size);
  389. context.Copy(GetVec(op.Rd), d);
  390. }
  391. public static void EmitScalarBinaryOpSx(ArmEmitterContext context, Func2I emit)
  392. {
  393. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  394. Operand n = EmitVectorExtractSx(context, op.Rn, 0, op.Size);
  395. Operand m = EmitVectorExtractSx(context, op.Rm, 0, op.Size);
  396. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n, m), 0, op.Size);
  397. context.Copy(GetVec(op.Rd), d);
  398. }
  399. public static void EmitScalarUnaryOpZx(ArmEmitterContext context, Func1I emit)
  400. {
  401. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  402. Operand n = EmitVectorExtractZx(context, op.Rn, 0, op.Size);
  403. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n), 0, op.Size);
  404. context.Copy(GetVec(op.Rd), d);
  405. }
  406. public static void EmitScalarBinaryOpZx(ArmEmitterContext context, Func2I emit)
  407. {
  408. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  409. Operand n = EmitVectorExtractZx(context, op.Rn, 0, op.Size);
  410. Operand m = EmitVectorExtractZx(context, op.Rm, 0, op.Size);
  411. Operand d = EmitVectorInsert(context, context.VectorZero(), emit(n, m), 0, op.Size);
  412. context.Copy(GetVec(op.Rd), d);
  413. }
  414. public static void EmitScalarTernaryOpZx(ArmEmitterContext context, Func3I emit)
  415. {
  416. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  417. Operand d = EmitVectorExtractZx(context, op.Rd, 0, op.Size);
  418. Operand n = EmitVectorExtractZx(context, op.Rn, 0, op.Size);
  419. Operand m = EmitVectorExtractZx(context, op.Rm, 0, op.Size);
  420. d = EmitVectorInsert(context, context.VectorZero(), emit(d, n, m), 0, op.Size);
  421. context.Copy(GetVec(op.Rd), d);
  422. }
  423. public static void EmitScalarUnaryOpF(ArmEmitterContext context, Func1I emit)
  424. {
  425. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  426. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  427. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  428. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(n), 0));
  429. }
  430. public static void EmitScalarBinaryOpF(ArmEmitterContext context, Func2I emit)
  431. {
  432. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  433. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  434. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  435. Operand m = context.VectorExtract(type, GetVec(op.Rm), 0);
  436. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(n, m), 0));
  437. }
  438. public static void EmitScalarTernaryRaOpF(ArmEmitterContext context, Func3I emit)
  439. {
  440. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  441. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  442. Operand a = context.VectorExtract(type, GetVec(op.Ra), 0);
  443. Operand n = context.VectorExtract(type, GetVec(op.Rn), 0);
  444. Operand m = context.VectorExtract(type, GetVec(op.Rm), 0);
  445. context.Copy(GetVec(op.Rd), context.VectorInsert(context.VectorZero(), emit(a, n, m), 0));
  446. }
  447. public static void EmitVectorUnaryOpF(ArmEmitterContext context, Func1I emit)
  448. {
  449. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  450. Operand res = context.VectorZero();
  451. int sizeF = op.Size & 1;
  452. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  453. int elems = op.GetBytesCount() >> sizeF + 2;
  454. for (int index = 0; index < elems; index++)
  455. {
  456. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  457. res = context.VectorInsert(res, emit(ne), index);
  458. }
  459. context.Copy(GetVec(op.Rd), res);
  460. }
  461. public static void EmitVectorBinaryOpF(ArmEmitterContext context, Func2I emit)
  462. {
  463. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  464. Operand res = context.VectorZero();
  465. int sizeF = op.Size & 1;
  466. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  467. int elems = op.GetBytesCount() >> sizeF + 2;
  468. for (int index = 0; index < elems; index++)
  469. {
  470. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  471. Operand me = context.VectorExtract(type, GetVec(op.Rm), index);
  472. res = context.VectorInsert(res, emit(ne, me), index);
  473. }
  474. context.Copy(GetVec(op.Rd), res);
  475. }
  476. public static void EmitVectorTernaryOpF(ArmEmitterContext context, Func3I emit)
  477. {
  478. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  479. Operand res = context.VectorZero();
  480. int sizeF = op.Size & 1;
  481. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  482. int elems = op.GetBytesCount() >> sizeF + 2;
  483. for (int index = 0; index < elems; index++)
  484. {
  485. Operand de = context.VectorExtract(type, GetVec(op.Rd), index);
  486. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  487. Operand me = context.VectorExtract(type, GetVec(op.Rm), index);
  488. res = context.VectorInsert(res, emit(de, ne, me), index);
  489. }
  490. context.Copy(GetVec(op.Rd), res);
  491. }
  492. public static void EmitVectorBinaryOpByElemF(ArmEmitterContext context, Func2I emit)
  493. {
  494. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  495. Operand res = context.VectorZero();
  496. int sizeF = op.Size & 1;
  497. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  498. int elems = op.GetBytesCount() >> sizeF + 2;
  499. for (int index = 0; index < elems; index++)
  500. {
  501. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  502. Operand me = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  503. res = context.VectorInsert(res, emit(ne, me), index);
  504. }
  505. context.Copy(GetVec(op.Rd), res);
  506. }
  507. public static void EmitVectorTernaryOpByElemF(ArmEmitterContext context, Func3I emit)
  508. {
  509. OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
  510. Operand res = context.VectorZero();
  511. int sizeF = op.Size & 1;
  512. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  513. int elems = op.GetBytesCount() >> sizeF + 2;
  514. for (int index = 0; index < elems; index++)
  515. {
  516. Operand de = context.VectorExtract(type, GetVec(op.Rd), index);
  517. Operand ne = context.VectorExtract(type, GetVec(op.Rn), index);
  518. Operand me = context.VectorExtract(type, GetVec(op.Rm), op.Index);
  519. res = context.VectorInsert(res, emit(de, ne, me), index);
  520. }
  521. context.Copy(GetVec(op.Rd), res);
  522. }
  523. public static void EmitVectorUnaryOpSx(ArmEmitterContext context, Func1I emit)
  524. {
  525. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  526. Operand res = context.VectorZero();
  527. int elems = op.GetBytesCount() >> op.Size;
  528. for (int index = 0; index < elems; index++)
  529. {
  530. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  531. res = EmitVectorInsert(context, res, emit(ne), index, op.Size);
  532. }
  533. context.Copy(GetVec(op.Rd), res);
  534. }
  535. public static void EmitVectorBinaryOpSx(ArmEmitterContext context, Func2I emit)
  536. {
  537. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  538. Operand res = context.VectorZero();
  539. int elems = op.GetBytesCount() >> op.Size;
  540. for (int index = 0; index < elems; index++)
  541. {
  542. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  543. Operand me = EmitVectorExtractSx(context, op.Rm, index, op.Size);
  544. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  545. }
  546. context.Copy(GetVec(op.Rd), res);
  547. }
  548. public static void EmitVectorTernaryOpSx(ArmEmitterContext context, Func3I emit)
  549. {
  550. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  551. Operand res = context.VectorZero();
  552. int elems = op.GetBytesCount() >> op.Size;
  553. for (int index = 0; index < elems; index++)
  554. {
  555. Operand de = EmitVectorExtractSx(context, op.Rd, index, op.Size);
  556. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  557. Operand me = EmitVectorExtractSx(context, op.Rm, index, op.Size);
  558. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size);
  559. }
  560. context.Copy(GetVec(op.Rd), res);
  561. }
  562. public static void EmitVectorUnaryOpZx(ArmEmitterContext context, Func1I emit)
  563. {
  564. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  565. Operand res = context.VectorZero();
  566. int elems = op.GetBytesCount() >> op.Size;
  567. for (int index = 0; index < elems; index++)
  568. {
  569. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  570. res = EmitVectorInsert(context, res, emit(ne), index, op.Size);
  571. }
  572. context.Copy(GetVec(op.Rd), res);
  573. }
  574. public static void EmitVectorBinaryOpZx(ArmEmitterContext context, Func2I emit)
  575. {
  576. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  577. Operand res = context.VectorZero();
  578. int elems = op.GetBytesCount() >> op.Size;
  579. for (int index = 0; index < elems; index++)
  580. {
  581. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  582. Operand me = EmitVectorExtractZx(context, op.Rm, index, op.Size);
  583. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  584. }
  585. context.Copy(GetVec(op.Rd), res);
  586. }
  587. public static void EmitVectorTernaryOpZx(ArmEmitterContext context, Func3I emit)
  588. {
  589. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  590. Operand res = context.VectorZero();
  591. int elems = op.GetBytesCount() >> op.Size;
  592. for (int index = 0; index < elems; index++)
  593. {
  594. Operand de = EmitVectorExtractZx(context, op.Rd, index, op.Size);
  595. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  596. Operand me = EmitVectorExtractZx(context, op.Rm, index, op.Size);
  597. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size);
  598. }
  599. context.Copy(GetVec(op.Rd), res);
  600. }
  601. public static void EmitVectorBinaryOpByElemSx(ArmEmitterContext context, Func2I emit)
  602. {
  603. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  604. Operand res = context.VectorZero();
  605. Operand me = EmitVectorExtractSx(context, op.Rm, op.Index, op.Size);
  606. int elems = op.GetBytesCount() >> op.Size;
  607. for (int index = 0; index < elems; index++)
  608. {
  609. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  610. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  611. }
  612. context.Copy(GetVec(op.Rd), res);
  613. }
  614. public static void EmitVectorBinaryOpByElemZx(ArmEmitterContext context, Func2I emit)
  615. {
  616. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  617. Operand res = context.VectorZero();
  618. Operand me = EmitVectorExtractZx(context, op.Rm, op.Index, op.Size);
  619. int elems = op.GetBytesCount() >> op.Size;
  620. for (int index = 0; index < elems; index++)
  621. {
  622. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  623. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size);
  624. }
  625. context.Copy(GetVec(op.Rd), res);
  626. }
  627. public static void EmitVectorTernaryOpByElemZx(ArmEmitterContext context, Func3I emit)
  628. {
  629. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  630. Operand res = context.VectorZero();
  631. Operand me = EmitVectorExtractZx(context, op.Rm, op.Index, op.Size);
  632. int elems = op.GetBytesCount() >> op.Size;
  633. for (int index = 0; index < elems; index++)
  634. {
  635. Operand de = EmitVectorExtractZx(context, op.Rd, index, op.Size);
  636. Operand ne = EmitVectorExtractZx(context, op.Rn, index, op.Size);
  637. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size);
  638. }
  639. context.Copy(GetVec(op.Rd), res);
  640. }
  641. public static void EmitVectorImmUnaryOp(ArmEmitterContext context, Func1I emit)
  642. {
  643. OpCodeSimdImm op = (OpCodeSimdImm)context.CurrOp;
  644. Operand imm = Const(op.Immediate);
  645. Operand res = context.VectorZero();
  646. int elems = op.GetBytesCount() >> op.Size;
  647. for (int index = 0; index < elems; index++)
  648. {
  649. res = EmitVectorInsert(context, res, emit(imm), index, op.Size);
  650. }
  651. context.Copy(GetVec(op.Rd), res);
  652. }
  653. public static void EmitVectorImmBinaryOp(ArmEmitterContext context, Func2I emit)
  654. {
  655. OpCodeSimdImm op = (OpCodeSimdImm)context.CurrOp;
  656. Operand imm = Const(op.Immediate);
  657. Operand res = context.VectorZero();
  658. int elems = op.GetBytesCount() >> op.Size;
  659. for (int index = 0; index < elems; index++)
  660. {
  661. Operand de = EmitVectorExtractZx(context, op.Rd, index, op.Size);
  662. res = EmitVectorInsert(context, res, emit(de, imm), index, op.Size);
  663. }
  664. context.Copy(GetVec(op.Rd), res);
  665. }
  666. public static void EmitVectorWidenRmBinaryOpSx(ArmEmitterContext context, Func2I emit)
  667. {
  668. EmitVectorWidenRmBinaryOp(context, emit, signed: true);
  669. }
  670. public static void EmitVectorWidenRmBinaryOpZx(ArmEmitterContext context, Func2I emit)
  671. {
  672. EmitVectorWidenRmBinaryOp(context, emit, signed: false);
  673. }
  674. private static void EmitVectorWidenRmBinaryOp(ArmEmitterContext context, Func2I emit, bool signed)
  675. {
  676. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  677. Operand res = context.VectorZero();
  678. int elems = 8 >> op.Size;
  679. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  680. for (int index = 0; index < elems; index++)
  681. {
  682. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size + 1, signed);
  683. Operand me = EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  684. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size + 1);
  685. }
  686. context.Copy(GetVec(op.Rd), res);
  687. }
  688. public static void EmitVectorWidenRnRmBinaryOpSx(ArmEmitterContext context, Func2I emit)
  689. {
  690. EmitVectorWidenRnRmBinaryOp(context, emit, signed: true);
  691. }
  692. public static void EmitVectorWidenRnRmBinaryOpZx(ArmEmitterContext context, Func2I emit)
  693. {
  694. EmitVectorWidenRnRmBinaryOp(context, emit, signed: false);
  695. }
  696. private static void EmitVectorWidenRnRmBinaryOp(ArmEmitterContext context, Func2I emit, bool signed)
  697. {
  698. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  699. Operand res = context.VectorZero();
  700. int elems = 8 >> op.Size;
  701. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  702. for (int index = 0; index < elems; index++)
  703. {
  704. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  705. Operand me = EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  706. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size + 1);
  707. }
  708. context.Copy(GetVec(op.Rd), res);
  709. }
  710. public static void EmitVectorWidenRnRmTernaryOpSx(ArmEmitterContext context, Func3I emit)
  711. {
  712. EmitVectorWidenRnRmTernaryOp(context, emit, signed: true);
  713. }
  714. public static void EmitVectorWidenRnRmTernaryOpZx(ArmEmitterContext context, Func3I emit)
  715. {
  716. EmitVectorWidenRnRmTernaryOp(context, emit, signed: false);
  717. }
  718. private static void EmitVectorWidenRnRmTernaryOp(ArmEmitterContext context, Func3I emit, bool signed)
  719. {
  720. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  721. Operand res = context.VectorZero();
  722. int elems = 8 >> op.Size;
  723. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  724. for (int index = 0; index < elems; index++)
  725. {
  726. Operand de = EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  727. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  728. Operand me = EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  729. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size + 1);
  730. }
  731. context.Copy(GetVec(op.Rd), res);
  732. }
  733. public static void EmitVectorWidenBinaryOpByElemSx(ArmEmitterContext context, Func2I emit)
  734. {
  735. EmitVectorWidenBinaryOpByElem(context, emit, signed: true);
  736. }
  737. public static void EmitVectorWidenBinaryOpByElemZx(ArmEmitterContext context, Func2I emit)
  738. {
  739. EmitVectorWidenBinaryOpByElem(context, emit, signed: false);
  740. }
  741. private static void EmitVectorWidenBinaryOpByElem(ArmEmitterContext context, Func2I emit, bool signed)
  742. {
  743. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  744. Operand res = context.VectorZero();
  745. Operand me = EmitVectorExtract(context, op.Rm, op.Index, op.Size, signed);
  746. int elems = 8 >> op.Size;
  747. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  748. for (int index = 0; index < elems; index++)
  749. {
  750. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  751. res = EmitVectorInsert(context, res, emit(ne, me), index, op.Size + 1);
  752. }
  753. context.Copy(GetVec(op.Rd), res);
  754. }
  755. public static void EmitVectorWidenTernaryOpByElemSx(ArmEmitterContext context, Func3I emit)
  756. {
  757. EmitVectorWidenTernaryOpByElem(context, emit, signed: true);
  758. }
  759. public static void EmitVectorWidenTernaryOpByElemZx(ArmEmitterContext context, Func3I emit)
  760. {
  761. EmitVectorWidenTernaryOpByElem(context, emit, signed: false);
  762. }
  763. private static void EmitVectorWidenTernaryOpByElem(ArmEmitterContext context, Func3I emit, bool signed)
  764. {
  765. OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
  766. Operand res = context.VectorZero();
  767. Operand me = EmitVectorExtract(context, op.Rm, op.Index, op.Size, signed);
  768. int elems = 8 >> op.Size;
  769. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  770. for (int index = 0; index < elems; index++)
  771. {
  772. Operand de = EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  773. Operand ne = EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  774. res = EmitVectorInsert(context, res, emit(de, ne, me), index, op.Size + 1);
  775. }
  776. context.Copy(GetVec(op.Rd), res);
  777. }
  778. public static void EmitVectorPairwiseOpSx(ArmEmitterContext context, Func2I emit)
  779. {
  780. EmitVectorPairwiseOp(context, emit, signed: true);
  781. }
  782. public static void EmitVectorPairwiseOpZx(ArmEmitterContext context, Func2I emit)
  783. {
  784. EmitVectorPairwiseOp(context, emit, signed: false);
  785. }
  786. private static void EmitVectorPairwiseOp(ArmEmitterContext context, Func2I emit, bool signed)
  787. {
  788. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  789. Operand res = context.VectorZero();
  790. int pairs = op.GetPairsCount() >> op.Size;
  791. for (int index = 0; index < pairs; index++)
  792. {
  793. int pairIndex = index << 1;
  794. Operand n0 = EmitVectorExtract(context, op.Rn, pairIndex, op.Size, signed);
  795. Operand n1 = EmitVectorExtract(context, op.Rn, pairIndex + 1, op.Size, signed);
  796. Operand m0 = EmitVectorExtract(context, op.Rm, pairIndex, op.Size, signed);
  797. Operand m1 = EmitVectorExtract(context, op.Rm, pairIndex + 1, op.Size, signed);
  798. res = EmitVectorInsert(context, res, emit(n0, n1), index, op.Size);
  799. res = EmitVectorInsert(context, res, emit(m0, m1), pairs + index, op.Size);
  800. }
  801. context.Copy(GetVec(op.Rd), res);
  802. }
  803. public static void EmitSsse3VectorPairwiseOp(ArmEmitterContext context, Intrinsic[] inst)
  804. {
  805. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  806. Operand n = GetVec(op.Rn);
  807. Operand m = GetVec(op.Rm);
  808. if (op.RegisterSize == RegisterSize.Simd64)
  809. {
  810. Operand zeroEvenMask = X86GetElements(context, ZeroMask, EvenMasks[op.Size]);
  811. Operand zeroOddMask = X86GetElements(context, ZeroMask, OddMasks [op.Size]);
  812. Operand mN = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, n, m); // m:n
  813. Operand left = context.AddIntrinsic(Intrinsic.X86Pshufb, mN, zeroEvenMask); // 0:even from m:n
  814. Operand right = context.AddIntrinsic(Intrinsic.X86Pshufb, mN, zeroOddMask); // 0:odd from m:n
  815. context.Copy(GetVec(op.Rd), context.AddIntrinsic(inst[op.Size], left, right));
  816. }
  817. else if (op.Size < 3)
  818. {
  819. Operand oddEvenMask = X86GetElements(context, OddMasks[op.Size], EvenMasks[op.Size]);
  820. Operand oddEvenN = context.AddIntrinsic(Intrinsic.X86Pshufb, n, oddEvenMask); // odd:even from n
  821. Operand oddEvenM = context.AddIntrinsic(Intrinsic.X86Pshufb, m, oddEvenMask); // odd:even from m
  822. Operand left = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, oddEvenN, oddEvenM);
  823. Operand right = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, oddEvenN, oddEvenM);
  824. context.Copy(GetVec(op.Rd), context.AddIntrinsic(inst[op.Size], left, right));
  825. }
  826. else
  827. {
  828. Operand left = context.AddIntrinsic(Intrinsic.X86Punpcklqdq, n, m);
  829. Operand right = context.AddIntrinsic(Intrinsic.X86Punpckhqdq, n, m);
  830. context.Copy(GetVec(op.Rd), context.AddIntrinsic(inst[3], left, right));
  831. }
  832. }
  833. public static void EmitVectorAcrossVectorOpSx(ArmEmitterContext context, Func2I emit)
  834. {
  835. EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: false);
  836. }
  837. public static void EmitVectorAcrossVectorOpZx(ArmEmitterContext context, Func2I emit)
  838. {
  839. EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: false);
  840. }
  841. public static void EmitVectorLongAcrossVectorOpSx(ArmEmitterContext context, Func2I emit)
  842. {
  843. EmitVectorAcrossVectorOp(context, emit, signed: true, isLong: true);
  844. }
  845. public static void EmitVectorLongAcrossVectorOpZx(ArmEmitterContext context, Func2I emit)
  846. {
  847. EmitVectorAcrossVectorOp(context, emit, signed: false, isLong: true);
  848. }
  849. private static void EmitVectorAcrossVectorOp(
  850. ArmEmitterContext context,
  851. Func2I emit,
  852. bool signed,
  853. bool isLong)
  854. {
  855. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  856. int elems = op.GetBytesCount() >> op.Size;
  857. Operand res = EmitVectorExtract(context, op.Rn, 0, op.Size, signed);
  858. for (int index = 1; index < elems; index++)
  859. {
  860. Operand n = EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  861. res = emit(res, n);
  862. }
  863. int size = isLong ? op.Size + 1 : op.Size;
  864. Operand d = EmitVectorInsert(context, context.VectorZero(), res, 0, size);
  865. context.Copy(GetVec(op.Rd), d);
  866. }
  867. public static void EmitVectorAcrossVectorOpF(ArmEmitterContext context, Func2I emit)
  868. {
  869. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  870. Debug.Assert((op.Size & 1) == 0 && op.RegisterSize == RegisterSize.Simd128);
  871. Operand res = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), 0);
  872. for (int index = 1; index < 4; index++)
  873. {
  874. Operand n = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), index);
  875. res = emit(res, n);
  876. }
  877. Operand d = context.VectorInsert(context.VectorZero(), res, 0);
  878. context.Copy(GetVec(op.Rd), d);
  879. }
  880. public static void EmitSse2VectorAcrossVectorOpF(ArmEmitterContext context, Func2I emit)
  881. {
  882. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  883. Debug.Assert((op.Size & 1) == 0 && op.RegisterSize == RegisterSize.Simd128);
  884. const int sm0 = 0 << 6 | 0 << 4 | 0 << 2 | 0 << 0;
  885. const int sm1 = 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0;
  886. const int sm2 = 2 << 6 | 2 << 4 | 2 << 2 | 2 << 0;
  887. const int sm3 = 3 << 6 | 3 << 4 | 3 << 2 | 3 << 0;
  888. Operand nCopy = context.Copy(GetVec(op.Rn));
  889. Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm0));
  890. Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm1));
  891. Operand part2 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm2));
  892. Operand part3 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, nCopy, Const(sm3));
  893. Operand res = emit(emit(part0, part1), emit(part2, part3));
  894. context.Copy(GetVec(op.Rd), context.VectorZeroUpper96(res));
  895. }
  896. public static void EmitScalarPairwiseOpF(ArmEmitterContext context, Func2I emit)
  897. {
  898. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  899. OperandType type = (op.Size & 1) != 0 ? OperandType.FP64 : OperandType.FP32;
  900. Operand ne0 = context.VectorExtract(type, GetVec(op.Rn), 0);
  901. Operand ne1 = context.VectorExtract(type, GetVec(op.Rn), 1);
  902. Operand res = context.VectorInsert(context.VectorZero(), emit(ne0, ne1), 0);
  903. context.Copy(GetVec(op.Rd), res);
  904. }
  905. public static void EmitSse2ScalarPairwiseOpF(ArmEmitterContext context, Func2I emit)
  906. {
  907. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  908. Operand n = GetVec(op.Rn);
  909. Operand op0, op1;
  910. if ((op.Size & 1) == 0)
  911. {
  912. const int sm0 = 2 << 6 | 2 << 4 | 2 << 2 | 0 << 0;
  913. const int sm1 = 2 << 6 | 2 << 4 | 2 << 2 | 1 << 0;
  914. Operand zeroN = context.VectorZeroUpper64(n);
  915. op0 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm0));
  916. op1 = context.AddIntrinsic(Intrinsic.X86Pshufd, zeroN, Const(sm1));
  917. }
  918. else /* if ((op.Size & 1) == 1) */
  919. {
  920. Operand zero = context.VectorZero();
  921. op0 = context.AddIntrinsic(Intrinsic.X86Movlhps, n, zero);
  922. op1 = context.AddIntrinsic(Intrinsic.X86Movhlps, zero, n);
  923. }
  924. context.Copy(GetVec(op.Rd), emit(op0, op1));
  925. }
  926. public static void EmitVectorPairwiseOpF(ArmEmitterContext context, Func2I emit)
  927. {
  928. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  929. Operand res = context.VectorZero();
  930. int sizeF = op.Size & 1;
  931. OperandType type = sizeF != 0 ? OperandType.FP64 : OperandType.FP32;
  932. int pairs = op.GetPairsCount() >> sizeF + 2;
  933. for (int index = 0; index < pairs; index++)
  934. {
  935. int pairIndex = index << 1;
  936. Operand n0 = context.VectorExtract(type, GetVec(op.Rn), pairIndex);
  937. Operand n1 = context.VectorExtract(type, GetVec(op.Rn), pairIndex + 1);
  938. Operand m0 = context.VectorExtract(type, GetVec(op.Rm), pairIndex);
  939. Operand m1 = context.VectorExtract(type, GetVec(op.Rm), pairIndex + 1);
  940. res = context.VectorInsert(res, emit(n0, n1), index);
  941. res = context.VectorInsert(res, emit(m0, m1), pairs + index);
  942. }
  943. context.Copy(GetVec(op.Rd), res);
  944. }
  945. public static void EmitSse2VectorPairwiseOpF(ArmEmitterContext context, Func2I emit)
  946. {
  947. OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
  948. Operand nCopy = context.Copy(GetVec(op.Rn));
  949. Operand mCopy = context.Copy(GetVec(op.Rm));
  950. int sizeF = op.Size & 1;
  951. if (sizeF == 0)
  952. {
  953. if (op.RegisterSize == RegisterSize.Simd64)
  954. {
  955. Operand unpck = context.AddIntrinsic(Intrinsic.X86Unpcklps, nCopy, mCopy);
  956. Operand zero = context.VectorZero();
  957. Operand part0 = context.AddIntrinsic(Intrinsic.X86Movlhps, unpck, zero);
  958. Operand part1 = context.AddIntrinsic(Intrinsic.X86Movhlps, zero, unpck);
  959. context.Copy(GetVec(op.Rd), emit(part0, part1));
  960. }
  961. else /* if (op.RegisterSize == RegisterSize.Simd128) */
  962. {
  963. const int sm0 = 2 << 6 | 0 << 4 | 2 << 2 | 0 << 0;
  964. const int sm1 = 3 << 6 | 1 << 4 | 3 << 2 | 1 << 0;
  965. Operand part0 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm0));
  966. Operand part1 = context.AddIntrinsic(Intrinsic.X86Shufps, nCopy, mCopy, Const(sm1));
  967. context.Copy(GetVec(op.Rd), emit(part0, part1));
  968. }
  969. }
  970. else /* if (sizeF == 1) */
  971. {
  972. Operand part0 = context.AddIntrinsic(Intrinsic.X86Unpcklpd, nCopy, mCopy);
  973. Operand part1 = context.AddIntrinsic(Intrinsic.X86Unpckhpd, nCopy, mCopy);
  974. context.Copy(GetVec(op.Rd), emit(part0, part1));
  975. }
  976. }
  977. [Flags]
  978. public enum Mxcsr
  979. {
  980. Ftz = 1 << 15, // Flush To Zero.
  981. Um = 1 << 11, // Underflow Mask.
  982. Dm = 1 << 8, // Denormal Mask.
  983. Daz = 1 << 6 // Denormals Are Zero.
  984. }
  985. public static void EmitSseOrAvxEnterFtzAndDazModesOpF(ArmEmitterContext context, out Operand isTrue)
  986. {
  987. isTrue = GetFpFlag(FPState.FzFlag);
  988. Operand lblTrue = Label();
  989. context.BranchIfFalse(lblTrue, isTrue);
  990. context.AddIntrinsicNoRet(Intrinsic.X86Mxcsrmb, Const((int)(Mxcsr.Ftz | Mxcsr.Um | Mxcsr.Dm | Mxcsr.Daz)));
  991. context.MarkLabel(lblTrue);
  992. }
  993. public static void EmitSseOrAvxExitFtzAndDazModesOpF(ArmEmitterContext context, Operand isTrue = default)
  994. {
  995. isTrue = isTrue == default ? GetFpFlag(FPState.FzFlag) : isTrue;
  996. Operand lblTrue = Label();
  997. context.BranchIfFalse(lblTrue, isTrue);
  998. context.AddIntrinsicNoRet(Intrinsic.X86Mxcsrub, Const((int)(Mxcsr.Ftz | Mxcsr.Daz)));
  999. context.MarkLabel(lblTrue);
  1000. }
  1001. public enum CmpCondition
  1002. {
  1003. // Legacy Sse.
  1004. Equal = 0, // Ordered, non-signaling.
  1005. LessThan = 1, // Ordered, signaling.
  1006. LessThanOrEqual = 2, // Ordered, signaling.
  1007. UnorderedQ = 3, // Non-signaling.
  1008. NotLessThan = 5, // Unordered, signaling.
  1009. NotLessThanOrEqual = 6, // Unordered, signaling.
  1010. OrderedQ = 7, // Non-signaling.
  1011. // Vex.
  1012. GreaterThanOrEqual = 13, // Ordered, signaling.
  1013. GreaterThan = 14, // Ordered, signaling.
  1014. OrderedS = 23 // Signaling.
  1015. }
  1016. [Flags]
  1017. public enum SaturatingFlags
  1018. {
  1019. None = 0,
  1020. ByElem = 1 << 0,
  1021. Scalar = 1 << 1,
  1022. Signed = 1 << 2,
  1023. Add = 1 << 3,
  1024. Sub = 1 << 4,
  1025. Accumulate = 1 << 5
  1026. }
  1027. public static void EmitScalarSaturatingUnaryOpSx(ArmEmitterContext context, Func1I emit)
  1028. {
  1029. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.Scalar | SaturatingFlags.Signed);
  1030. }
  1031. public static void EmitVectorSaturatingUnaryOpSx(ArmEmitterContext context, Func1I emit)
  1032. {
  1033. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.Signed);
  1034. }
  1035. public static void EmitSaturatingUnaryOpSx(ArmEmitterContext context, Func1I emit, SaturatingFlags flags)
  1036. {
  1037. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  1038. Operand res = context.VectorZero();
  1039. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  1040. int elems = !scalar ? op.GetBytesCount() >> op.Size : 1;
  1041. for (int index = 0; index < elems; index++)
  1042. {
  1043. Operand ne = EmitVectorExtractSx(context, op.Rn, index, op.Size);
  1044. Operand de;
  1045. if (op.Size <= 2)
  1046. {
  1047. de = EmitSignedSrcSatQ(context, emit(ne), op.Size, signedDst: true);
  1048. }
  1049. else /* if (op.Size == 3) */
  1050. {
  1051. de = EmitUnarySignedSatQAbsOrNeg(context, emit(ne));
  1052. }
  1053. res = EmitVectorInsert(context, res, de, index, op.Size);
  1054. }
  1055. context.Copy(GetVec(op.Rd), res);
  1056. }
  1057. public static void EmitScalarSaturatingBinaryOpSx(ArmEmitterContext context, Func2I emit = null, SaturatingFlags flags = SaturatingFlags.None)
  1058. {
  1059. EmitSaturatingBinaryOp(context, emit, SaturatingFlags.Scalar | SaturatingFlags.Signed | flags);
  1060. }
  1061. public static void EmitScalarSaturatingBinaryOpZx(ArmEmitterContext context, SaturatingFlags flags)
  1062. {
  1063. EmitSaturatingBinaryOp(context, null, SaturatingFlags.Scalar | flags);
  1064. }
  1065. public static void EmitVectorSaturatingBinaryOpSx(ArmEmitterContext context, Func2I emit = null, SaturatingFlags flags = SaturatingFlags.None)
  1066. {
  1067. EmitSaturatingBinaryOp(context, emit, SaturatingFlags.Signed | flags);
  1068. }
  1069. public static void EmitVectorSaturatingBinaryOpZx(ArmEmitterContext context, SaturatingFlags flags)
  1070. {
  1071. EmitSaturatingBinaryOp(context, null, flags);
  1072. }
  1073. public static void EmitVectorSaturatingBinaryOpByElemSx(ArmEmitterContext context, Func2I emit)
  1074. {
  1075. EmitSaturatingBinaryOp(context, emit, SaturatingFlags.ByElem | SaturatingFlags.Signed);
  1076. }
  1077. public static void EmitSaturatingBinaryOp(ArmEmitterContext context, Func2I emit, SaturatingFlags flags)
  1078. {
  1079. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  1080. Operand res = context.VectorZero();
  1081. bool byElem = (flags & SaturatingFlags.ByElem) != 0;
  1082. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  1083. bool signed = (flags & SaturatingFlags.Signed) != 0;
  1084. bool add = (flags & SaturatingFlags.Add) != 0;
  1085. bool sub = (flags & SaturatingFlags.Sub) != 0;
  1086. bool accumulate = (flags & SaturatingFlags.Accumulate) != 0;
  1087. int elems = !scalar ? op.GetBytesCount() >> op.Size : 1;
  1088. if (add || sub)
  1089. {
  1090. for (int index = 0; index < elems; index++)
  1091. {
  1092. Operand de;
  1093. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  1094. Operand me = EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, index, op.Size, signed);
  1095. if (op.Size <= 2)
  1096. {
  1097. Operand temp = add ? context.Add(ne, me) : context.Subtract(ne, me);
  1098. de = EmitSignedSrcSatQ(context, temp, op.Size, signedDst: signed);
  1099. }
  1100. else /* if (op.Size == 3) */
  1101. {
  1102. if (add)
  1103. {
  1104. de = signed ? EmitBinarySignedSatQAdd(context, ne, me) : EmitBinaryUnsignedSatQAdd(context, ne, me);
  1105. }
  1106. else /* if (sub) */
  1107. {
  1108. de = signed ? EmitBinarySignedSatQSub(context, ne, me) : EmitBinaryUnsignedSatQSub(context, ne, me);
  1109. }
  1110. }
  1111. res = EmitVectorInsert(context, res, de, index, op.Size);
  1112. }
  1113. }
  1114. else if (accumulate)
  1115. {
  1116. for (int index = 0; index < elems; index++)
  1117. {
  1118. Operand de;
  1119. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size, !signed);
  1120. Operand me = EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  1121. if (op.Size <= 2)
  1122. {
  1123. Operand temp = context.Add(ne, me);
  1124. de = EmitSignedSrcSatQ(context, temp, op.Size, signedDst: signed);
  1125. }
  1126. else /* if (op.Size == 3) */
  1127. {
  1128. de = signed ? EmitBinarySignedSatQAcc(context, ne, me) : EmitBinaryUnsignedSatQAcc(context, ne, me);
  1129. }
  1130. res = EmitVectorInsert(context, res, de, index, op.Size);
  1131. }
  1132. }
  1133. else
  1134. {
  1135. Operand me = default;
  1136. if (byElem)
  1137. {
  1138. OpCodeSimdRegElem opRegElem = (OpCodeSimdRegElem)op;
  1139. me = EmitVectorExtract(context, opRegElem.Rm, opRegElem.Index, op.Size, signed);
  1140. }
  1141. for (int index = 0; index < elems; index++)
  1142. {
  1143. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  1144. if (!byElem)
  1145. {
  1146. me = EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, index, op.Size, signed);
  1147. }
  1148. Operand de = EmitSignedSrcSatQ(context, emit(ne, me), op.Size, signedDst: signed);
  1149. res = EmitVectorInsert(context, res, de, index, op.Size);
  1150. }
  1151. }
  1152. context.Copy(GetVec(op.Rd), res);
  1153. }
  1154. [Flags]
  1155. public enum SaturatingNarrowFlags
  1156. {
  1157. Scalar = 1 << 0,
  1158. SignedSrc = 1 << 1,
  1159. SignedDst = 1 << 2,
  1160. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  1161. ScalarSxZx = Scalar | SignedSrc,
  1162. ScalarZxZx = Scalar,
  1163. VectorSxSx = SignedSrc | SignedDst,
  1164. VectorSxZx = SignedSrc,
  1165. VectorZxZx = 0
  1166. }
  1167. public static void EmitSaturatingNarrowOp(ArmEmitterContext context, SaturatingNarrowFlags flags)
  1168. {
  1169. OpCodeSimd op = (OpCodeSimd)context.CurrOp;
  1170. bool scalar = (flags & SaturatingNarrowFlags.Scalar) != 0;
  1171. bool signedSrc = (flags & SaturatingNarrowFlags.SignedSrc) != 0;
  1172. bool signedDst = (flags & SaturatingNarrowFlags.SignedDst) != 0;
  1173. int elems = !scalar ? 8 >> op.Size : 1;
  1174. int part = !scalar && (op.RegisterSize == RegisterSize.Simd128) ? elems : 0;
  1175. Operand d = GetVec(op.Rd);
  1176. Operand res = part == 0 ? context.VectorZero() : context.Copy(d);
  1177. for (int index = 0; index < elems; index++)
  1178. {
  1179. Operand ne = EmitVectorExtract(context, op.Rn, index, op.Size + 1, signedSrc);
  1180. Operand temp = signedSrc
  1181. ? EmitSignedSrcSatQ(context, ne, op.Size, signedDst)
  1182. : EmitUnsignedSrcSatQ(context, ne, op.Size, signedDst);
  1183. res = EmitVectorInsert(context, res, temp, part + index, op.Size);
  1184. }
  1185. context.Copy(d, res);
  1186. }
  1187. // long SignedSignSatQ(long op, int size);
  1188. public static Operand EmitSignedSignSatQ(ArmEmitterContext context, Operand op, int size)
  1189. {
  1190. int eSize = 8 << size;
  1191. Debug.Assert(op.Type == OperandType.I64);
  1192. Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
  1193. Operand lbl1 = Label();
  1194. Operand lblEnd = Label();
  1195. Operand zeroL = Const(0L);
  1196. Operand maxT = Const((1L << (eSize - 1)) - 1L);
  1197. Operand minT = Const(-(1L << (eSize - 1)));
  1198. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), zeroL);
  1199. context.BranchIf(lbl1, op, zeroL, Comparison.LessOrEqual);
  1200. context.Copy(res, maxT);
  1201. SetFpFlag(context, FPState.QcFlag, Const(1));
  1202. context.Branch(lblEnd);
  1203. context.MarkLabel(lbl1);
  1204. context.BranchIf(lblEnd, op, zeroL, Comparison.GreaterOrEqual);
  1205. context.Copy(res, minT);
  1206. SetFpFlag(context, FPState.QcFlag, Const(1));
  1207. context.Branch(lblEnd);
  1208. context.MarkLabel(lblEnd);
  1209. return res;
  1210. }
  1211. // private static ulong UnsignedSignSatQ(ulong op, int size);
  1212. public static Operand EmitUnsignedSignSatQ(ArmEmitterContext context, Operand op, int size)
  1213. {
  1214. int eSize = 8 << size;
  1215. Debug.Assert(op.Type == OperandType.I64);
  1216. Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
  1217. Operand lblEnd = Label();
  1218. Operand zeroUL = Const(0UL);
  1219. Operand maxT = Const(ulong.MaxValue >> (64 - eSize));
  1220. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), zeroUL);
  1221. context.BranchIf(lblEnd, op, zeroUL, Comparison.LessOrEqualUI);
  1222. context.Copy(res, maxT);
  1223. SetFpFlag(context, FPState.QcFlag, Const(1));
  1224. context.Branch(lblEnd);
  1225. context.MarkLabel(lblEnd);
  1226. return res;
  1227. }
  1228. // TSrc (16bit, 32bit, 64bit; signed) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  1229. // long SignedSrcSignedDstSatQ(long op, int size); ulong SignedSrcUnsignedDstSatQ(long op, int size);
  1230. public static Operand EmitSignedSrcSatQ(ArmEmitterContext context, Operand op, int sizeDst, bool signedDst)
  1231. {
  1232. int eSizeDst = 8 << sizeDst;
  1233. Debug.Assert(op.Type == OperandType.I64);
  1234. Debug.Assert(eSizeDst == 8 || eSizeDst == 16 || eSizeDst == 32);
  1235. Operand lbl1 = Label();
  1236. Operand lblEnd = Label();
  1237. Operand maxT = signedDst ? Const((1L << (eSizeDst - 1)) - 1L) : Const((1UL << eSizeDst) - 1UL);
  1238. Operand minT = signedDst ? Const(-(1L << (eSizeDst - 1))) : Const(0UL);
  1239. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), op);
  1240. context.BranchIf(lbl1, op, maxT, Comparison.LessOrEqual);
  1241. context.Copy(res, maxT);
  1242. SetFpFlag(context, FPState.QcFlag, Const(1));
  1243. context.Branch(lblEnd);
  1244. context.MarkLabel(lbl1);
  1245. context.BranchIf(lblEnd, op, minT, Comparison.GreaterOrEqual);
  1246. context.Copy(res, minT);
  1247. SetFpFlag(context, FPState.QcFlag, Const(1));
  1248. context.Branch(lblEnd);
  1249. context.MarkLabel(lblEnd);
  1250. return res;
  1251. }
  1252. // TSrc (16bit, 32bit, 64bit; unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  1253. // long UnsignedSrcSignedDstSatQ(ulong op, int size); ulong UnsignedSrcUnsignedDstSatQ(ulong op, int size);
  1254. public static Operand EmitUnsignedSrcSatQ(ArmEmitterContext context, Operand op, int sizeDst, bool signedDst)
  1255. {
  1256. int eSizeDst = 8 << sizeDst;
  1257. Debug.Assert(op.Type == OperandType.I64);
  1258. Debug.Assert(eSizeDst == 8 || eSizeDst == 16 || eSizeDst == 32);
  1259. Operand lblEnd = Label();
  1260. Operand maxT = signedDst ? Const((1L << (eSizeDst - 1)) - 1L) : Const((1UL << eSizeDst) - 1UL);
  1261. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), op);
  1262. context.BranchIf(lblEnd, op, maxT, Comparison.LessOrEqualUI);
  1263. context.Copy(res, maxT);
  1264. SetFpFlag(context, FPState.QcFlag, Const(1));
  1265. context.Branch(lblEnd);
  1266. context.MarkLabel(lblEnd);
  1267. return res;
  1268. }
  1269. // long UnarySignedSatQAbsOrNeg(long op);
  1270. private static Operand EmitUnarySignedSatQAbsOrNeg(ArmEmitterContext context, Operand op)
  1271. {
  1272. Debug.Assert(op.Type == OperandType.I64);
  1273. Operand lblEnd = Label();
  1274. Operand minL = Const(long.MinValue);
  1275. Operand maxL = Const(long.MaxValue);
  1276. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), op);
  1277. context.BranchIf(lblEnd, op, minL, Comparison.NotEqual);
  1278. context.Copy(res, maxL);
  1279. SetFpFlag(context, FPState.QcFlag, Const(1));
  1280. context.Branch(lblEnd);
  1281. context.MarkLabel(lblEnd);
  1282. return res;
  1283. }
  1284. // long BinarySignedSatQAdd(long op1, long op2);
  1285. public static Operand EmitBinarySignedSatQAdd(ArmEmitterContext context, Operand op1, Operand op2)
  1286. {
  1287. Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
  1288. Operand lblEnd = Label();
  1289. Operand minL = Const(long.MinValue);
  1290. Operand maxL = Const(long.MaxValue);
  1291. Operand zeroL = Const(0L);
  1292. Operand add = context.Add(op1, op2);
  1293. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), add);
  1294. Operand left = context.BitwiseNot(context.BitwiseExclusiveOr(op1, op2));
  1295. Operand right = context.BitwiseExclusiveOr(op1, add);
  1296. context.BranchIf(lblEnd, context.BitwiseAnd(left, right), zeroL, Comparison.GreaterOrEqual);
  1297. Operand isPositive = context.ICompareGreaterOrEqual(op1, zeroL);
  1298. context.Copy(res, context.ConditionalSelect(isPositive, maxL, minL));
  1299. SetFpFlag(context, FPState.QcFlag, Const(1));
  1300. context.Branch(lblEnd);
  1301. context.MarkLabel(lblEnd);
  1302. return res;
  1303. }
  1304. // ulong BinaryUnsignedSatQAdd(ulong op1, ulong op2);
  1305. public static Operand EmitBinaryUnsignedSatQAdd(ArmEmitterContext context, Operand op1, Operand op2)
  1306. {
  1307. Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
  1308. Operand lblEnd = Label();
  1309. Operand maxUL = Const(ulong.MaxValue);
  1310. Operand add = context.Add(op1, op2);
  1311. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), add);
  1312. context.BranchIf(lblEnd, add, op1, Comparison.GreaterOrEqualUI);
  1313. context.Copy(res, maxUL);
  1314. SetFpFlag(context, FPState.QcFlag, Const(1));
  1315. context.Branch(lblEnd);
  1316. context.MarkLabel(lblEnd);
  1317. return res;
  1318. }
  1319. // long BinarySignedSatQSub(long op1, long op2);
  1320. public static Operand EmitBinarySignedSatQSub(ArmEmitterContext context, Operand op1, Operand op2)
  1321. {
  1322. Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
  1323. Operand lblEnd = Label();
  1324. Operand minL = Const(long.MinValue);
  1325. Operand maxL = Const(long.MaxValue);
  1326. Operand zeroL = Const(0L);
  1327. Operand sub = context.Subtract(op1, op2);
  1328. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), sub);
  1329. Operand left = context.BitwiseExclusiveOr(op1, op2);
  1330. Operand right = context.BitwiseExclusiveOr(op1, sub);
  1331. context.BranchIf(lblEnd, context.BitwiseAnd(left, right), zeroL, Comparison.GreaterOrEqual);
  1332. Operand isPositive = context.ICompareGreaterOrEqual(op1, zeroL);
  1333. context.Copy(res, context.ConditionalSelect(isPositive, maxL, minL));
  1334. SetFpFlag(context, FPState.QcFlag, Const(1));
  1335. context.Branch(lblEnd);
  1336. context.MarkLabel(lblEnd);
  1337. return res;
  1338. }
  1339. // ulong BinaryUnsignedSatQSub(ulong op1, ulong op2);
  1340. public static Operand EmitBinaryUnsignedSatQSub(ArmEmitterContext context, Operand op1, Operand op2)
  1341. {
  1342. Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
  1343. Operand lblEnd = Label();
  1344. Operand zeroL = Const(0L);
  1345. Operand sub = context.Subtract(op1, op2);
  1346. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), sub);
  1347. context.BranchIf(lblEnd, op1, op2, Comparison.GreaterOrEqualUI);
  1348. context.Copy(res, zeroL);
  1349. SetFpFlag(context, FPState.QcFlag, Const(1));
  1350. context.Branch(lblEnd);
  1351. context.MarkLabel(lblEnd);
  1352. return res;
  1353. }
  1354. // long BinarySignedSatQAcc(ulong op1, long op2);
  1355. private static Operand EmitBinarySignedSatQAcc(ArmEmitterContext context, Operand op1, Operand op2)
  1356. {
  1357. Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
  1358. Operand lbl1 = Label();
  1359. Operand lbl2 = Label();
  1360. Operand lblEnd = Label();
  1361. Operand maxL = Const(long.MaxValue);
  1362. Operand zeroL = Const(0L);
  1363. Operand add = context.Add(op1, op2);
  1364. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), add);
  1365. context.BranchIf(lbl1, op1, maxL, Comparison.GreaterUI);
  1366. Operand notOp2AndRes = context.BitwiseAnd(context.BitwiseNot(op2), add);
  1367. context.BranchIf(lblEnd, notOp2AndRes, zeroL, Comparison.GreaterOrEqual);
  1368. context.Copy(res, maxL);
  1369. SetFpFlag(context, FPState.QcFlag, Const(1));
  1370. context.Branch(lblEnd);
  1371. context.MarkLabel(lbl1);
  1372. context.BranchIf(lbl2, op2, zeroL, Comparison.Less);
  1373. context.Copy(res, maxL);
  1374. SetFpFlag(context, FPState.QcFlag, Const(1));
  1375. context.Branch(lblEnd);
  1376. context.MarkLabel(lbl2);
  1377. context.BranchIf(lblEnd, add, maxL, Comparison.LessOrEqualUI);
  1378. context.Copy(res, maxL);
  1379. SetFpFlag(context, FPState.QcFlag, Const(1));
  1380. context.Branch(lblEnd);
  1381. context.MarkLabel(lblEnd);
  1382. return res;
  1383. }
  1384. // ulong BinaryUnsignedSatQAcc(long op1, ulong op2);
  1385. private static Operand EmitBinaryUnsignedSatQAcc(ArmEmitterContext context, Operand op1, Operand op2)
  1386. {
  1387. Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
  1388. Operand lbl1 = Label();
  1389. Operand lblEnd = Label();
  1390. Operand maxUL = Const(ulong.MaxValue);
  1391. Operand maxL = Const(long.MaxValue);
  1392. Operand zeroL = Const(0L);
  1393. Operand add = context.Add(op1, op2);
  1394. Operand res = context.Copy(context.AllocateLocal(OperandType.I64), add);
  1395. context.BranchIf(lbl1, op1, zeroL, Comparison.Less);
  1396. context.BranchIf(lblEnd, add, op1, Comparison.GreaterOrEqualUI);
  1397. context.Copy(res, maxUL);
  1398. SetFpFlag(context, FPState.QcFlag, Const(1));
  1399. context.Branch(lblEnd);
  1400. context.MarkLabel(lbl1);
  1401. context.BranchIf(lblEnd, op2, maxL, Comparison.GreaterUI);
  1402. context.BranchIf(lblEnd, add, zeroL, Comparison.GreaterOrEqual);
  1403. context.Copy(res, zeroL);
  1404. SetFpFlag(context, FPState.QcFlag, Const(1));
  1405. context.Branch(lblEnd);
  1406. context.MarkLabel(lblEnd);
  1407. return res;
  1408. }
  1409. public static Operand EmitFloatAbs(ArmEmitterContext context, Operand value, bool single, bool vector)
  1410. {
  1411. Operand mask;
  1412. if (single)
  1413. {
  1414. mask = vector ? X86GetAllElements(context, -0f) : X86GetScalar(context, -0f);
  1415. }
  1416. else
  1417. {
  1418. mask = vector ? X86GetAllElements(context, -0d) : X86GetScalar(context, -0d);
  1419. }
  1420. return context.AddIntrinsic(single ? Intrinsic.X86Andnps : Intrinsic.X86Andnpd, mask, value);
  1421. }
  1422. public static Operand EmitVectorExtractSx(ArmEmitterContext context, int reg, int index, int size)
  1423. {
  1424. return EmitVectorExtract(context, reg, index, size, true);
  1425. }
  1426. public static Operand EmitVectorExtractZx(ArmEmitterContext context, int reg, int index, int size)
  1427. {
  1428. return EmitVectorExtract(context, reg, index, size, false);
  1429. }
  1430. public static Operand EmitVectorExtract(ArmEmitterContext context, int reg, int index, int size, bool signed)
  1431. {
  1432. ThrowIfInvalid(index, size);
  1433. Operand res = default;
  1434. switch (size)
  1435. {
  1436. case 0:
  1437. res = context.VectorExtract8(GetVec(reg), index);
  1438. break;
  1439. case 1:
  1440. res = context.VectorExtract16(GetVec(reg), index);
  1441. break;
  1442. case 2:
  1443. res = context.VectorExtract(OperandType.I32, GetVec(reg), index);
  1444. break;
  1445. case 3:
  1446. res = context.VectorExtract(OperandType.I64, GetVec(reg), index);
  1447. break;
  1448. }
  1449. if (signed)
  1450. {
  1451. switch (size)
  1452. {
  1453. case 0: res = context.SignExtend8 (OperandType.I64, res); break;
  1454. case 1: res = context.SignExtend16(OperandType.I64, res); break;
  1455. case 2: res = context.SignExtend32(OperandType.I64, res); break;
  1456. }
  1457. }
  1458. else
  1459. {
  1460. switch (size)
  1461. {
  1462. case 0: res = context.ZeroExtend8 (OperandType.I64, res); break;
  1463. case 1: res = context.ZeroExtend16(OperandType.I64, res); break;
  1464. case 2: res = context.ZeroExtend32(OperandType.I64, res); break;
  1465. }
  1466. }
  1467. return res;
  1468. }
  1469. public static Operand EmitVectorInsert(ArmEmitterContext context, Operand vector, Operand value, int index, int size)
  1470. {
  1471. ThrowIfInvalid(index, size);
  1472. if (size < 3 && value.Type == OperandType.I64)
  1473. {
  1474. value = context.ConvertI64ToI32(value);
  1475. }
  1476. switch (size)
  1477. {
  1478. case 0: vector = context.VectorInsert8 (vector, value, index); break;
  1479. case 1: vector = context.VectorInsert16(vector, value, index); break;
  1480. case 2: vector = context.VectorInsert (vector, value, index); break;
  1481. case 3: vector = context.VectorInsert (vector, value, index); break;
  1482. }
  1483. return vector;
  1484. }
  1485. public static void ThrowIfInvalid(int index, int size)
  1486. {
  1487. if ((uint)size > 3u)
  1488. {
  1489. throw new ArgumentOutOfRangeException(nameof(size));
  1490. }
  1491. if ((uint)index >= 16u >> size)
  1492. {
  1493. throw new ArgumentOutOfRangeException(nameof(index));
  1494. }
  1495. }
  1496. }
  1497. }