AInstEmitSimdShift.cs 8.7 KB

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  1. using ChocolArm64.Decoder;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection.Emit;
  6. using static ChocolArm64.Instruction.AInstEmitSimdHelper;
  7. namespace ChocolArm64.Instruction
  8. {
  9. static partial class AInstEmit
  10. {
  11. public static void Shl_S(AILEmitterCtx Context)
  12. {
  13. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  14. EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size);
  15. Context.EmitLdc_I4(GetImmShl(Op));
  16. Context.Emit(OpCodes.Shl);
  17. EmitScalarSet(Context, Op.Rd, Op.Size);
  18. }
  19. public static void Shl_V(AILEmitterCtx Context)
  20. {
  21. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  22. int Shift = Op.Imm - (8 << Op.Size);
  23. EmitVectorShImmBinaryZx(Context, () => Context.Emit(OpCodes.Shl), Shift);
  24. }
  25. public static void Shrn_V(AILEmitterCtx Context)
  26. {
  27. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  28. int Shift = (8 << (Op.Size + 1)) - Op.Imm;
  29. EmitVectorShImmNarrowBinaryZx(Context, () => Context.Emit(OpCodes.Shr_Un), Shift);
  30. }
  31. public static void Sshl_V(AILEmitterCtx Context)
  32. {
  33. EmitVectorShl(Context, Signed: true);
  34. }
  35. public static void Sshll_V(AILEmitterCtx Context)
  36. {
  37. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  38. int Shift = Op.Imm - (8 << Op.Size);
  39. EmitVectorShImmWidenBinarySx(Context, () => Context.Emit(OpCodes.Shl), Shift);
  40. }
  41. public static void Sshr_S(AILEmitterCtx Context)
  42. {
  43. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  44. EmitVectorExtractSx(Context, Op.Rn, 0, Op.Size);
  45. Context.EmitLdc_I4(GetImmShr(Op));
  46. Context.Emit(OpCodes.Shr);
  47. EmitScalarSet(Context, Op.Rd, Op.Size);
  48. }
  49. public static void Sshr_V(AILEmitterCtx Context)
  50. {
  51. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  52. int Shift = (8 << (Op.Size + 1)) - Op.Imm;
  53. EmitVectorShImmBinarySx(Context, () => Context.Emit(OpCodes.Shr), Shift);
  54. }
  55. public static void Ushl_V(AILEmitterCtx Context)
  56. {
  57. EmitVectorShl(Context, Signed: false);
  58. }
  59. public static void Ushll_V(AILEmitterCtx Context)
  60. {
  61. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  62. int Shift = Op.Imm - (8 << Op.Size);
  63. EmitVectorShImmWidenBinaryZx(Context, () => Context.Emit(OpCodes.Shl), Shift);
  64. }
  65. public static void Ushr_S(AILEmitterCtx Context)
  66. {
  67. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  68. EmitScalarUnaryOpZx(Context, () =>
  69. {
  70. Context.EmitLdc_I4(GetImmShr(Op));
  71. Context.Emit(OpCodes.Shr_Un);
  72. });
  73. }
  74. public static void Ushr_V(AILEmitterCtx Context)
  75. {
  76. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  77. EmitVectorUnaryOpZx(Context, () =>
  78. {
  79. Context.EmitLdc_I4(GetImmShr(Op));
  80. Context.Emit(OpCodes.Shr_Un);
  81. });
  82. }
  83. public static void Usra_V(AILEmitterCtx Context)
  84. {
  85. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  86. Action Emit = () =>
  87. {
  88. Context.EmitLdc_I4(GetImmShr(Op));
  89. Context.Emit(OpCodes.Shr_Un);
  90. Context.Emit(OpCodes.Add);
  91. };
  92. EmitVectorOp(Context, Emit, OperFlags.RdRn, Signed: false);
  93. }
  94. private static void EmitVectorShl(AILEmitterCtx Context, bool Signed)
  95. {
  96. //This instruction shifts the value on vector A by the number of bits
  97. //specified on the signed, lower 8 bits of vector B. If the shift value
  98. //is greater or equal to the data size of each lane, then the result is zero.
  99. //Additionally, negative shifts produces right shifts by the negated shift value.
  100. AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
  101. int MaxShift = 8 << Op.Size;
  102. Action Emit = () =>
  103. {
  104. AILLabel LblShl = new AILLabel();
  105. AILLabel LblZero = new AILLabel();
  106. AILLabel LblEnd = new AILLabel();
  107. void EmitShift(OpCode ILOp)
  108. {
  109. Context.Emit(OpCodes.Dup);
  110. Context.EmitLdc_I4(MaxShift);
  111. Context.Emit(OpCodes.Bge_S, LblZero);
  112. Context.Emit(ILOp);
  113. Context.Emit(OpCodes.Br_S, LblEnd);
  114. }
  115. Context.Emit(OpCodes.Conv_I1);
  116. Context.Emit(OpCodes.Dup);
  117. Context.EmitLdc_I4(0);
  118. Context.Emit(OpCodes.Bge_S, LblShl);
  119. Context.Emit(OpCodes.Neg);
  120. EmitShift(Signed
  121. ? OpCodes.Shr
  122. : OpCodes.Shr_Un);
  123. Context.MarkLabel(LblShl);
  124. EmitShift(OpCodes.Shl);
  125. Context.MarkLabel(LblZero);
  126. Context.Emit(OpCodes.Pop);
  127. Context.Emit(OpCodes.Pop);
  128. Context.EmitLdc_I8(0);
  129. Context.MarkLabel(LblEnd);
  130. };
  131. if (Signed)
  132. {
  133. EmitVectorBinaryOpSx(Context, Emit);
  134. }
  135. else
  136. {
  137. EmitVectorBinaryOpZx(Context, Emit);
  138. }
  139. }
  140. private static void EmitVectorShImmBinarySx(AILEmitterCtx Context, Action Emit, int Imm)
  141. {
  142. EmitVectorShImmBinaryOp(Context, Emit, Imm, true);
  143. }
  144. private static void EmitVectorShImmBinaryZx(AILEmitterCtx Context, Action Emit, int Imm)
  145. {
  146. EmitVectorShImmBinaryOp(Context, Emit, Imm, false);
  147. }
  148. private static void EmitVectorShImmBinaryOp(AILEmitterCtx Context, Action Emit, int Imm, bool Signed)
  149. {
  150. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  151. int Bytes = Context.CurrOp.GetBitsCount() >> 3;
  152. for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
  153. {
  154. EmitVectorExtract(Context, Op.Rn, Index, Op.Size, Signed);
  155. Context.EmitLdc_I4(Imm);
  156. Emit();
  157. EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
  158. }
  159. if (Op.RegisterSize == ARegisterSize.SIMD64)
  160. {
  161. EmitVectorZeroUpper(Context, Op.Rd);
  162. }
  163. }
  164. private static void EmitVectorShImmNarrowBinarySx(AILEmitterCtx Context, Action Emit, int Imm)
  165. {
  166. EmitVectorShImmNarrowBinaryOp(Context, Emit, Imm, true);
  167. }
  168. private static void EmitVectorShImmNarrowBinaryZx(AILEmitterCtx Context, Action Emit, int Imm)
  169. {
  170. EmitVectorShImmNarrowBinaryOp(Context, Emit, Imm, false);
  171. }
  172. private static void EmitVectorShImmNarrowBinaryOp(AILEmitterCtx Context, Action Emit, int Imm, bool Signed)
  173. {
  174. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  175. int Elems = 8 >> Op.Size;
  176. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  177. for (int Index = 0; Index < Elems; Index++)
  178. {
  179. EmitVectorExtract(Context, Op.Rn, Index, Op.Size + 1, Signed);
  180. Context.EmitLdc_I4(Imm);
  181. Emit();
  182. EmitVectorInsert(Context, Op.Rd, Part + Index, Op.Size);
  183. }
  184. if (Part == 0)
  185. {
  186. EmitVectorZeroUpper(Context, Op.Rd);
  187. }
  188. }
  189. private static void EmitVectorShImmWidenBinarySx(AILEmitterCtx Context, Action Emit, int Imm)
  190. {
  191. EmitVectorShImmWidenBinaryOp(Context, Emit, Imm, true);
  192. }
  193. private static void EmitVectorShImmWidenBinaryZx(AILEmitterCtx Context, Action Emit, int Imm)
  194. {
  195. EmitVectorShImmWidenBinaryOp(Context, Emit, Imm, false);
  196. }
  197. private static void EmitVectorShImmWidenBinaryOp(AILEmitterCtx Context, Action Emit, int Imm, bool Signed)
  198. {
  199. AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
  200. int Elems = 8 >> Op.Size;
  201. int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
  202. for (int Index = 0; Index < Elems; Index++)
  203. {
  204. EmitVectorExtract(Context, Op.Rn, Part + Index, Op.Size, Signed);
  205. Context.EmitLdc_I4(Imm);
  206. Emit();
  207. EmitVectorInsertTmp(Context, Index, Op.Size + 1);
  208. }
  209. Context.EmitLdvectmp();
  210. Context.EmitStvec(Op.Rd);
  211. }
  212. }
  213. }