InstEmitMemoryHelper.cs 18 KB

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  1. using ARMeilleure.Decoders;
  2. using ARMeilleure.IntermediateRepresentation;
  3. using ARMeilleure.Translation;
  4. using ARMeilleure.Translation.PTC;
  5. using System;
  6. using System.Reflection;
  7. using static ARMeilleure.Instructions.InstEmitHelper;
  8. using static ARMeilleure.IntermediateRepresentation.OperandHelper;
  9. namespace ARMeilleure.Instructions
  10. {
  11. static class InstEmitMemoryHelper
  12. {
  13. private const int PageBits = 12;
  14. private const int PageMask = (1 << PageBits) - 1;
  15. private enum Extension
  16. {
  17. Zx,
  18. Sx32,
  19. Sx64
  20. }
  21. public static void EmitLoadZx(ArmEmitterContext context, Operand address, int rt, int size)
  22. {
  23. EmitLoad(context, address, Extension.Zx, rt, size);
  24. }
  25. public static void EmitLoadSx32(ArmEmitterContext context, Operand address, int rt, int size)
  26. {
  27. EmitLoad(context, address, Extension.Sx32, rt, size);
  28. }
  29. public static void EmitLoadSx64(ArmEmitterContext context, Operand address, int rt, int size)
  30. {
  31. EmitLoad(context, address, Extension.Sx64, rt, size);
  32. }
  33. private static void EmitLoad(ArmEmitterContext context, Operand address, Extension ext, int rt, int size)
  34. {
  35. bool isSimd = IsSimd(context);
  36. if ((uint)size > (isSimd ? 4 : 3))
  37. {
  38. throw new ArgumentOutOfRangeException(nameof(size));
  39. }
  40. if (isSimd)
  41. {
  42. EmitReadVector(context, address, context.VectorZero(), rt, 0, size);
  43. }
  44. else
  45. {
  46. EmitReadInt(context, address, rt, size);
  47. }
  48. if (!isSimd && !(context.CurrOp is OpCode32 && rt == State.RegisterAlias.Aarch32Pc))
  49. {
  50. Operand value = GetInt(context, rt);
  51. if (ext == Extension.Sx32 || ext == Extension.Sx64)
  52. {
  53. OperandType destType = ext == Extension.Sx64 ? OperandType.I64 : OperandType.I32;
  54. switch (size)
  55. {
  56. case 0: value = context.SignExtend8 (destType, value); break;
  57. case 1: value = context.SignExtend16(destType, value); break;
  58. case 2: value = context.SignExtend32(destType, value); break;
  59. }
  60. }
  61. SetInt(context, rt, value);
  62. }
  63. }
  64. public static void EmitLoadSimd(
  65. ArmEmitterContext context,
  66. Operand address,
  67. Operand vector,
  68. int rt,
  69. int elem,
  70. int size)
  71. {
  72. EmitReadVector(context, address, vector, rt, elem, size);
  73. }
  74. public static void EmitStore(ArmEmitterContext context, Operand address, int rt, int size)
  75. {
  76. bool isSimd = IsSimd(context);
  77. if ((uint)size > (isSimd ? 4 : 3))
  78. {
  79. throw new ArgumentOutOfRangeException(nameof(size));
  80. }
  81. if (isSimd)
  82. {
  83. EmitWriteVector(context, address, rt, 0, size);
  84. }
  85. else
  86. {
  87. EmitWriteInt(context, address, rt, size);
  88. }
  89. }
  90. public static void EmitStoreSimd(
  91. ArmEmitterContext context,
  92. Operand address,
  93. int rt,
  94. int elem,
  95. int size)
  96. {
  97. EmitWriteVector(context, address, rt, elem, size);
  98. }
  99. private static bool IsSimd(ArmEmitterContext context)
  100. {
  101. return context.CurrOp is IOpCodeSimd &&
  102. !(context.CurrOp is OpCodeSimdMemMs ||
  103. context.CurrOp is OpCodeSimdMemSs);
  104. }
  105. private static void EmitReadInt(ArmEmitterContext context, Operand address, int rt, int size)
  106. {
  107. Operand isUnalignedAddr = EmitAddressCheck(context, address, size);
  108. Operand lblFastPath = Label();
  109. Operand lblSlowPath = Label();
  110. Operand lblEnd = Label();
  111. context.BranchIfFalse(lblFastPath, isUnalignedAddr);
  112. context.MarkLabel(lblSlowPath);
  113. EmitReadIntFallback(context, address, rt, size);
  114. context.Branch(lblEnd);
  115. context.MarkLabel(lblFastPath);
  116. Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath);
  117. Operand value = null;
  118. switch (size)
  119. {
  120. case 0: value = context.Load8 (physAddr); break;
  121. case 1: value = context.Load16(physAddr); break;
  122. case 2: value = context.Load (OperandType.I32, physAddr); break;
  123. case 3: value = context.Load (OperandType.I64, physAddr); break;
  124. }
  125. SetInt(context, rt, value);
  126. context.MarkLabel(lblEnd);
  127. }
  128. private static void EmitReadVector(
  129. ArmEmitterContext context,
  130. Operand address,
  131. Operand vector,
  132. int rt,
  133. int elem,
  134. int size)
  135. {
  136. Operand isUnalignedAddr = EmitAddressCheck(context, address, size);
  137. Operand lblFastPath = Label();
  138. Operand lblSlowPath = Label();
  139. Operand lblEnd = Label();
  140. context.BranchIfFalse(lblFastPath, isUnalignedAddr);
  141. context.MarkLabel(lblSlowPath);
  142. EmitReadVectorFallback(context, address, vector, rt, elem, size);
  143. context.Branch(lblEnd);
  144. context.MarkLabel(lblFastPath);
  145. Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath);
  146. Operand value = null;
  147. switch (size)
  148. {
  149. case 0: value = context.VectorInsert8 (vector, context.Load8(physAddr), elem); break;
  150. case 1: value = context.VectorInsert16(vector, context.Load16(physAddr), elem); break;
  151. case 2: value = context.VectorInsert (vector, context.Load(OperandType.I32, physAddr), elem); break;
  152. case 3: value = context.VectorInsert (vector, context.Load(OperandType.I64, physAddr), elem); break;
  153. case 4: value = context.Load (OperandType.V128, physAddr); break;
  154. }
  155. context.Copy(GetVec(rt), value);
  156. context.MarkLabel(lblEnd);
  157. }
  158. private static Operand VectorCreate(ArmEmitterContext context, Operand value)
  159. {
  160. return context.VectorInsert(context.VectorZero(), value, 0);
  161. }
  162. private static void EmitWriteInt(ArmEmitterContext context, Operand address, int rt, int size)
  163. {
  164. Operand isUnalignedAddr = EmitAddressCheck(context, address, size);
  165. Operand lblFastPath = Label();
  166. Operand lblSlowPath = Label();
  167. Operand lblEnd = Label();
  168. context.BranchIfFalse(lblFastPath, isUnalignedAddr);
  169. context.MarkLabel(lblSlowPath);
  170. EmitWriteIntFallback(context, address, rt, size);
  171. context.Branch(lblEnd);
  172. context.MarkLabel(lblFastPath);
  173. Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath);
  174. Operand value = GetInt(context, rt);
  175. if (size < 3 && value.Type == OperandType.I64)
  176. {
  177. value = context.ConvertI64ToI32(value);
  178. }
  179. switch (size)
  180. {
  181. case 0: context.Store8 (physAddr, value); break;
  182. case 1: context.Store16(physAddr, value); break;
  183. case 2: context.Store (physAddr, value); break;
  184. case 3: context.Store (physAddr, value); break;
  185. }
  186. context.MarkLabel(lblEnd);
  187. }
  188. private static void EmitWriteVector(
  189. ArmEmitterContext context,
  190. Operand address,
  191. int rt,
  192. int elem,
  193. int size)
  194. {
  195. Operand isUnalignedAddr = EmitAddressCheck(context, address, size);
  196. Operand lblFastPath = Label();
  197. Operand lblSlowPath = Label();
  198. Operand lblEnd = Label();
  199. context.BranchIfFalse(lblFastPath, isUnalignedAddr);
  200. context.MarkLabel(lblSlowPath);
  201. EmitWriteVectorFallback(context, address, rt, elem, size);
  202. context.Branch(lblEnd);
  203. context.MarkLabel(lblFastPath);
  204. Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath);
  205. Operand value = GetVec(rt);
  206. switch (size)
  207. {
  208. case 0: context.Store8 (physAddr, context.VectorExtract8(value, elem)); break;
  209. case 1: context.Store16(physAddr, context.VectorExtract16(value, elem)); break;
  210. case 2: context.Store (physAddr, context.VectorExtract(OperandType.FP32, value, elem)); break;
  211. case 3: context.Store (physAddr, context.VectorExtract(OperandType.FP64, value, elem)); break;
  212. case 4: context.Store (physAddr, value); break;
  213. }
  214. context.MarkLabel(lblEnd);
  215. }
  216. private static Operand EmitAddressCheck(ArmEmitterContext context, Operand address, int size)
  217. {
  218. ulong addressCheckMask = ~((1UL << context.Memory.AddressSpaceBits) - 1);
  219. addressCheckMask |= (1u << size) - 1;
  220. return context.BitwiseAnd(address, Const(address.Type, (long)addressCheckMask));
  221. }
  222. private static Operand EmitPtPointerLoad(ArmEmitterContext context, Operand address, Operand lblSlowPath)
  223. {
  224. int ptLevelBits = context.Memory.AddressSpaceBits - 12; // 12 = Number of page bits.
  225. int ptLevelSize = 1 << ptLevelBits;
  226. int ptLevelMask = ptLevelSize - 1;
  227. Operand pte = Ptc.State == PtcState.Disabled
  228. ? Const(context.Memory.PageTablePointer.ToInt64())
  229. : Const(context.Memory.PageTablePointer.ToInt64(), true, Ptc.PageTablePointerIndex);
  230. int bit = PageBits;
  231. do
  232. {
  233. Operand addrPart = context.ShiftRightUI(address, Const(bit));
  234. bit += ptLevelBits;
  235. if (bit < context.Memory.AddressSpaceBits)
  236. {
  237. addrPart = context.BitwiseAnd(addrPart, Const(addrPart.Type, ptLevelMask));
  238. }
  239. Operand pteOffset = context.ShiftLeft(addrPart, Const(3));
  240. if (pteOffset.Type == OperandType.I32)
  241. {
  242. pteOffset = context.ZeroExtend32(OperandType.I64, pteOffset);
  243. }
  244. Operand pteAddress = context.Add(pte, pteOffset);
  245. pte = context.Load(OperandType.I64, pteAddress);
  246. }
  247. while (bit < context.Memory.AddressSpaceBits);
  248. context.BranchIfTrue(lblSlowPath, context.ICompareLess(pte, Const(0L)));
  249. Operand pageOffset = context.BitwiseAnd(address, Const(address.Type, PageMask));
  250. if (pageOffset.Type == OperandType.I32)
  251. {
  252. pageOffset = context.ZeroExtend32(OperandType.I64, pageOffset);
  253. }
  254. return context.Add(pte, pageOffset);
  255. }
  256. private static void EmitReadIntFallback(ArmEmitterContext context, Operand address, int rt, int size)
  257. {
  258. MethodInfo info = null;
  259. switch (size)
  260. {
  261. case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadByte)); break;
  262. case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt16)); break;
  263. case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt32)); break;
  264. case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt64)); break;
  265. }
  266. SetInt(context, rt, context.Call(info, address));
  267. }
  268. private static void EmitReadVectorFallback(
  269. ArmEmitterContext context,
  270. Operand address,
  271. Operand vector,
  272. int rt,
  273. int elem,
  274. int size)
  275. {
  276. MethodInfo info = null;
  277. switch (size)
  278. {
  279. case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadByte)); break;
  280. case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt16)); break;
  281. case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt32)); break;
  282. case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt64)); break;
  283. case 4: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadVector128)); break;
  284. }
  285. Operand value = context.Call(info, address);
  286. switch (size)
  287. {
  288. case 0: value = context.VectorInsert8 (vector, value, elem); break;
  289. case 1: value = context.VectorInsert16(vector, value, elem); break;
  290. case 2: value = context.VectorInsert (vector, value, elem); break;
  291. case 3: value = context.VectorInsert (vector, value, elem); break;
  292. }
  293. context.Copy(GetVec(rt), value);
  294. }
  295. private static void EmitWriteIntFallback(ArmEmitterContext context, Operand address, int rt, int size)
  296. {
  297. MethodInfo info = null;
  298. switch (size)
  299. {
  300. case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteByte)); break;
  301. case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt16)); break;
  302. case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt32)); break;
  303. case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt64)); break;
  304. }
  305. Operand value = GetInt(context, rt);
  306. if (size < 3 && value.Type == OperandType.I64)
  307. {
  308. value = context.ConvertI64ToI32(value);
  309. }
  310. context.Call(info, address, value);
  311. }
  312. private static void EmitWriteVectorFallback(
  313. ArmEmitterContext context,
  314. Operand address,
  315. int rt,
  316. int elem,
  317. int size)
  318. {
  319. MethodInfo info = null;
  320. switch (size)
  321. {
  322. case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteByte)); break;
  323. case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt16)); break;
  324. case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt32)); break;
  325. case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt64)); break;
  326. case 4: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteVector128)); break;
  327. }
  328. Operand value = null;
  329. if (size < 4)
  330. {
  331. switch (size)
  332. {
  333. case 0: value = context.VectorExtract8 (GetVec(rt), elem); break;
  334. case 1: value = context.VectorExtract16(GetVec(rt), elem); break;
  335. case 2: value = context.VectorExtract (OperandType.I32, GetVec(rt), elem); break;
  336. case 3: value = context.VectorExtract (OperandType.I64, GetVec(rt), elem); break;
  337. }
  338. }
  339. else
  340. {
  341. value = GetVec(rt);
  342. }
  343. context.Call(info, address, value);
  344. }
  345. private static Operand GetInt(ArmEmitterContext context, int rt)
  346. {
  347. return context.CurrOp is OpCode32 ? GetIntA32(context, rt) : GetIntOrZR(context, rt);
  348. }
  349. private static void SetInt(ArmEmitterContext context, int rt, Operand value)
  350. {
  351. if (context.CurrOp is OpCode32)
  352. {
  353. SetIntA32(context, rt, value);
  354. }
  355. else
  356. {
  357. SetIntOrZR(context, rt, value);
  358. }
  359. }
  360. // ARM32 helpers.
  361. public static Operand GetMemM(ArmEmitterContext context, bool setCarry = true)
  362. {
  363. switch (context.CurrOp)
  364. {
  365. case OpCode32MemRsImm op: return GetMShiftedByImmediate(context, op, setCarry);
  366. case OpCode32MemReg op: return GetIntA32(context, op.Rm);
  367. case OpCode32Mem op: return Const(op.Immediate);
  368. case OpCode32SimdMemImm op: return Const(op.Immediate);
  369. default: throw InvalidOpCodeType(context.CurrOp);
  370. }
  371. }
  372. private static Exception InvalidOpCodeType(OpCode opCode)
  373. {
  374. return new InvalidOperationException($"Invalid OpCode type \"{opCode?.GetType().Name ?? "null"}\".");
  375. }
  376. public static Operand GetMShiftedByImmediate(ArmEmitterContext context, OpCode32MemRsImm op, bool setCarry)
  377. {
  378. Operand m = GetIntA32(context, op.Rm);
  379. int shift = op.Immediate;
  380. if (shift == 0)
  381. {
  382. switch (op.ShiftType)
  383. {
  384. case ShiftType.Lsr: shift = 32; break;
  385. case ShiftType.Asr: shift = 32; break;
  386. case ShiftType.Ror: shift = 1; break;
  387. }
  388. }
  389. if (shift != 0)
  390. {
  391. setCarry &= false;
  392. switch (op.ShiftType)
  393. {
  394. case ShiftType.Lsl: m = InstEmitAluHelper.GetLslC(context, m, setCarry, shift); break;
  395. case ShiftType.Lsr: m = InstEmitAluHelper.GetLsrC(context, m, setCarry, shift); break;
  396. case ShiftType.Asr: m = InstEmitAluHelper.GetAsrC(context, m, setCarry, shift); break;
  397. case ShiftType.Ror:
  398. if (op.Immediate != 0)
  399. {
  400. m = InstEmitAluHelper.GetRorC(context, m, setCarry, shift);
  401. }
  402. else
  403. {
  404. m = InstEmitAluHelper.GetRrxC(context, m, setCarry);
  405. }
  406. break;
  407. }
  408. }
  409. return m;
  410. }
  411. }
  412. }