InstEmitSimdHelper.cs 48 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537
  1. using ChocolArm64.Decoders;
  2. using ChocolArm64.State;
  3. using ChocolArm64.Translation;
  4. using System;
  5. using System.Reflection;
  6. using System.Reflection.Emit;
  7. using System.Runtime.Intrinsics;
  8. using System.Runtime.Intrinsics.X86;
  9. namespace ChocolArm64.Instructions
  10. {
  11. static class InstEmitSimdHelper
  12. {
  13. public static readonly Type[] IntTypesPerSizeLog2 = new Type[]
  14. {
  15. typeof(sbyte),
  16. typeof(short),
  17. typeof(int),
  18. typeof(long)
  19. };
  20. public static readonly Type[] UIntTypesPerSizeLog2 = new Type[]
  21. {
  22. typeof(byte),
  23. typeof(ushort),
  24. typeof(uint),
  25. typeof(ulong)
  26. };
  27. public static readonly Type[] VectorIntTypesPerSizeLog2 = new Type[]
  28. {
  29. typeof(Vector128<sbyte>),
  30. typeof(Vector128<short>),
  31. typeof(Vector128<int>),
  32. typeof(Vector128<long>)
  33. };
  34. public static readonly Type[] VectorUIntTypesPerSizeLog2 = new Type[]
  35. {
  36. typeof(Vector128<byte>),
  37. typeof(Vector128<ushort>),
  38. typeof(Vector128<uint>),
  39. typeof(Vector128<ulong>)
  40. };
  41. [Flags]
  42. public enum OperFlags
  43. {
  44. Rd = 1 << 0,
  45. Rn = 1 << 1,
  46. Rm = 1 << 2,
  47. Ra = 1 << 3,
  48. RnRm = Rn | Rm,
  49. RdRn = Rd | Rn,
  50. RaRnRm = Ra | Rn | Rm,
  51. RdRnRm = Rd | Rn | Rm
  52. }
  53. public static int GetImmShl(OpCodeSimdShImm64 op)
  54. {
  55. return op.Imm - (8 << op.Size);
  56. }
  57. public static int GetImmShr(OpCodeSimdShImm64 op)
  58. {
  59. return (8 << (op.Size + 1)) - op.Imm;
  60. }
  61. public static void EmitSse2Op(ILEmitterCtx context, string name)
  62. {
  63. EmitSseOp(context, name, typeof(Sse2));
  64. }
  65. public static void EmitSse41Op(ILEmitterCtx context, string name)
  66. {
  67. EmitSseOp(context, name, typeof(Sse41));
  68. }
  69. public static void EmitSse42Op(ILEmitterCtx context, string name)
  70. {
  71. EmitSseOp(context, name, typeof(Sse42));
  72. }
  73. private static void EmitSseOp(ILEmitterCtx context, string name, Type type)
  74. {
  75. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  76. context.EmitLdvec(op.Rn);
  77. Type baseType = VectorIntTypesPerSizeLog2[op.Size];
  78. if (op is OpCodeSimdReg64 binOp)
  79. {
  80. context.EmitLdvec(binOp.Rm);
  81. context.EmitCall(type.GetMethod(name, new Type[] { baseType, baseType }));
  82. }
  83. else
  84. {
  85. context.EmitCall(type.GetMethod(name, new Type[] { baseType }));
  86. }
  87. context.EmitStvec(op.Rd);
  88. if (op.RegisterSize == RegisterSize.Simd64)
  89. {
  90. EmitVectorZeroUpper(context, op.Rd);
  91. }
  92. }
  93. public static void EmitScalarSseOrSse2OpF(ILEmitterCtx context, string name)
  94. {
  95. EmitSseOrSse2OpF(context, name, true);
  96. }
  97. public static void EmitVectorSseOrSse2OpF(ILEmitterCtx context, string name)
  98. {
  99. EmitSseOrSse2OpF(context, name, false);
  100. }
  101. public static void EmitSseOrSse2OpF(ILEmitterCtx context, string name, bool scalar)
  102. {
  103. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  104. int sizeF = op.Size & 1;
  105. context.EmitLdvec(op.Rn);
  106. Type type;
  107. Type baseType;
  108. if (sizeF == 0)
  109. {
  110. type = typeof(Sse);
  111. baseType = typeof(Vector128<float>);
  112. }
  113. else /* if (sizeF == 1) */
  114. {
  115. type = typeof(Sse2);
  116. baseType = typeof(Vector128<double>);
  117. }
  118. if (op is OpCodeSimdReg64 binOp)
  119. {
  120. context.EmitLdvec(binOp.Rm);
  121. context.EmitCall(type.GetMethod(name, new Type[] { baseType, baseType }));
  122. }
  123. else
  124. {
  125. context.EmitCall(type.GetMethod(name, new Type[] { baseType }));
  126. }
  127. context.EmitStvec(op.Rd);
  128. if (scalar)
  129. {
  130. if (sizeF == 0)
  131. {
  132. EmitVectorZero32_128(context, op.Rd);
  133. }
  134. else /* if (sizeF == 1) */
  135. {
  136. EmitVectorZeroUpper(context, op.Rd);
  137. }
  138. }
  139. else if (op.RegisterSize == RegisterSize.Simd64)
  140. {
  141. EmitVectorZeroUpper(context, op.Rd);
  142. }
  143. }
  144. public static void EmitUnaryMathCall(ILEmitterCtx context, string name)
  145. {
  146. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  147. int sizeF = op.Size & 1;
  148. MethodInfo mthdInfo;
  149. if (sizeF == 0)
  150. {
  151. mthdInfo = typeof(MathF).GetMethod(name, new Type[] { typeof(float) });
  152. }
  153. else /* if (sizeF == 1) */
  154. {
  155. mthdInfo = typeof(Math).GetMethod(name, new Type[] { typeof(double) });
  156. }
  157. context.EmitCall(mthdInfo);
  158. }
  159. public static void EmitBinaryMathCall(ILEmitterCtx context, string name)
  160. {
  161. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  162. int sizeF = op.Size & 1;
  163. MethodInfo mthdInfo;
  164. if (sizeF == 0)
  165. {
  166. mthdInfo = typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(float) });
  167. }
  168. else /* if (sizeF == 1) */
  169. {
  170. mthdInfo = typeof(Math).GetMethod(name, new Type[] { typeof(double), typeof(double) });
  171. }
  172. context.EmitCall(mthdInfo);
  173. }
  174. public static void EmitRoundMathCall(ILEmitterCtx context, MidpointRounding roundMode)
  175. {
  176. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  177. int sizeF = op.Size & 1;
  178. MethodInfo mthdInfo;
  179. if (sizeF == 0)
  180. {
  181. mthdInfo = typeof(MathF).GetMethod(nameof(MathF.Round), new Type[] { typeof(float), typeof(MidpointRounding) });
  182. }
  183. else /* if (sizeF == 1) */
  184. {
  185. mthdInfo = typeof(Math).GetMethod(nameof(Math.Round), new Type[] { typeof(double), typeof(MidpointRounding) });
  186. }
  187. context.EmitLdc_I4((int)roundMode);
  188. context.EmitCall(mthdInfo);
  189. }
  190. public static void EmitSoftFloatCall(ILEmitterCtx context, string name)
  191. {
  192. IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
  193. int sizeF = op.Size & 1;
  194. Type type = sizeF == 0
  195. ? typeof(SoftFloat32)
  196. : typeof(SoftFloat64);
  197. context.EmitLdarg(TranslatedSub.StateArgIdx);
  198. context.EmitCall(type, name);
  199. }
  200. public static void EmitScalarBinaryOpByElemF(ILEmitterCtx context, Action emit)
  201. {
  202. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  203. EmitScalarOpByElemF(context, emit, op.Index, ternary: false);
  204. }
  205. public static void EmitScalarTernaryOpByElemF(ILEmitterCtx context, Action emit)
  206. {
  207. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  208. EmitScalarOpByElemF(context, emit, op.Index, ternary: true);
  209. }
  210. public static void EmitScalarOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
  211. {
  212. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  213. int sizeF = op.Size & 1;
  214. if (ternary)
  215. {
  216. EmitVectorExtractF(context, op.Rd, 0, sizeF);
  217. }
  218. EmitVectorExtractF(context, op.Rn, 0, sizeF);
  219. EmitVectorExtractF(context, op.Rm, elem, sizeF);
  220. emit();
  221. EmitScalarSetF(context, op.Rd, sizeF);
  222. }
  223. public static void EmitScalarUnaryOpSx(ILEmitterCtx context, Action emit)
  224. {
  225. EmitScalarOp(context, emit, OperFlags.Rn, true);
  226. }
  227. public static void EmitScalarBinaryOpSx(ILEmitterCtx context, Action emit)
  228. {
  229. EmitScalarOp(context, emit, OperFlags.RnRm, true);
  230. }
  231. public static void EmitScalarUnaryOpZx(ILEmitterCtx context, Action emit)
  232. {
  233. EmitScalarOp(context, emit, OperFlags.Rn, false);
  234. }
  235. public static void EmitScalarBinaryOpZx(ILEmitterCtx context, Action emit)
  236. {
  237. EmitScalarOp(context, emit, OperFlags.RnRm, false);
  238. }
  239. public static void EmitScalarTernaryOpZx(ILEmitterCtx context, Action emit)
  240. {
  241. EmitScalarOp(context, emit, OperFlags.RdRnRm, false);
  242. }
  243. public static void EmitScalarOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
  244. {
  245. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  246. bool rd = (opers & OperFlags.Rd) != 0;
  247. bool rn = (opers & OperFlags.Rn) != 0;
  248. bool rm = (opers & OperFlags.Rm) != 0;
  249. if (rd)
  250. {
  251. EmitVectorExtract(context, op.Rd, 0, op.Size, signed);
  252. }
  253. if (rn)
  254. {
  255. EmitVectorExtract(context, op.Rn, 0, op.Size, signed);
  256. }
  257. if (rm)
  258. {
  259. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, 0, op.Size, signed);
  260. }
  261. emit();
  262. EmitScalarSet(context, op.Rd, op.Size);
  263. }
  264. public static void EmitScalarUnaryOpF(ILEmitterCtx context, Action emit)
  265. {
  266. EmitScalarOpF(context, emit, OperFlags.Rn);
  267. }
  268. public static void EmitScalarBinaryOpF(ILEmitterCtx context, Action emit)
  269. {
  270. EmitScalarOpF(context, emit, OperFlags.RnRm);
  271. }
  272. public static void EmitScalarTernaryRaOpF(ILEmitterCtx context, Action emit)
  273. {
  274. EmitScalarOpF(context, emit, OperFlags.RaRnRm);
  275. }
  276. public static void EmitScalarOpF(ILEmitterCtx context, Action emit, OperFlags opers)
  277. {
  278. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  279. int sizeF = op.Size & 1;
  280. bool ra = (opers & OperFlags.Ra) != 0;
  281. bool rn = (opers & OperFlags.Rn) != 0;
  282. bool rm = (opers & OperFlags.Rm) != 0;
  283. if (ra)
  284. {
  285. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Ra, 0, sizeF);
  286. }
  287. if (rn)
  288. {
  289. EmitVectorExtractF(context, op.Rn, 0, sizeF);
  290. }
  291. if (rm)
  292. {
  293. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, 0, sizeF);
  294. }
  295. emit();
  296. EmitScalarSetF(context, op.Rd, sizeF);
  297. }
  298. public static void EmitVectorUnaryOpF(ILEmitterCtx context, Action emit)
  299. {
  300. EmitVectorOpF(context, emit, OperFlags.Rn);
  301. }
  302. public static void EmitVectorBinaryOpF(ILEmitterCtx context, Action emit)
  303. {
  304. EmitVectorOpF(context, emit, OperFlags.RnRm);
  305. }
  306. public static void EmitVectorTernaryOpF(ILEmitterCtx context, Action emit)
  307. {
  308. EmitVectorOpF(context, emit, OperFlags.RdRnRm);
  309. }
  310. public static void EmitVectorOpF(ILEmitterCtx context, Action emit, OperFlags opers)
  311. {
  312. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  313. int sizeF = op.Size & 1;
  314. int bytes = op.GetBitsCount() >> 3;
  315. int elems = bytes >> sizeF + 2;
  316. bool rd = (opers & OperFlags.Rd) != 0;
  317. bool rn = (opers & OperFlags.Rn) != 0;
  318. bool rm = (opers & OperFlags.Rm) != 0;
  319. for (int index = 0; index < elems; index++)
  320. {
  321. if (rd)
  322. {
  323. EmitVectorExtractF(context, op.Rd, index, sizeF);
  324. }
  325. if (rn)
  326. {
  327. EmitVectorExtractF(context, op.Rn, index, sizeF);
  328. }
  329. if (rm)
  330. {
  331. EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, index, sizeF);
  332. }
  333. emit();
  334. EmitVectorInsertF(context, op.Rd, index, sizeF);
  335. }
  336. if (op.RegisterSize == RegisterSize.Simd64)
  337. {
  338. EmitVectorZeroUpper(context, op.Rd);
  339. }
  340. }
  341. public static void EmitVectorBinaryOpByElemF(ILEmitterCtx context, Action emit)
  342. {
  343. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  344. EmitVectorOpByElemF(context, emit, op.Index, ternary: false);
  345. }
  346. public static void EmitVectorTernaryOpByElemF(ILEmitterCtx context, Action emit)
  347. {
  348. OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
  349. EmitVectorOpByElemF(context, emit, op.Index, ternary: true);
  350. }
  351. public static void EmitVectorOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
  352. {
  353. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  354. int sizeF = op.Size & 1;
  355. int bytes = op.GetBitsCount() >> 3;
  356. int elems = bytes >> sizeF + 2;
  357. for (int index = 0; index < elems; index++)
  358. {
  359. if (ternary)
  360. {
  361. EmitVectorExtractF(context, op.Rd, index, sizeF);
  362. }
  363. EmitVectorExtractF(context, op.Rn, index, sizeF);
  364. EmitVectorExtractF(context, op.Rm, elem, sizeF);
  365. emit();
  366. EmitVectorInsertTmpF(context, index, sizeF);
  367. }
  368. context.EmitLdvectmp();
  369. context.EmitStvec(op.Rd);
  370. if (op.RegisterSize == RegisterSize.Simd64)
  371. {
  372. EmitVectorZeroUpper(context, op.Rd);
  373. }
  374. }
  375. public static void EmitVectorUnaryOpSx(ILEmitterCtx context, Action emit)
  376. {
  377. EmitVectorOp(context, emit, OperFlags.Rn, true);
  378. }
  379. public static void EmitVectorBinaryOpSx(ILEmitterCtx context, Action emit)
  380. {
  381. EmitVectorOp(context, emit, OperFlags.RnRm, true);
  382. }
  383. public static void EmitVectorTernaryOpSx(ILEmitterCtx context, Action emit)
  384. {
  385. EmitVectorOp(context, emit, OperFlags.RdRnRm, true);
  386. }
  387. public static void EmitVectorUnaryOpZx(ILEmitterCtx context, Action emit)
  388. {
  389. EmitVectorOp(context, emit, OperFlags.Rn, false);
  390. }
  391. public static void EmitVectorBinaryOpZx(ILEmitterCtx context, Action emit)
  392. {
  393. EmitVectorOp(context, emit, OperFlags.RnRm, false);
  394. }
  395. public static void EmitVectorTernaryOpZx(ILEmitterCtx context, Action emit)
  396. {
  397. EmitVectorOp(context, emit, OperFlags.RdRnRm, false);
  398. }
  399. public static void EmitVectorOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
  400. {
  401. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  402. int bytes = op.GetBitsCount() >> 3;
  403. int elems = bytes >> op.Size;
  404. bool rd = (opers & OperFlags.Rd) != 0;
  405. bool rn = (opers & OperFlags.Rn) != 0;
  406. bool rm = (opers & OperFlags.Rm) != 0;
  407. for (int index = 0; index < elems; index++)
  408. {
  409. if (rd)
  410. {
  411. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  412. }
  413. if (rn)
  414. {
  415. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  416. }
  417. if (rm)
  418. {
  419. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  420. }
  421. emit();
  422. EmitVectorInsert(context, op.Rd, index, op.Size);
  423. }
  424. if (op.RegisterSize == RegisterSize.Simd64)
  425. {
  426. EmitVectorZeroUpper(context, op.Rd);
  427. }
  428. }
  429. public static void EmitVectorBinaryOpByElemSx(ILEmitterCtx context, Action emit)
  430. {
  431. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  432. EmitVectorOpByElem(context, emit, op.Index, ternary: false, signed: true);
  433. }
  434. public static void EmitVectorBinaryOpByElemZx(ILEmitterCtx context, Action emit)
  435. {
  436. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  437. EmitVectorOpByElem(context, emit, op.Index, ternary: false, signed: false);
  438. }
  439. public static void EmitVectorTernaryOpByElemZx(ILEmitterCtx context, Action emit)
  440. {
  441. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  442. EmitVectorOpByElem(context, emit, op.Index, ternary: true, signed: false);
  443. }
  444. public static void EmitVectorOpByElem(ILEmitterCtx context, Action emit, int elem, bool ternary, bool signed)
  445. {
  446. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  447. int bytes = op.GetBitsCount() >> 3;
  448. int elems = bytes >> op.Size;
  449. EmitVectorExtract(context, op.Rm, elem, op.Size, signed);
  450. context.EmitSttmp();
  451. for (int index = 0; index < elems; index++)
  452. {
  453. if (ternary)
  454. {
  455. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  456. }
  457. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  458. context.EmitLdtmp();
  459. emit();
  460. EmitVectorInsert(context, op.Rd, index, op.Size);
  461. }
  462. if (op.RegisterSize == RegisterSize.Simd64)
  463. {
  464. EmitVectorZeroUpper(context, op.Rd);
  465. }
  466. }
  467. public static void EmitVectorImmUnaryOp(ILEmitterCtx context, Action emit)
  468. {
  469. EmitVectorImmOp(context, emit, false);
  470. }
  471. public static void EmitVectorImmBinaryOp(ILEmitterCtx context, Action emit)
  472. {
  473. EmitVectorImmOp(context, emit, true);
  474. }
  475. public static void EmitVectorImmOp(ILEmitterCtx context, Action emit, bool binary)
  476. {
  477. OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp;
  478. int bytes = op.GetBitsCount() >> 3;
  479. int elems = bytes >> op.Size;
  480. for (int index = 0; index < elems; index++)
  481. {
  482. if (binary)
  483. {
  484. EmitVectorExtractZx(context, op.Rd, index, op.Size);
  485. }
  486. context.EmitLdc_I8(op.Imm);
  487. emit();
  488. EmitVectorInsert(context, op.Rd, index, op.Size);
  489. }
  490. if (op.RegisterSize == RegisterSize.Simd64)
  491. {
  492. EmitVectorZeroUpper(context, op.Rd);
  493. }
  494. }
  495. public static void EmitVectorWidenRmBinaryOpSx(ILEmitterCtx context, Action emit)
  496. {
  497. EmitVectorWidenRmBinaryOp(context, emit, true);
  498. }
  499. public static void EmitVectorWidenRmBinaryOpZx(ILEmitterCtx context, Action emit)
  500. {
  501. EmitVectorWidenRmBinaryOp(context, emit, false);
  502. }
  503. public static void EmitVectorWidenRmBinaryOp(ILEmitterCtx context, Action emit, bool signed)
  504. {
  505. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  506. int elems = 8 >> op.Size;
  507. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  508. for (int index = 0; index < elems; index++)
  509. {
  510. EmitVectorExtract(context, op.Rn, index, op.Size + 1, signed);
  511. EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  512. emit();
  513. EmitVectorInsertTmp(context, index, op.Size + 1);
  514. }
  515. context.EmitLdvectmp();
  516. context.EmitStvec(op.Rd);
  517. }
  518. public static void EmitVectorWidenRnRmBinaryOpSx(ILEmitterCtx context, Action emit)
  519. {
  520. EmitVectorWidenRnRmOp(context, emit, false, true);
  521. }
  522. public static void EmitVectorWidenRnRmBinaryOpZx(ILEmitterCtx context, Action emit)
  523. {
  524. EmitVectorWidenRnRmOp(context, emit, false, false);
  525. }
  526. public static void EmitVectorWidenRnRmTernaryOpSx(ILEmitterCtx context, Action emit)
  527. {
  528. EmitVectorWidenRnRmOp(context, emit, true, true);
  529. }
  530. public static void EmitVectorWidenRnRmTernaryOpZx(ILEmitterCtx context, Action emit)
  531. {
  532. EmitVectorWidenRnRmOp(context, emit, true, false);
  533. }
  534. public static void EmitVectorWidenRnRmOp(ILEmitterCtx context, Action emit, bool ternary, bool signed)
  535. {
  536. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  537. int elems = 8 >> op.Size;
  538. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  539. for (int index = 0; index < elems; index++)
  540. {
  541. if (ternary)
  542. {
  543. EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  544. }
  545. EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  546. EmitVectorExtract(context, op.Rm, part + index, op.Size, signed);
  547. emit();
  548. EmitVectorInsertTmp(context, index, op.Size + 1);
  549. }
  550. context.EmitLdvectmp();
  551. context.EmitStvec(op.Rd);
  552. }
  553. public static void EmitVectorWidenBinaryOpByElemSx(ILEmitterCtx context, Action emit)
  554. {
  555. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  556. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: false, signed: true);
  557. }
  558. public static void EmitVectorWidenBinaryOpByElemZx(ILEmitterCtx context, Action emit)
  559. {
  560. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  561. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: false, signed: false);
  562. }
  563. public static void EmitVectorWidenTernaryOpByElemSx(ILEmitterCtx context, Action emit)
  564. {
  565. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  566. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: true, signed: true);
  567. }
  568. public static void EmitVectorWidenTernaryOpByElemZx(ILEmitterCtx context, Action emit)
  569. {
  570. OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
  571. EmitVectorWidenOpByElem(context, emit, op.Index, ternary: true, signed: false);
  572. }
  573. public static void EmitVectorWidenOpByElem(ILEmitterCtx context, Action emit, int elem, bool ternary, bool signed)
  574. {
  575. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  576. int elems = 8 >> op.Size;
  577. int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
  578. EmitVectorExtract(context, op.Rm, elem, op.Size, signed);
  579. context.EmitSttmp();
  580. for (int index = 0; index < elems; index++)
  581. {
  582. if (ternary)
  583. {
  584. EmitVectorExtract(context, op.Rd, index, op.Size + 1, signed);
  585. }
  586. EmitVectorExtract(context, op.Rn, part + index, op.Size, signed);
  587. context.EmitLdtmp();
  588. emit();
  589. EmitVectorInsertTmp(context, index, op.Size + 1);
  590. }
  591. context.EmitLdvectmp();
  592. context.EmitStvec(op.Rd);
  593. }
  594. public static void EmitVectorPairwiseOpSx(ILEmitterCtx context, Action emit)
  595. {
  596. EmitVectorPairwiseOp(context, emit, true);
  597. }
  598. public static void EmitVectorPairwiseOpZx(ILEmitterCtx context, Action emit)
  599. {
  600. EmitVectorPairwiseOp(context, emit, false);
  601. }
  602. public static void EmitVectorPairwiseOp(ILEmitterCtx context, Action emit, bool signed)
  603. {
  604. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  605. int words = op.GetBitsCount() >> 4;
  606. int pairs = words >> op.Size;
  607. for (int index = 0; index < pairs; index++)
  608. {
  609. int idx = index << 1;
  610. EmitVectorExtract(context, op.Rn, idx, op.Size, signed);
  611. EmitVectorExtract(context, op.Rn, idx + 1, op.Size, signed);
  612. emit();
  613. EmitVectorExtract(context, op.Rm, idx, op.Size, signed);
  614. EmitVectorExtract(context, op.Rm, idx + 1, op.Size, signed);
  615. emit();
  616. EmitVectorInsertTmp(context, pairs + index, op.Size);
  617. EmitVectorInsertTmp(context, index, op.Size);
  618. }
  619. context.EmitLdvectmp();
  620. context.EmitStvec(op.Rd);
  621. if (op.RegisterSize == RegisterSize.Simd64)
  622. {
  623. EmitVectorZeroUpper(context, op.Rd);
  624. }
  625. }
  626. public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
  627. {
  628. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  629. int sizeF = op.Size & 1;
  630. int words = op.GetBitsCount() >> 4;
  631. int pairs = words >> sizeF + 2;
  632. for (int index = 0; index < pairs; index++)
  633. {
  634. int idx = index << 1;
  635. EmitVectorExtractF(context, op.Rn, idx, sizeF);
  636. EmitVectorExtractF(context, op.Rn, idx + 1, sizeF);
  637. emit();
  638. EmitVectorExtractF(context, op.Rm, idx, sizeF);
  639. EmitVectorExtractF(context, op.Rm, idx + 1, sizeF);
  640. emit();
  641. EmitVectorInsertTmpF(context, pairs + index, sizeF);
  642. EmitVectorInsertTmpF(context, index, sizeF);
  643. }
  644. context.EmitLdvectmp();
  645. context.EmitStvec(op.Rd);
  646. if (op.RegisterSize == RegisterSize.Simd64)
  647. {
  648. EmitVectorZeroUpper(context, op.Rd);
  649. }
  650. }
  651. public static void EmitVectorPairwiseSseOrSse2OpF(ILEmitterCtx context, string name)
  652. {
  653. OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
  654. int sizeF = op.Size & 1;
  655. if (sizeF == 0)
  656. {
  657. if (op.RegisterSize == RegisterSize.Simd64)
  658. {
  659. Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
  660. context.EmitLdvec(op.Rn);
  661. context.EmitLdvec(op.Rm);
  662. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.UnpackLow), types));
  663. context.EmitStvectmp();
  664. context.EmitLdvectmp();
  665. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  666. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh), types));
  667. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  668. context.EmitLdvectmp();
  669. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveHighToLow), types));
  670. context.EmitCall(typeof(Sse).GetMethod(name, types));
  671. context.EmitStvec(op.Rd);
  672. }
  673. else /* if (op.RegisterSize == RegisterSize.Simd128) */
  674. {
  675. Type[] typesSfl = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>), typeof(byte) };
  676. Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
  677. context.EmitLdvec(op.Rn);
  678. context.EmitLdvec(op.Rm);
  679. context.EmitLdc_I4(2 << 6 | 0 << 4 | 2 << 2 | 0 << 0);
  680. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Shuffle), typesSfl));
  681. context.EmitLdvec(op.Rn);
  682. context.EmitLdvec(op.Rm);
  683. context.EmitLdc_I4(3 << 6 | 1 << 4 | 3 << 2 | 1 << 0);
  684. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Shuffle), typesSfl));
  685. context.EmitCall(typeof(Sse).GetMethod(name, types));
  686. context.EmitStvec(op.Rd);
  687. }
  688. }
  689. else /* if (sizeF == 1) */
  690. {
  691. Type[] types = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
  692. context.EmitLdvec(op.Rn);
  693. context.EmitLdvec(op.Rm);
  694. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), types));
  695. context.EmitLdvec(op.Rn);
  696. context.EmitLdvec(op.Rm);
  697. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), types));
  698. context.EmitCall(typeof(Sse2).GetMethod(name, types));
  699. context.EmitStvec(op.Rd);
  700. }
  701. }
  702. [Flags]
  703. public enum SaturatingFlags
  704. {
  705. Scalar = 1 << 0,
  706. Signed = 1 << 1,
  707. Add = 1 << 2,
  708. Sub = 1 << 3,
  709. Accumulate = 1 << 4,
  710. ScalarSx = Scalar | Signed,
  711. ScalarZx = Scalar,
  712. VectorSx = Signed,
  713. VectorZx = 0
  714. }
  715. public static void EmitScalarSaturatingUnaryOpSx(ILEmitterCtx context, Action emit)
  716. {
  717. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.ScalarSx);
  718. }
  719. public static void EmitVectorSaturatingUnaryOpSx(ILEmitterCtx context, Action emit)
  720. {
  721. EmitSaturatingUnaryOpSx(context, emit, SaturatingFlags.VectorSx);
  722. }
  723. public static void EmitSaturatingUnaryOpSx(ILEmitterCtx context, Action emit, SaturatingFlags flags)
  724. {
  725. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  726. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  727. int bytes = op.GetBitsCount() >> 3;
  728. int elems = !scalar ? bytes >> op.Size : 1;
  729. for (int index = 0; index < elems; index++)
  730. {
  731. EmitVectorExtractSx(context, op.Rn, index, op.Size);
  732. emit();
  733. if (op.Size <= 2)
  734. {
  735. EmitSatQ(context, op.Size, true, true);
  736. }
  737. else /* if (op.Size == 3) */
  738. {
  739. EmitUnarySignedSatQAbsOrNeg(context);
  740. }
  741. if (scalar)
  742. {
  743. EmitVectorZeroAll(context, op.Rd);
  744. }
  745. EmitVectorInsert(context, op.Rd, index, op.Size);
  746. }
  747. if (op.RegisterSize == RegisterSize.Simd64)
  748. {
  749. EmitVectorZeroUpper(context, op.Rd);
  750. }
  751. }
  752. public static void EmitScalarSaturatingBinaryOpSx(ILEmitterCtx context, SaturatingFlags flags)
  753. {
  754. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.ScalarSx | flags);
  755. }
  756. public static void EmitScalarSaturatingBinaryOpZx(ILEmitterCtx context, SaturatingFlags flags)
  757. {
  758. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.ScalarZx | flags);
  759. }
  760. public static void EmitVectorSaturatingBinaryOpSx(ILEmitterCtx context, SaturatingFlags flags)
  761. {
  762. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.VectorSx | flags);
  763. }
  764. public static void EmitVectorSaturatingBinaryOpZx(ILEmitterCtx context, SaturatingFlags flags)
  765. {
  766. EmitSaturatingBinaryOp(context, () => { }, SaturatingFlags.VectorZx | flags);
  767. }
  768. public static void EmitSaturatingBinaryOp(ILEmitterCtx context, Action emit, SaturatingFlags flags)
  769. {
  770. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  771. bool scalar = (flags & SaturatingFlags.Scalar) != 0;
  772. bool signed = (flags & SaturatingFlags.Signed) != 0;
  773. bool add = (flags & SaturatingFlags.Add) != 0;
  774. bool sub = (flags & SaturatingFlags.Sub) != 0;
  775. bool accumulate = (flags & SaturatingFlags.Accumulate) != 0;
  776. int bytes = op.GetBitsCount() >> 3;
  777. int elems = !scalar ? bytes >> op.Size : 1;
  778. if (add || sub)
  779. {
  780. for (int index = 0; index < elems; index++)
  781. {
  782. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  783. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  784. if (op.Size <= 2)
  785. {
  786. context.Emit(add ? OpCodes.Add : OpCodes.Sub);
  787. EmitSatQ(context, op.Size, true, signed);
  788. }
  789. else /* if (op.Size == 3) */
  790. {
  791. if (add)
  792. {
  793. EmitBinarySatQAdd(context, signed);
  794. }
  795. else /* if (sub) */
  796. {
  797. EmitBinarySatQSub(context, signed);
  798. }
  799. }
  800. if (scalar)
  801. {
  802. EmitVectorZeroAll(context, op.Rd);
  803. }
  804. EmitVectorInsert(context, op.Rd, index, op.Size);
  805. }
  806. }
  807. else if (accumulate)
  808. {
  809. for (int index = 0; index < elems; index++)
  810. {
  811. EmitVectorExtract(context, op.Rn, index, op.Size, !signed);
  812. EmitVectorExtract(context, op.Rd, index, op.Size, signed);
  813. if (op.Size <= 2)
  814. {
  815. context.Emit(OpCodes.Add);
  816. EmitSatQ(context, op.Size, true, signed);
  817. }
  818. else /* if (op.Size == 3) */
  819. {
  820. EmitBinarySatQAccumulate(context, signed);
  821. }
  822. if (scalar)
  823. {
  824. EmitVectorZeroAll(context, op.Rd);
  825. }
  826. EmitVectorInsert(context, op.Rd, index, op.Size);
  827. }
  828. }
  829. else
  830. {
  831. for (int index = 0; index < elems; index++)
  832. {
  833. EmitVectorExtract(context, op.Rn, index, op.Size, signed);
  834. EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
  835. emit();
  836. EmitSatQ(context, op.Size, true, signed);
  837. if (scalar)
  838. {
  839. EmitVectorZeroAll(context, op.Rd);
  840. }
  841. EmitVectorInsert(context, op.Rd, index, op.Size);
  842. }
  843. }
  844. if (op.RegisterSize == RegisterSize.Simd64)
  845. {
  846. EmitVectorZeroUpper(context, op.Rd);
  847. }
  848. }
  849. [Flags]
  850. public enum SaturatingNarrowFlags
  851. {
  852. Scalar = 1 << 0,
  853. SignedSrc = 1 << 1,
  854. SignedDst = 1 << 2,
  855. ScalarSxSx = Scalar | SignedSrc | SignedDst,
  856. ScalarSxZx = Scalar | SignedSrc,
  857. ScalarZxZx = Scalar,
  858. VectorSxSx = SignedSrc | SignedDst,
  859. VectorSxZx = SignedSrc,
  860. VectorZxZx = 0
  861. }
  862. public static void EmitSaturatingNarrowOp(ILEmitterCtx context, SaturatingNarrowFlags flags)
  863. {
  864. OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
  865. bool scalar = (flags & SaturatingNarrowFlags.Scalar) != 0;
  866. bool signedSrc = (flags & SaturatingNarrowFlags.SignedSrc) != 0;
  867. bool signedDst = (flags & SaturatingNarrowFlags.SignedDst) != 0;
  868. int elems = !scalar ? 8 >> op.Size : 1;
  869. int part = !scalar && (op.RegisterSize == RegisterSize.Simd128) ? elems : 0;
  870. if (scalar)
  871. {
  872. EmitVectorZeroLowerTmp(context);
  873. }
  874. if (part != 0)
  875. {
  876. context.EmitLdvec(op.Rd);
  877. context.EmitStvectmp();
  878. }
  879. for (int index = 0; index < elems; index++)
  880. {
  881. EmitVectorExtract(context, op.Rn, index, op.Size + 1, signedSrc);
  882. EmitSatQ(context, op.Size, signedSrc, signedDst);
  883. EmitVectorInsertTmp(context, part + index, op.Size);
  884. }
  885. context.EmitLdvectmp();
  886. context.EmitStvec(op.Rd);
  887. if (part == 0)
  888. {
  889. EmitVectorZeroUpper(context, op.Rd);
  890. }
  891. }
  892. // TSrc (16bit, 32bit, 64bit; signed, unsigned) > TDst (8bit, 16bit, 32bit; signed, unsigned).
  893. public static void EmitSatQ(ILEmitterCtx context, int sizeDst, bool signedSrc, bool signedDst)
  894. {
  895. if ((uint)sizeDst > 2u)
  896. {
  897. throw new ArgumentOutOfRangeException(nameof(sizeDst));
  898. }
  899. context.EmitLdc_I4(sizeDst);
  900. context.EmitLdarg(TranslatedSub.StateArgIdx);
  901. if (signedSrc)
  902. {
  903. SoftFallback.EmitCall(context, signedDst
  904. ? nameof(SoftFallback.SignedSrcSignedDstSatQ)
  905. : nameof(SoftFallback.SignedSrcUnsignedDstSatQ));
  906. }
  907. else
  908. {
  909. SoftFallback.EmitCall(context, signedDst
  910. ? nameof(SoftFallback.UnsignedSrcSignedDstSatQ)
  911. : nameof(SoftFallback.UnsignedSrcUnsignedDstSatQ));
  912. }
  913. }
  914. // TSrc (64bit) == TDst (64bit); signed.
  915. public static void EmitUnarySignedSatQAbsOrNeg(ILEmitterCtx context)
  916. {
  917. if (((OpCodeSimd64)context.CurrOp).Size < 3)
  918. {
  919. throw new InvalidOperationException();
  920. }
  921. context.EmitLdarg(TranslatedSub.StateArgIdx);
  922. SoftFallback.EmitCall(context, nameof(SoftFallback.UnarySignedSatQAbsOrNeg));
  923. }
  924. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  925. public static void EmitBinarySatQAdd(ILEmitterCtx context, bool signed)
  926. {
  927. if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
  928. {
  929. throw new InvalidOperationException();
  930. }
  931. context.EmitLdarg(TranslatedSub.StateArgIdx);
  932. SoftFallback.EmitCall(context, signed
  933. ? nameof(SoftFallback.BinarySignedSatQAdd)
  934. : nameof(SoftFallback.BinaryUnsignedSatQAdd));
  935. }
  936. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  937. public static void EmitBinarySatQSub(ILEmitterCtx context, bool signed)
  938. {
  939. if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
  940. {
  941. throw new InvalidOperationException();
  942. }
  943. context.EmitLdarg(TranslatedSub.StateArgIdx);
  944. SoftFallback.EmitCall(context, signed
  945. ? nameof(SoftFallback.BinarySignedSatQSub)
  946. : nameof(SoftFallback.BinaryUnsignedSatQSub));
  947. }
  948. // TSrcs (64bit) == TDst (64bit); signed, unsigned.
  949. public static void EmitBinarySatQAccumulate(ILEmitterCtx context, bool signed)
  950. {
  951. if (((OpCodeSimd64)context.CurrOp).Size < 3)
  952. {
  953. throw new InvalidOperationException();
  954. }
  955. context.EmitLdarg(TranslatedSub.StateArgIdx);
  956. SoftFallback.EmitCall(context, signed
  957. ? nameof(SoftFallback.BinarySignedSatQAcc)
  958. : nameof(SoftFallback.BinaryUnsignedSatQAcc));
  959. }
  960. public static void EmitScalarSet(ILEmitterCtx context, int reg, int size)
  961. {
  962. EmitVectorZeroAll(context, reg);
  963. EmitVectorInsert(context, reg, 0, size);
  964. }
  965. public static void EmitScalarSetF(ILEmitterCtx context, int reg, int size)
  966. {
  967. if (Optimizations.UseSse41 && size == 0)
  968. {
  969. //If the type is float, we can perform insertion and
  970. //zero the upper bits with a single instruction (INSERTPS);
  971. context.EmitLdvec(reg);
  972. VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41VectorInsertScalarSingle));
  973. context.EmitStvec(reg);
  974. }
  975. else
  976. {
  977. EmitVectorZeroAll(context, reg);
  978. EmitVectorInsertF(context, reg, 0, size);
  979. }
  980. }
  981. public static void EmitVectorExtractSx(ILEmitterCtx context, int reg, int index, int size)
  982. {
  983. EmitVectorExtract(context, reg, index, size, true);
  984. }
  985. public static void EmitVectorExtractZx(ILEmitterCtx context, int reg, int index, int size)
  986. {
  987. EmitVectorExtract(context, reg, index, size, false);
  988. }
  989. public static void EmitVectorExtract(ILEmitterCtx context, int reg, int index, int size, bool signed)
  990. {
  991. ThrowIfInvalid(index, size);
  992. context.EmitLdvec(reg);
  993. context.EmitLdc_I4(index);
  994. context.EmitLdc_I4(size);
  995. VectorHelper.EmitCall(context, signed
  996. ? nameof(VectorHelper.VectorExtractIntSx)
  997. : nameof(VectorHelper.VectorExtractIntZx));
  998. }
  999. public static void EmitVectorExtractF(ILEmitterCtx context, int reg, int index, int size)
  1000. {
  1001. ThrowIfInvalidF(index, size);
  1002. context.EmitLdvec(reg);
  1003. context.EmitLdc_I4(index);
  1004. if (size == 0)
  1005. {
  1006. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorExtractSingle));
  1007. }
  1008. else if (size == 1)
  1009. {
  1010. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorExtractDouble));
  1011. }
  1012. else
  1013. {
  1014. throw new ArgumentOutOfRangeException(nameof(size));
  1015. }
  1016. }
  1017. public static void EmitVectorZeroAll(ILEmitterCtx context, int reg)
  1018. {
  1019. if (Optimizations.UseSse)
  1020. {
  1021. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1022. context.EmitStvec(reg);
  1023. }
  1024. else
  1025. {
  1026. EmitVectorZeroLower(context, reg);
  1027. EmitVectorZeroUpper(context, reg);
  1028. }
  1029. }
  1030. public static void EmitVectorZeroLower(ILEmitterCtx context, int reg)
  1031. {
  1032. EmitVectorInsert(context, reg, 0, 3, 0);
  1033. }
  1034. public static void EmitVectorZeroLowerTmp(ILEmitterCtx context)
  1035. {
  1036. if (Optimizations.UseSse)
  1037. {
  1038. context.EmitLdvectmp();
  1039. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1040. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveHighToLow)));
  1041. context.EmitStvectmp();
  1042. }
  1043. else
  1044. {
  1045. EmitVectorInsertTmp(context, 0, 3, 0);
  1046. }
  1047. }
  1048. public static void EmitVectorZeroUpper(ILEmitterCtx context, int reg)
  1049. {
  1050. if (Optimizations.UseSse)
  1051. {
  1052. // TODO: Use Sse2.MoveScalar once it is fixed (in .NET Core 3.0),
  1053. // as of the time of writing it just crashes the JIT.
  1054. /*Type[] typesMov = new Type[] { typeof(Vector128<ulong>) };
  1055. context.EmitLdvec(reg);
  1056. context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.MoveScalar), typesMov));
  1057. context.EmitStvec(reg);*/
  1058. context.EmitLdvec(reg);
  1059. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1060. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh)));
  1061. context.EmitStvec(reg);
  1062. }
  1063. else
  1064. {
  1065. EmitVectorInsert(context, reg, 1, 3, 0);
  1066. }
  1067. }
  1068. public static void EmitVectorZero32_128(ILEmitterCtx context, int reg)
  1069. {
  1070. if (!Sse.IsSupported)
  1071. {
  1072. throw new PlatformNotSupportedException();
  1073. }
  1074. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
  1075. context.EmitLdvec(reg);
  1076. context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveScalar)));
  1077. context.EmitStvec(reg);
  1078. }
  1079. public static void EmitVectorInsert(ILEmitterCtx context, int reg, int index, int size)
  1080. {
  1081. ThrowIfInvalid(index, size);
  1082. context.EmitLdvec(reg);
  1083. context.EmitLdc_I4(index);
  1084. context.EmitLdc_I4(size);
  1085. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1086. context.EmitStvec(reg);
  1087. }
  1088. public static void EmitVectorInsertTmp(ILEmitterCtx context, int index, int size)
  1089. {
  1090. ThrowIfInvalid(index, size);
  1091. context.EmitLdvectmp();
  1092. context.EmitLdc_I4(index);
  1093. context.EmitLdc_I4(size);
  1094. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1095. context.EmitStvectmp();
  1096. }
  1097. public static void EmitVectorInsert(ILEmitterCtx context, int reg, int index, int size, long value)
  1098. {
  1099. ThrowIfInvalid(index, size);
  1100. context.EmitLdc_I8(value);
  1101. context.EmitLdvec(reg);
  1102. context.EmitLdc_I4(index);
  1103. context.EmitLdc_I4(size);
  1104. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1105. context.EmitStvec(reg);
  1106. }
  1107. public static void EmitVectorInsertTmp(ILEmitterCtx context, int index, int size, long value)
  1108. {
  1109. ThrowIfInvalid(index, size);
  1110. context.EmitLdc_I8(value);
  1111. context.EmitLdvectmp();
  1112. context.EmitLdc_I4(index);
  1113. context.EmitLdc_I4(size);
  1114. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertInt));
  1115. context.EmitStvectmp();
  1116. }
  1117. public static void EmitVectorInsertF(ILEmitterCtx context, int reg, int index, int size)
  1118. {
  1119. ThrowIfInvalidF(index, size);
  1120. context.EmitLdvec(reg);
  1121. context.EmitLdc_I4(index);
  1122. if (size == 0)
  1123. {
  1124. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertSingle));
  1125. }
  1126. else if (size == 1)
  1127. {
  1128. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertDouble));
  1129. }
  1130. else
  1131. {
  1132. throw new ArgumentOutOfRangeException(nameof(size));
  1133. }
  1134. context.EmitStvec(reg);
  1135. }
  1136. public static void EmitVectorInsertTmpF(ILEmitterCtx context, int index, int size)
  1137. {
  1138. ThrowIfInvalidF(index, size);
  1139. context.EmitLdvectmp();
  1140. context.EmitLdc_I4(index);
  1141. if (size == 0)
  1142. {
  1143. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertSingle));
  1144. }
  1145. else if (size == 1)
  1146. {
  1147. VectorHelper.EmitCall(context, nameof(VectorHelper.VectorInsertDouble));
  1148. }
  1149. else
  1150. {
  1151. throw new ArgumentOutOfRangeException(nameof(size));
  1152. }
  1153. context.EmitStvectmp();
  1154. }
  1155. private static void ThrowIfInvalid(int index, int size)
  1156. {
  1157. if ((uint)size > 3u)
  1158. {
  1159. throw new ArgumentOutOfRangeException(nameof(size));
  1160. }
  1161. if ((uint)index >= 16u >> size)
  1162. {
  1163. throw new ArgumentOutOfRangeException(nameof(index));
  1164. }
  1165. }
  1166. private static void ThrowIfInvalidF(int index, int size)
  1167. {
  1168. if ((uint)size > 1u)
  1169. {
  1170. throw new ArgumentOutOfRangeException(nameof(size));
  1171. }
  1172. if ((uint)index >= 4u >> size)
  1173. {
  1174. throw new ArgumentOutOfRangeException(nameof(index));
  1175. }
  1176. }
  1177. }
  1178. }