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ACryptoHelper.cs
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d021d5dfa9
Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365)
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7 lat temu |
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AInst.cs
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9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
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8 lat temu |
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AInstEmitAlu.cs
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894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
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7 lat temu |
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AInstEmitAluHelper.cs
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708761963e
Fix corner cases of ADCS and SBFM
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8 lat temu |
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AInstEmitBfm.cs
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708761963e
Fix corner cases of ADCS and SBFM
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8 lat temu |
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AInstEmitCcmp.cs
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62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
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8 lat temu |
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AInstEmitCsel.cs
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950011c90f
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
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8 lat temu |
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AInstEmitException.cs
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65105c2a3b
Implement SvcGetThreadContext3
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7 lat temu |
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AInstEmitFlow.cs
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6d65e53664
Remove cold methods from the CPU cache (#224)
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7 lat temu |
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AInstEmitHash.cs
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8f6387128a
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
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7 lat temu |
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AInstEmitMemory.cs
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4731c7545d
Fix mistake on astc conversion, make some static methods that shouldn't be public private, remove old commmented out code
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8 lat temu |
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AInstEmitMemoryEx.cs
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b8133c1997
Thread scheduler rewrite (#393)
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7 lat temu |
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AInstEmitMemoryHelper.cs
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c393cdf8e3
More flexible memory manager (#307)
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7 lat temu |
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AInstEmitMove.cs
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62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
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8 lat temu |
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AInstEmitMul.cs
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62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
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8 lat temu |
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AInstEmitSimdArithmetic.cs
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894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
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7 lat temu |
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AInstEmitSimdCmp.cs
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0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
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7 lat temu |
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AInstEmitSimdCrypto.cs
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d021d5dfa9
Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365)
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7 lat temu |
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AInstEmitSimdCvt.cs
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0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
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7 lat temu |
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AInstEmitSimdHash.cs
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34100051e4
Add SHA256H, SHA256H2, SHA256SU0, SHA256SU1 instructions; add 4 Tests (closed box). (#352)
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7 lat temu |
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AInstEmitSimdHelper.cs
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bba9bf97d0
Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437)
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7 lat temu |
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AInstEmitSimdLogical.cs
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0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
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7 lat temu |
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AInstEmitSimdMemory.cs
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514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
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7 lat temu |
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AInstEmitSimdMove.cs
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894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
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7 lat temu |
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AInstEmitSimdShift.cs
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894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
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7 lat temu |
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AInstEmitSystem.cs
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2ed24af756
Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count
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8 lat temu |
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AInstEmitter.cs
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62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
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8 lat temu |
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AInstInterpreter.cs
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9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
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8 lat temu |
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ASoftFallback.cs
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894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
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7 lat temu |
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ASoftFloat.cs
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894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
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7 lat temu |
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AVectorHelper.cs
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0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
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7 lat temu |
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