MemoryManager.cs 18 KB

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  1. using Ryujinx.Memory;
  2. using Ryujinx.Memory.Range;
  3. using System;
  4. using System.Collections.Generic;
  5. using System.Runtime.CompilerServices;
  6. using System.Runtime.InteropServices;
  7. namespace Ryujinx.Graphics.Gpu.Memory
  8. {
  9. /// <summary>
  10. /// GPU memory manager.
  11. /// </summary>
  12. public class MemoryManager : IWritableBlock
  13. {
  14. private const int PtLvl0Bits = 14;
  15. private const int PtLvl1Bits = 14;
  16. public const int PtPageBits = 12;
  17. private const ulong PtLvl0Size = 1UL << PtLvl0Bits;
  18. private const ulong PtLvl1Size = 1UL << PtLvl1Bits;
  19. public const ulong PageSize = 1UL << PtPageBits;
  20. private const ulong PtLvl0Mask = PtLvl0Size - 1;
  21. private const ulong PtLvl1Mask = PtLvl1Size - 1;
  22. public const ulong PageMask = PageSize - 1;
  23. private const int PtLvl0Bit = PtPageBits + PtLvl1Bits;
  24. private const int PtLvl1Bit = PtPageBits;
  25. private const int AddressSpaceBits = PtPageBits + PtLvl1Bits + PtLvl0Bits;
  26. public const ulong PteUnmapped = ulong.MaxValue;
  27. private readonly ulong[][] _pageTable;
  28. public event EventHandler<UnmapEventArgs> MemoryUnmapped;
  29. /// <summary>
  30. /// Physical memory where the virtual memory is mapped into.
  31. /// </summary>
  32. internal PhysicalMemory Physical { get; }
  33. /// <summary>
  34. /// Cache of GPU counters.
  35. /// </summary>
  36. internal CounterCache CounterCache { get; }
  37. /// <summary>
  38. /// Creates a new instance of the GPU memory manager.
  39. /// </summary>
  40. /// <param name="physicalMemory">Physical memory that this memory manager will map into</param>
  41. internal MemoryManager(PhysicalMemory physicalMemory)
  42. {
  43. Physical = physicalMemory;
  44. CounterCache = new CounterCache();
  45. _pageTable = new ulong[PtLvl0Size][];
  46. MemoryUnmapped += Physical.TextureCache.MemoryUnmappedHandler;
  47. MemoryUnmapped += Physical.BufferCache.MemoryUnmappedHandler;
  48. MemoryUnmapped += CounterCache.MemoryUnmappedHandler;
  49. }
  50. /// <summary>
  51. /// Reads data from GPU mapped memory.
  52. /// </summary>
  53. /// <typeparam name="T">Type of the data</typeparam>
  54. /// <param name="va">GPU virtual address where the data is located</param>
  55. /// <param name="tracked">True if read tracking is triggered on the memory region</param>
  56. /// <returns>The data at the specified memory location</returns>
  57. public T Read<T>(ulong va, bool tracked = false) where T : unmanaged
  58. {
  59. int size = Unsafe.SizeOf<T>();
  60. if (IsContiguous(va, size))
  61. {
  62. ulong address = Translate(va);
  63. if (tracked)
  64. {
  65. return Physical.ReadTracked<T>(address);
  66. }
  67. else
  68. {
  69. return Physical.Read<T>(address);
  70. }
  71. }
  72. else
  73. {
  74. Span<byte> data = new byte[size];
  75. ReadImpl(va, data, tracked);
  76. return MemoryMarshal.Cast<byte, T>(data)[0];
  77. }
  78. }
  79. /// <summary>
  80. /// Gets a read-only span of data from GPU mapped memory.
  81. /// </summary>
  82. /// <param name="va">GPU virtual address where the data is located</param>
  83. /// <param name="size">Size of the data</param>
  84. /// <param name="tracked">True if read tracking is triggered on the span</param>
  85. /// <returns>The span of the data at the specified memory location</returns>
  86. public ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false)
  87. {
  88. if (IsContiguous(va, size))
  89. {
  90. return Physical.GetSpan(Translate(va), size, tracked);
  91. }
  92. else
  93. {
  94. Span<byte> data = new byte[size];
  95. ReadImpl(va, data, tracked);
  96. return data;
  97. }
  98. }
  99. /// <summary>
  100. /// Reads data from a possibly non-contiguous region of GPU mapped memory.
  101. /// </summary>
  102. /// <param name="va">GPU virtual address of the data</param>
  103. /// <param name="data">Span to write the read data into</param>
  104. /// <param name="tracked">True to enable write tracking on read, false otherwise</param>
  105. private void ReadImpl(ulong va, Span<byte> data, bool tracked)
  106. {
  107. if (data.Length == 0)
  108. {
  109. return;
  110. }
  111. int offset = 0, size;
  112. if ((va & PageMask) != 0)
  113. {
  114. ulong pa = Translate(va);
  115. size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
  116. Physical.GetSpan(pa, size, tracked).CopyTo(data.Slice(0, size));
  117. offset += size;
  118. }
  119. for (; offset < data.Length; offset += size)
  120. {
  121. ulong pa = Translate(va + (ulong)offset);
  122. size = Math.Min(data.Length - offset, (int)PageSize);
  123. Physical.GetSpan(pa, size, tracked).CopyTo(data.Slice(offset, size));
  124. }
  125. }
  126. /// <summary>
  127. /// Gets a writable region from GPU mapped memory.
  128. /// </summary>
  129. /// <param name="va">Start address of the range</param>
  130. /// <param name="size">Size in bytes to be range</param>
  131. /// <param name="tracked">True if write tracking is triggered on the span</param>
  132. /// <returns>A writable region with the data at the specified memory location</returns>
  133. public WritableRegion GetWritableRegion(ulong va, int size, bool tracked = false)
  134. {
  135. if (IsContiguous(va, size))
  136. {
  137. return Physical.GetWritableRegion(Translate(va), size, tracked);
  138. }
  139. else
  140. {
  141. Memory<byte> memory = new byte[size];
  142. GetSpan(va, size).CopyTo(memory.Span);
  143. return new WritableRegion(this, va, memory, tracked);
  144. }
  145. }
  146. /// <summary>
  147. /// Writes data to GPU mapped memory.
  148. /// </summary>
  149. /// <typeparam name="T">Type of the data</typeparam>
  150. /// <param name="va">GPU virtual address to write the value into</param>
  151. /// <param name="value">The value to be written</param>
  152. public void Write<T>(ulong va, T value) where T : unmanaged
  153. {
  154. Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
  155. }
  156. /// <summary>
  157. /// Writes data to GPU mapped memory.
  158. /// </summary>
  159. /// <param name="va">GPU virtual address to write the data into</param>
  160. /// <param name="data">The data to be written</param>
  161. public void Write(ulong va, ReadOnlySpan<byte> data)
  162. {
  163. WriteImpl(va, data, Physical.Write);
  164. }
  165. /// <summary>
  166. /// Writes data to GPU mapped memory, destined for a tracked resource.
  167. /// </summary>
  168. /// <param name="va">GPU virtual address to write the data into</param>
  169. /// <param name="data">The data to be written</param>
  170. public void WriteTrackedResource(ulong va, ReadOnlySpan<byte> data)
  171. {
  172. WriteImpl(va, data, Physical.WriteTrackedResource);
  173. }
  174. /// <summary>
  175. /// Writes data to GPU mapped memory without write tracking.
  176. /// </summary>
  177. /// <param name="va">GPU virtual address to write the data into</param>
  178. /// <param name="data">The data to be written</param>
  179. public void WriteUntracked(ulong va, ReadOnlySpan<byte> data)
  180. {
  181. WriteImpl(va, data, Physical.WriteUntracked);
  182. }
  183. private delegate void WriteCallback(ulong address, ReadOnlySpan<byte> data);
  184. /// <summary>
  185. /// Writes data to possibly non-contiguous GPU mapped memory.
  186. /// </summary>
  187. /// <param name="va">GPU virtual address of the region to write into</param>
  188. /// <param name="data">Data to be written</param>
  189. /// <param name="writeCallback">Write callback</param>
  190. private void WriteImpl(ulong va, ReadOnlySpan<byte> data, WriteCallback writeCallback)
  191. {
  192. if (IsContiguous(va, data.Length))
  193. {
  194. writeCallback(Translate(va), data);
  195. }
  196. else
  197. {
  198. int offset = 0, size;
  199. if ((va & PageMask) != 0)
  200. {
  201. ulong pa = Translate(va);
  202. size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
  203. writeCallback(pa, data.Slice(0, size));
  204. offset += size;
  205. }
  206. for (; offset < data.Length; offset += size)
  207. {
  208. ulong pa = Translate(va + (ulong)offset);
  209. size = Math.Min(data.Length - offset, (int)PageSize);
  210. writeCallback(pa, data.Slice(offset, size));
  211. }
  212. }
  213. }
  214. /// <summary>
  215. /// Maps a given range of pages to the specified CPU virtual address.
  216. /// </summary>
  217. /// <remarks>
  218. /// All addresses and sizes must be page aligned.
  219. /// </remarks>
  220. /// <param name="pa">CPU virtual address to map into</param>
  221. /// <param name="va">GPU virtual address to be mapped</param>
  222. /// <param name="size">Size in bytes of the mapping</param>
  223. public void Map(ulong pa, ulong va, ulong size)
  224. {
  225. lock (_pageTable)
  226. {
  227. MemoryUnmapped?.Invoke(this, new UnmapEventArgs(va, size));
  228. for (ulong offset = 0; offset < size; offset += PageSize)
  229. {
  230. SetPte(va + offset, pa + offset);
  231. }
  232. }
  233. }
  234. /// <summary>
  235. /// Unmaps a given range of pages at the specified GPU virtual memory region.
  236. /// </summary>
  237. /// <param name="va">GPU virtual address to unmap</param>
  238. /// <param name="size">Size in bytes of the region being unmapped</param>
  239. public void Unmap(ulong va, ulong size)
  240. {
  241. lock (_pageTable)
  242. {
  243. // Event handlers are not expected to be thread safe.
  244. MemoryUnmapped?.Invoke(this, new UnmapEventArgs(va, size));
  245. for (ulong offset = 0; offset < size; offset += PageSize)
  246. {
  247. SetPte(va + offset, PteUnmapped);
  248. }
  249. }
  250. }
  251. /// <summary>
  252. /// Checks if a region of GPU mapped memory is contiguous.
  253. /// </summary>
  254. /// <param name="va">GPU virtual address of the region</param>
  255. /// <param name="size">Size of the region</param>
  256. /// <returns>True if the region is contiguous, false otherwise</returns>
  257. [MethodImpl(MethodImplOptions.AggressiveInlining)]
  258. private bool IsContiguous(ulong va, int size)
  259. {
  260. if (!ValidateAddress(va) || GetPte(va) == PteUnmapped)
  261. {
  262. return false;
  263. }
  264. ulong endVa = (va + (ulong)size + PageMask) & ~PageMask;
  265. va &= ~PageMask;
  266. int pages = (int)((endVa - va) / PageSize);
  267. for (int page = 0; page < pages - 1; page++)
  268. {
  269. if (!ValidateAddress(va + PageSize) || GetPte(va + PageSize) == PteUnmapped)
  270. {
  271. return false;
  272. }
  273. if (Translate(va) + PageSize != Translate(va + PageSize))
  274. {
  275. return false;
  276. }
  277. va += PageSize;
  278. }
  279. return true;
  280. }
  281. /// <summary>
  282. /// Gets the physical regions that make up the given virtual address region.
  283. /// </summary>
  284. /// <param name="va">Virtual address of the range</param>
  285. /// <param name="size">Size of the range</param>
  286. /// <returns>Multi-range with the physical regions</returns>
  287. public MultiRange GetPhysicalRegions(ulong va, ulong size)
  288. {
  289. if (IsContiguous(va, (int)size))
  290. {
  291. return new MultiRange(Translate(va), size);
  292. }
  293. ulong regionStart = Translate(va);
  294. ulong regionSize = Math.Min(size, PageSize - (va & PageMask));
  295. ulong endVa = va + size;
  296. ulong endVaRounded = (endVa + PageMask) & ~PageMask;
  297. va &= ~PageMask;
  298. int pages = (int)((endVaRounded - va) / PageSize);
  299. var regions = new List<MemoryRange>();
  300. for (int page = 0; page < pages - 1; page++)
  301. {
  302. ulong currPa = Translate(va);
  303. ulong newPa = Translate(va + PageSize);
  304. if ((currPa != PteUnmapped || newPa != PteUnmapped) && currPa + PageSize != newPa)
  305. {
  306. regions.Add(new MemoryRange(regionStart, regionSize));
  307. regionStart = newPa;
  308. regionSize = 0;
  309. }
  310. va += PageSize;
  311. regionSize += Math.Min(endVa - va, PageSize);
  312. }
  313. regions.Add(new MemoryRange(regionStart, regionSize));
  314. return new MultiRange(regions.ToArray());
  315. }
  316. /// <summary>
  317. /// Checks if a given GPU virtual memory range is mapped to the same physical regions
  318. /// as the specified physical memory multi-range.
  319. /// </summary>
  320. /// <param name="range">Physical memory multi-range</param>
  321. /// <param name="va">GPU virtual memory address</param>
  322. /// <returns>True if the virtual memory region is mapped into the specified physical one, false otherwise</returns>
  323. public bool CompareRange(MultiRange range, ulong va)
  324. {
  325. va &= ~PageMask;
  326. for (int i = 0; i < range.Count; i++)
  327. {
  328. MemoryRange currentRange = range.GetSubRange(i);
  329. if (currentRange.Address != PteUnmapped)
  330. {
  331. ulong address = currentRange.Address & ~PageMask;
  332. ulong endAddress = (currentRange.EndAddress + PageMask) & ~PageMask;
  333. while (address < endAddress)
  334. {
  335. if (Translate(va) != address)
  336. {
  337. return false;
  338. }
  339. va += PageSize;
  340. address += PageSize;
  341. }
  342. }
  343. else
  344. {
  345. ulong endVa = va + (((currentRange.Size) + PageMask) & ~PageMask);
  346. while (va < endVa)
  347. {
  348. if (Translate(va) != PteUnmapped)
  349. {
  350. return false;
  351. }
  352. va += PageSize;
  353. }
  354. }
  355. }
  356. return true;
  357. }
  358. /// <summary>
  359. /// Validates a GPU virtual address.
  360. /// </summary>
  361. /// <param name="va">Address to validate</param>
  362. /// <returns>True if the address is valid, false otherwise</returns>
  363. private static bool ValidateAddress(ulong va)
  364. {
  365. return va < (1UL << AddressSpaceBits);
  366. }
  367. /// <summary>
  368. /// Checks if a given page is mapped.
  369. /// </summary>
  370. /// <param name="va">GPU virtual address of the page to check</param>
  371. /// <returns>True if the page is mapped, false otherwise</returns>
  372. public bool IsMapped(ulong va)
  373. {
  374. return Translate(va) != PteUnmapped;
  375. }
  376. /// <summary>
  377. /// Translates a GPU virtual address to a CPU virtual address.
  378. /// </summary>
  379. /// <param name="va">GPU virtual address to be translated</param>
  380. /// <returns>CPU virtual address, or <see cref="PteUnmapped"/> if unmapped</returns>
  381. public ulong Translate(ulong va)
  382. {
  383. if (!ValidateAddress(va))
  384. {
  385. return PteUnmapped;
  386. }
  387. ulong baseAddress = GetPte(va);
  388. if (baseAddress == PteUnmapped)
  389. {
  390. return PteUnmapped;
  391. }
  392. return baseAddress + (va & PageMask);
  393. }
  394. /// <summary>
  395. /// Gets the Page Table entry for a given GPU virtual address.
  396. /// </summary>
  397. /// <param name="va">GPU virtual address</param>
  398. /// <returns>Page table entry (CPU virtual address)</returns>
  399. private ulong GetPte(ulong va)
  400. {
  401. ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask;
  402. ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask;
  403. if (_pageTable[l0] == null)
  404. {
  405. return PteUnmapped;
  406. }
  407. return _pageTable[l0][l1];
  408. }
  409. /// <summary>
  410. /// Sets a Page Table entry at a given GPU virtual address.
  411. /// </summary>
  412. /// <param name="va">GPU virtual address</param>
  413. /// <param name="pte">Page table entry (CPU virtual address)</param>
  414. private void SetPte(ulong va, ulong pte)
  415. {
  416. ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask;
  417. ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask;
  418. if (_pageTable[l0] == null)
  419. {
  420. _pageTable[l0] = new ulong[PtLvl1Size];
  421. for (ulong index = 0; index < PtLvl1Size; index++)
  422. {
  423. _pageTable[l0][index] = PteUnmapped;
  424. }
  425. }
  426. _pageTable[l0][l1] = pte;
  427. }
  428. }
  429. }