| .. |
|
ACryptoHelper.cs
|
d021d5dfa9
Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365)
|
7 years ago |
|
AInst.cs
|
9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
|
8 years ago |
|
AInstEmitAlu.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 years ago |
|
AInstEmitAluHelper.cs
|
708761963e
Fix corner cases of ADCS and SBFM
|
8 years ago |
|
AInstEmitBfm.cs
|
708761963e
Fix corner cases of ADCS and SBFM
|
8 years ago |
|
AInstEmitCcmp.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 years ago |
|
AInstEmitCsel.cs
|
950011c90f
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
|
8 years ago |
|
AInstEmitException.cs
|
65105c2a3b
Implement SvcGetThreadContext3
|
7 years ago |
|
AInstEmitFlow.cs
|
6d65e53664
Remove cold methods from the CPU cache (#224)
|
7 years ago |
|
AInstEmitHash.cs
|
8f6387128a
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
|
7 years ago |
|
AInstEmitMemory.cs
|
4731c7545d
Fix mistake on astc conversion, make some static methods that shouldn't be public private, remove old commmented out code
|
8 years ago |
|
AInstEmitMemoryEx.cs
|
b8133c1997
Thread scheduler rewrite (#393)
|
7 years ago |
|
AInstEmitMemoryHelper.cs
|
c393cdf8e3
More flexible memory manager (#307)
|
7 years ago |
|
AInstEmitMove.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 years ago |
|
AInstEmitMul.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 years ago |
|
AInstEmitSimdArithmetic.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 years ago |
|
AInstEmitSimdCmp.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 years ago |
|
AInstEmitSimdCrypto.cs
|
d021d5dfa9
Add AESD, AESE, AESIMC, AESMC instructions; add 4 simple Tests (closed box). (#365)
|
7 years ago |
|
AInstEmitSimdCvt.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 years ago |
|
AInstEmitSimdHash.cs
|
34100051e4
Add SHA256H, SHA256H2, SHA256SU0, SHA256SU1 instructions; add 4 Tests (closed box). (#352)
|
7 years ago |
|
AInstEmitSimdHelper.cs
|
bba9bf97d0
Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437)
|
7 years ago |
|
AInstEmitSimdLogical.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 years ago |
|
AInstEmitSimdMemory.cs
|
514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
|
7 years ago |
|
AInstEmitSimdMove.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 years ago |
|
AInstEmitSimdShift.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 years ago |
|
AInstEmitSystem.cs
|
2ed24af756
Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count
|
8 years ago |
|
AInstEmitter.cs
|
62b827f474
Split main project into core,graphics and chocolarm4 subproject (#29)
|
8 years ago |
|
AInstInterpreter.cs
|
9670c096e4
Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
|
8 years ago |
|
ASoftFallback.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 years ago |
|
ASoftFloat.cs
|
894459fcd7
Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
|
7 years ago |
|
AVectorHelper.cs
|
0b52ee6627
Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Scalar) using SSE intrinsics (#405)
|
7 years ago |
LDj3SNuD