 riperiperi
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9ef94c8292
ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661)
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%!s(int64=3) %!d(string=hai) anos |
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riperiperi
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9db73f74cf
ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618)
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%!s(int64=3) %!d(string=hai) anos |
 Wunk
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17620d18db
ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147)
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%!s(int64=3) %!d(string=hai) anos |
 jhorv
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5131b71437
Reducing memory allocations (#4537)
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%!s(int64=3) %!d(string=hai) anos |
 gdkchan
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f0562b9c75
CPU: Avoid argument value copies on the JIT (#4484)
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%!s(int64=3) %!d(string=hai) anos |
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gdkchan
|
a1a4771ac1
Remove use of GetFunctionPointerForDelegate to get JIT cache function pointer (#4337)
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%!s(int64=3) %!d(string=hai) anos |
 merry
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4f293f8cbe
Arm64: Simplify TryEncodeBitMask and use for constants (#4328)
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%!s(int64=3) %!d(string=hai) anos |
 Andrey Sukharev
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ae4324032a
Optimize string memory usage. Use Spans and StringBuilders where possible (#3933)
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%!s(int64=3) %!d(string=hai) anos |
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merry
|
e9a173e00c
Ptc: Check process architecture (#4272)
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%!s(int64=3) %!d(string=hai) anos |
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merry
|
a11784fcbf
Arm64: Cpu feature detection (#4264)
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%!s(int64=3) %!d(string=hai) anos |
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gdkchan
|
5e0f8e8738
Implement JIT Arm64 backend (#4114)
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%!s(int64=3) %!d(string=hai) anos |
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gdkchan
|
fc4b7cba2c
Make PPTC state non-static (#4157)
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%!s(int64=3) %!d(string=hai) anos |
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gdkchan
|
219f63ff4e
Fix CPU FCVTN instruction implementation (slow path) (#4159)
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%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
ee0f9b03a4
Eliminate zero-extension moves in more cases on 32-bit games (#4140)
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%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
f93c5f006a
Revert "ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)" (#4145)
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%!s(int64=3) %!d(string=hai) anos |
|
Wunk
|
295fbd0542
ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)
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%!s(int64=3) %!d(string=hai) anos |
 LDj3SNuD
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5af8ce7c38
A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… (#3712)
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%!s(int64=3) %!d(string=hai) anos |
|
Wunk
|
45ce540b9b
ARMeilleure: Add `gfni` acceleration (#3669)
|
%!s(int64=3) %!d(string=hai) anos |
|
LDj3SNuD
|
814f75142e
Fpsr and Fpcr freed. (#3701)
|
%!s(int64=3) %!d(string=hai) anos |
|
LDj3SNuD
|
b9f1ff3c77
Implemented in IR the managed methods of the ShlReg region of the SoftFallback class. (#3700)
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%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
729ff5337c
Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 (#3695)
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%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
c64524a240
Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683)
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%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
db45688aa8
Implement VRSRA, VRSHRN, VQSHRUN, VQMOVN, VQMOVUN, VQADD, VQSUB, VRHADD, VPADDL, VSUBL, VQDMULH and VMLAL Arm32 NEON instructions (#3677)
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%!s(int64=3) %!d(string=hai) anos |
|
LDj3SNuD
|
7baa08dcb4
Implemented in IR the managed methods of the Saturating region ... (#3665)
|
%!s(int64=3) %!d(string=hai) anos |
|
merry
|
f5235fff29
ARMeilleure: Hardware accelerate SHA256 (#3585)
|
%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
f7ef6364b7
Implement CPU FCVT Half <-> Double conversion variants (#3439)
|
%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
0c87bf9ea4
Refactor CPU interface to allow the implementation of other CPU emulators (#3362)
|
%!s(int64=4) %!d(string=hai) anos |
|
gdkchan
|
26a881176e
Fix tail merge from block with conditional jump to multiple returns (#3267)
|
%!s(int64=4) %!d(string=hai) anos |
|
merry
|
df70442c46
InstEmitMemoryEx: Barrier after write on ordered store (#3193)
|
%!s(int64=4) %!d(string=hai) anos |
|
merry
|
b97ff4da5e
A32: Fix ALU immediate instructions (#3179)
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%!s(int64=4) %!d(string=hai) anos |
