Historique des commits

Auteur SHA1 Message Date
  gdkchan db45688aa8 Implement VRSRA, VRSHRN, VQSHRUN, VQMOVN, VQMOVUN, VQADD, VQSUB, VRHADD, VPADDL, VSUBL, VQDMULH and VMLAL Arm32 NEON instructions (#3677) il y a 3 ans
  Nicholas Rodine 951700fdd8 Removed unused usings. (#3593) il y a 3 ans
  gdkchan 2bb9b33da1 Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544) il y a 3 ans
  LDj3SNuD 430ba6da65 CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) il y a 5 ans
  LDj3SNuD 8a33e884f8 Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) il y a 5 ans
  sharmander 3332b29f01 CPU: Implement VFMA (Vector) (#1762) il y a 5 ans
  sharmander 36f6bbf5b9 CPU: Implement VFNMA.F32 | F.64 (#1783) il y a 5 ans
  sharmander b479a43939 CPU: Implement VFNMS.F32/64 (#1758) il y a 5 ans
  LDj3SNuD e36e97c64d CPU: This PR fixes Fpscr, among other things. (#1433) il y a 5 ans
  Valentin PONS 3af2ce74ec Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) il y a 5 ans
  LDj3SNuD 88619d71b8 CPU: A32: Add Vadd & Vsub Wide (S/U_8/16/32) Inst.s with Test. (#1390) il y a 5 ans
  riperiperi 9a49f8aec9 Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303) il y a 5 ans
  gdkchan c26f3774bd Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977) il y a 6 ans
  riperiperi b1b6f294f2 Add most of the A32 instruction set to ARMeilleure (#897) il y a 6 ans