 riperiperi
|
9ef94c8292
ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661)
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%!s(int64=3) %!d(string=hai) anos |
|
riperiperi
|
9db73f74cf
ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618)
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%!s(int64=3) %!d(string=hai) anos |
 gdkchan
|
5e0f8e8738
Implement JIT Arm64 backend (#4114)
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%!s(int64=3) %!d(string=hai) anos |
 LDj3SNuD
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814f75142e
Fpsr and Fpcr freed. (#3701)
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%!s(int64=3) %!d(string=hai) anos |
 merry
|
fbcf802fbc
A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694)
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%!s(int64=3) %!d(string=hai) anos |
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gdkchan
|
0c87bf9ea4
Refactor CPU interface to allow the implementation of other CPU emulators (#3362)
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%!s(int64=3) %!d(string=hai) anos |
|
gdkchan
|
92d166ecb7
Enable CPU JIT cache invalidation (#2965)
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%!s(int64=4) %!d(string=hai) anos |
|
riperiperi
|
1ae690ba2f
Use normal memory store path for DC ZVA (#2693)
|
%!s(int64=4) %!d(string=hai) anos |
 FICTURE7
|
22b2cb39af
Reduce JIT GC allocations (#2515)
|
%!s(int64=4) %!d(string=hai) anos |
|
LDj3SNuD
|
5e724cf24e
Add Profiled Persistent Translation Cache. (#769)
|
%!s(int64=5) %!d(string=hai) anos |
 mageven
|
6416bc1938
Implement CNTVCT_EL0 (#1268)
|
%!s(int64=5) %!d(string=hai) anos |
|
LDj3SNuD
|
7c111a3567
Add Mrs & Msr (Nzcv) Inst., with Tests. (#819)
|
%!s(int64=6) %!d(string=hai) anos |
|
gdkchan
|
a731ab3a2a
Add a new JIT compiler for CPU code (#693)
|
%!s(int64=6) %!d(string=hai) anos |
